公开(公告)号：US20120083122A1

公开(公告)日：2012-04-05

申请号：US13012142

申请日：2011-01-24

Applicant: Leslie Charns ,  Jason E. Cummings ,  Lukasz J. Hupka ,  Dinesh R. Koli ,  Tomohisa Konno ,  Mahadevaiyer Krishnan ,  Michael F. Lofaro ,  Jakub W. Nalaskowski ,  Masahiro Noda ,  Dinesh K. Penigalapati ,  Tatsuya Yamanaka

Inventor： Leslie Charns ,  Jason E. Cummings ,  Lukasz J. Hupka ,  Dinesh R. Koli ,  Tomohisa Konno ,  Mahadevaiyer Krishnan ,  Michael F. Lofaro ,  Jakub W. Nalaskowski ,  Masahiro Noda ,  Dinesh K. Penigalapati ,  Tatsuya Yamanaka

IPC: H01L21/306

CPC classification number: H01L21/31053 ,  H01L29/517 ,  H01L29/6653 ,  H01L29/66545

Abstract: A polishing method includes polishing, in a first polish, a wafer to remove overburden and planarize a top layer leaving a portion remaining on an underlying layer. A second polishing step includes two phases. In a first phase, the top layer is removed and the underlying layer is exposed, with a top layer to underlying layer selectivity of between about 1:1 to about 2:1 to provide a planar topography. In a second phase, residual portions of the top layer are removed from a top of the underlying layer to ensure complete exposure of an underlying layer surface.

Abstract translation: 抛光方法包括在第一抛光剂中抛光晶片以去除覆盖层并平坦化顶层，留下保留在下层上的部分。 第二抛光步骤包括两个阶段。 在第一阶段中，去除顶层并暴露下层，其顶层至基层选择性为约1:1至约2:1，以提供平面形貌。 在第二阶段中，顶层的残余部分从下层的顶部去除，以确保下层的表面完全曝光。

公开(公告)号：US07581314B2

公开(公告)日：2009-09-01

申请号：US11358823

申请日：2006-02-21

Applicant: Hariklia Deligianni ,  Panayotis Andricacos ,  L. Paivikki Buchwalter ,  John M. Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John H. Magerlein ,  Kenneth Stein ,  Richard P. Volant ,  James A. Tornello ,  Jennifer Lund

Inventor： Hariklia Deligianni ,  Panayotis Andricacos ,  L. Paivikki Buchwalter ,  John M. Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John H. Magerlein ,  Kenneth Stein ,  Richard P. Volant ,  James A. Tornello ,  Jennifer Lund

IPC: H01K3/10

CPC classification number: H01H59/0009 ,  H01H2001/0052 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49204

Abstract: A semiconductor micro-electromechanical system (MEMS) switch provided with noble metal contacts that act as an oxygen barrier to copper electrodes is described. The MEMS switch is fully integrated into a CMOS semiconductor fabrication line. The integration techniques, materials and processes are fully compatible with copper chip metallization processes and are typically, a low cost and a low temperature process (below 400° C.). The MEMS switch includes: a movable beam within a cavity, the movable beam being anchored to a wall of the cavity at one or both ends of the beam; a first electrode embedded in the movable beam; and a second electrode embedded in an wall of the cavity and facing the first electrode, wherein the first and second electrodes are respectively capped by the noble metal contact.

Abstract translation: 描述了提供有作为铜电极的氧阻隔的贵金属触点的半导体微机电系统（MEMS）开关。 MEMS开关完全集成到CMOS半导体制造线中。 集成技术，材料和工艺完全兼容铜芯片金属化工艺，通常是低成本和低温工艺（低于400℃）。 MEMS开关包括：在空腔内的可移动光束，可移动光束在光束的一端或两端锚定到空腔的壁; 嵌入可移动光束中的第一电极; 以及第二电极，其嵌入在所述空腔的壁中并且面向所述第一电极，其中所述第一和第二电极分别被所述贵金属接触物覆盖。

公开(公告)号：US07407605B2

公开(公告)日：2008-08-05

申请号：US11751788

申请日：2007-05-22

Applicant: Darryl D. Restaino ,  Donald F. Canaperi ,  Judith M. Rubino ,  Sean P. E. Smith ,  Richard O. Henry ,  James E. Fluegel ,  Mahadevaiyer Krishnan

Inventor： Darryl D. Restaino ,  Donald F. Canaperi ,  Judith M. Rubino ,  Sean P. E. Smith ,  Richard O. Henry ,  James E. Fluegel ,  Mahadevaiyer Krishnan

IPC: H01B1/00

CPC classification number: H01L21/288 ,  C23C18/1241 ,  C23C18/1607 ,  C23C18/1608 ,  C23C18/1844 ,  C23C18/50 ,  H01L21/76849 ,  H01L21/76874 ,  H05K3/244 ,  H05K2203/0716 ,  H05K2203/072

Abstract: An aqueous seeding solution of palladium acetate, acetic acid and chloride.

Abstract translation: 乙酸钯，乙酸和氯化钠的水溶液接种溶液。

公开(公告)号：US07064064B2

公开(公告)日：2006-06-20

申请号：US11058783

申请日：2005-02-16

Applicant: Shyng-Tsong Chen ,  Timothy J. Dalton ,  Kenneth M. Davis ,  Chao-Kun Hu ,  Fen F. Jamin ,  Steffen K. Kaldor ,  Mahadevaiyer Krishnan ,  Kaushik Kumar ,  Michael F. Lofaro ,  Sandra G. Malhotra ,  Chandrasekhar Narayan ,  David L. Rath ,  Judith M. Rubino ,  Katherine L. Saenger ,  Andrew H. Simon ,  Sean P. E. Smith ,  Wei-tsu Tseng

Inventor： Shyng-Tsong Chen ,  Timothy J. Dalton ,  Kenneth M. Davis ,  Chao-Kun Hu ,  Fen F. Jamin ,  Steffen K. Kaldor ,  Mahadevaiyer Krishnan ,  Kaushik Kumar ,  Michael F. Lofaro ,  Sandra G. Malhotra ,  Chandrasekhar Narayan ,  David L. Rath ,  Judith M. Rubino ,  Katherine L. Saenger ,  Andrew H. Simon ,  Sean P. E. Smith ,  Wei-tsu Tseng

IPC: H01L21/44

CPC classification number: H01L21/76849 ,  H01L21/76834 ,  H01L21/76847 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit structure is disclosed that has a layer of logical and functional devices and an interconnection layer above the layer of logical and functional devices. The interconnection layer has a substrate, conductive features within the substrate and caps positioned only above the conductive features.

Abstract translation: 公开了一种集成电路结构，其具有逻辑和功能器件层以及逻辑和功能器件层之上的互连层。 互连层具有衬底，衬底内的导电特征和仅位于导电特征之上的盖。

公开(公告)号：US20060051961A1

公开(公告)日：2006-03-09

申请号：US10935497

申请日：2004-09-07

Applicant: Cyril Cabral ,  Michael Cobb ,  Balasubramanian Pranatharthi Haran ,  Randolph Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew Mansson ,  Horatio Wildman

Inventor： Cyril Cabral ,  Michael Cobb ,  Balasubramanian Pranatharthi Haran ,  Randolph Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew Mansson ,  Horatio Wildman

IPC: H01L21/44

CPC classification number: H01L21/28518 ,  H01L21/28052 ,  H01L29/665

Abstract: The present invention provides a method for forming a self-aligned Ni alloy silicide contact. The method of the present invention begins by first depositing a conductive Ni alloy with Pt and optionally at least one of the following metals Pd, Rh, Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, W or Re over an entire semiconductor structure which includes at least one gate stack region. An oxygen diffusion barrier comprising, for example, Ti, TiN or W is deposited over the structure to prevent oxidation of the metals. An annealing step is then employed to cause formation of a NiSi, PtSi contact in regions in which the metals are in contact with silicon. The metal that is in direct contact with insulating material such as SiO2 and Si3N4 is not converted into a metal alloy silicide contact during the annealing step. A selective etching step is then performed to remove unreacted metal from the sidewalls of the spacers and trench isolation regions.

Abstract translation: 本发明提供一种形成自对准Ni合金硅化物接触的方法。 本发明的方法首先首先用Pt和任选的以下金属Pd，Rh，Ti，V，Cr，Zr，Nb，Mo，Hf，Ta，W或Re中的至少一种沉积导电Ni合金， 整个半导体结构，其包括至少一个栅极堆叠区域。 包含例如Ti，TiN或W的氧扩散阻挡层沉积在结构上以防止金属的氧化。 然后使用退火步骤在金属与硅接触的区域中形成NiSi，PtSi接触。 与诸如SiO 2和Si 3 N 4 N之类的绝缘材料直接接触的金属在金属合金硅化物接触期间不会转化为金属合金硅化物接触 退火步骤。 然后执行选择性蚀刻步骤以从间隔物和沟槽隔离区域的侧壁去除未反应的金属。

公开(公告)号：US07008871B2

公开(公告)日：2006-03-07

申请号：US10611931

申请日：2003-07-03

Applicant: Panayotis C. Andricacos ,  Shyng-Tsong Chen ,  John M. Cotte ,  Hariklia Deligianni ,  Mahadevaiyer Krishnan ,  Wei-Tsu Tseng ,  Philippe M. Vereecken

Inventor： Panayotis C. Andricacos ,  Shyng-Tsong Chen ,  John M. Cotte ,  Hariklia Deligianni ,  Mahadevaiyer Krishnan ,  Wei-Tsu Tseng ,  Philippe M. Vereecken

IPC: H01L21/44

CPC classification number: H01L21/76846 ,  H01L21/2885 ,  H01L21/6708 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76874 ,  H01L21/76883

Abstract: Patterned copper structures are fabricated by selectively capping the copper employing selective etching and/or selective electroplating in the presence of a liner material. Apparatus for addressing the problem of an increased resistive path as electrolyte during electroetching and/or electroplating flows from the wafer edge inwards is provided.

Abstract translation: 通过在衬垫材料的存在下使用选择性蚀刻和/或选择性电镀选择性地封盖铜来制造图案化的铜结构。 提供了用于解决在电蚀和/或电镀过程中作为电解质增加的电阻路径从晶片边缘向内流动的问题的装置。

公开(公告)号：US06812193B2

公开(公告)日：2004-11-02

申请号：US10231047

申请日：2002-08-30

Applicant: Michael Todd Brigham ,  Donald Francis Canaperi ,  Michael Addison Cobb ,  William Cote ,  Kenneth Morgan Davis ,  Scott Alan Estes ,  Edward Jack Gordon ,  James Willard Hannah ,  Mahadevaiyer Krishnan ,  Michael Francis Lofaro ,  Michael Joseph MacDonald ,  Dean Allen Schaffer ,  George James Slusser ,  James Anthony Tornello ,  Eric Jeffrey White

Inventor： Michael Todd Brigham ,  Donald Francis Canaperi ,  Michael Addison Cobb ,  William Cote ,  Kenneth Morgan Davis ,  Scott Alan Estes ,  Edward Jack Gordon ,  James Willard Hannah ,  Mahadevaiyer Krishnan ,  Michael Francis Lofaro ,  Michael Joseph MacDonald ,  Dean Allen Schaffer ,  George James Slusser ,  James Anthony Tornello ,  Eric Jeffrey White

IPC: C09K1300

CPC classification number: C11D3/046 ,  C11D7/34 ,  C11D11/0047 ,  H01L21/3212

Abstract: Slurry compositions comprising an oxidizing agent, optionally a copper corrosion inhibitor, abrasive particles; surface active agent, a service of chloride and a source of sulfate ions.

Abstract translation: 包含氧化剂，任选的铜腐蚀抑制剂，磨料颗粒的浆料组合物; 表面活性剂，氯化物和硫酸根离子的使用。

公开(公告)号：US06743642B2

公开(公告)日：2004-06-01

申请号：US10289488

申请日：2002-11-06

Applicant: Gregory Costrini ,  John Hummel ,  Kia-Seng Low ,  Mahadevaiyer Krishnan

Inventor： Gregory Costrini ,  John Hummel ,  Kia-Seng Low ,  Mahadevaiyer Krishnan

IPC: H01L2100

CPC classification number: H01L43/12 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/16 ,  H01F10/26 ,  H01F10/3254 ,  H01F41/307 ,  H01L27/222

Abstract: A method for manufacturing a magnetoresistive random access memory (MRAM) cell is disclosed, which alleviates the problem of Neel coupling caused by roughness in the interface between the tunnel junction layer and the magnetic layers. The method includes depositing first and second barrier layers on the conductor, wherein the first barrier layer has a polish rate different from that of the second barrier layer. The second barrier layer is then essentially removed by chemical mechanical polishing (CMP), leaving a very smooth and uniform first barrier layer. When the magnetic stack is then formed on the polished first barrier layer, interfacial roughness is not translated to the tunnel junction layer, and no corruption of magnetization is experienced.

Abstract translation: 公开了一种用于制造磁阻随机存取存储器（MRAM）单元的方法，其减轻了由隧道结层和磁性层之间的界面中的粗糙度引起的Neel耦合的问题。 该方法包括在导体上沉积第一和第二阻挡层，其中第一阻挡层具有与第二阻挡层不同的抛光速率。 然后通过化学机械抛光（CMP）基本上除去第二阻挡层，留下非常平滑和均匀的第一阻挡层。 当磁性堆叠形成在抛光的第一阻挡层上时，界面粗糙度不会转变为隧道结层，并且不会发生磁化腐蚀。

公开(公告)号：US6114249A

公开(公告)日：2000-09-05

申请号：US37205

申请日：1998-03-10

Applicant: Donald Francis Canaperi ,  Rangarajan Jagannathan ,  Mahadevaiyer Krishnan ,  Clifford Owen Morgan ,  Terrance Monte Wright

Inventor： Donald Francis Canaperi ,  Rangarajan Jagannathan ,  Mahadevaiyer Krishnan ,  Clifford Owen Morgan ,  Terrance Monte Wright

IPC: B24B37/00 ,  C09K13/00 ,  H01L21/304 ,  H01L21/3105 ,  H01L21/302

CPC classification number: H01L21/31053 ,  C09K13/00

Abstract: A colloidal silica slurry containing triethanolamine is used in a chemical mechanical polishing process to polish multiple material substrates, such as silicon wafers containing silicon oxide where a thin underlayer of silicon nitride is used as a stop layer. The colloidal silica slurry containing triethanolamine is capable of achieving an oxide to nitride selectivity during polishing up to a demonstrated ratio of 28:1.

Abstract translation: 含有三乙醇胺的胶体二氧化硅浆料用于化学机械抛光工艺中以抛光多种材料基底，例如含有氧化硅的硅晶片，其中使用薄的氮化硅底层作为停止层。 含有三乙醇胺的胶体二氧化硅浆料在抛光期间能够达到氧化物至氮化物选择性，达到显示的比例为28:1。

公开(公告)号：US5576099A

公开(公告)日：1996-11-19

申请号：US477696

申请日：1990-02-09

Applicant: Donald F. Canaperi ,  Mahadevaiyer Krishnan ,  Sol Krongelb ,  David L. Rath ,  Lubomyr T. Romakiw

Inventor： Donald F. Canaperi ,  Mahadevaiyer Krishnan ,  Sol Krongelb ,  David L. Rath ,  Lubomyr T. Romakiw

IPC: G11B5/147 ,  G11B5/31 ,  H01F10/00 ,  H01F10/32 ,  G11B5/66 ,  B32B5/16

CPC classification number: B82Y25/00 ,  G11B5/3113 ,  H01F10/32 ,  H01F10/3204 ,  Y10S428/90 ,  Y10T428/1171 ,  Y10T428/12465 ,  Y10T428/12854 ,  Y10T428/12931 ,  Y10T428/26 ,  Y10T428/265

Abstract: Laminates of magnetic and magnetic quenching laminae are provided for use as magnetic thin film laminates for use in magnetic recording heads. The use of these films significantly reduces the number of domains and Barkhausen noise levels in such recording heads.

Abstract translation: 提供磁和磁性淬火层的层压板用作用于磁记录头的磁性薄膜层压板。 这些膜的使用显着地减少了这种记录头中的域数和Barkhausen噪声水平。