公开(公告)号：US06361402B1

公开(公告)日：2002-03-26

申请号：US09427492

申请日：1999-10-26

Applicant: Donald F. Canaperi ,  Rangarajan Jagannathan ,  Mahadevaiyer Krishnan ,  Max G. Levy ,  Uma Satyendra ,  Matthew Sendelbach ,  James A. Tornello ,  William Wille

Inventor： Donald F. Canaperi ,  Rangarajan Jagannathan ,  Mahadevaiyer Krishnan ,  Max G. Levy ,  Uma Satyendra ,  Matthew Sendelbach ,  James A. Tornello ,  William Wille

IPC: B24B100

CPC classification number: B24B37/0056 ,  B24B37/044 ,  H01L21/31053 ,  H01L21/76819

Abstract: A method for polishing an object having a layer of photoresist, the method, employing the following steps: a) applying a layer of slurry on an a layer of photoresist on an object having a first and a second side, the layer of photoresist on one of the first and second side, the object having a center axis perpendicular to the first and second side; b) contacting the layer of slurry with a pad having a first and second side, the first side of the pad exerting a force on the slurry.

Abstract translation: 一种用于抛光具有光致抗蚀剂层的物体的方法，该方法采用以下步骤：a）在具有第一和第二侧的物体上的一层光致抗蚀剂上施加一层浆料，一层光致抗蚀剂 所述第一和第二侧的物体具有垂直于第一和第二侧的中心轴; b）使浆料层与具有第一和第二侧的垫接触，垫的第一侧在浆料上施加力 。

公开(公告)号：US08263497B2

公开(公告)日：2012-09-11

申请号：US12352718

申请日：2009-01-13

Applicant: Paul S. Andry ,  John M. Cotte ,  Michael F. Lofaro ,  Edmund J. Sprogis ,  James A. Tornello ,  Cornelia K. Tsang

Inventor： Paul S. Andry ,  John M. Cotte ,  Michael F. Lofaro ,  Edmund J. Sprogis ,  James A. Tornello ,  Cornelia K. Tsang

IPC: H01L21/302 ,  H01L21/461

CPC classification number: H01L21/76898 ,  H01L23/481 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05184 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00

Abstract: An assembly including a main wafer having a body with a front side and a back side and a plurality of blind electrical vias terminating above the back side, and a handler wafer, is obtained. A step includes exposing the blind electrical vias to various heights on the back side. Another step involves applying a first chemical mechanical polish process to the back side, to open any of the surrounding insulator adjacent the end regions of the cores remaining after the exposing step, and to co-planarize the via conductive cores, the surrounding insulator adjacent the side regions of the cores, and the body of the main wafer. Further steps include etching the back side to produce a uniform standoff height of each of the vias across the back side; depositing a dielectric across the back side; and applying a second chemical mechanical polish process to the back side.

Abstract translation: 获得包括具有前侧和后侧的主体的主晶片和终止于背面的多个盲电通路的组件和处理器晶片。 一个步骤包括将盲电通孔暴露在背面的各种高度上。 另一个步骤涉及将第一化学机械抛光工艺应用于背面，以便打开暴露步骤之后残留的芯的端部附近的任何周围的绝缘体，并且将通孔导电芯，邻近的绝缘体 芯的侧面区域和主晶片的主体。 进一步的步骤包括蚀刻背面以产生穿过背面的每个通路的均匀间隔高度; 在背面沉积电介质; 并向后侧施加第二化学机械抛光工艺。

公开(公告)号：US07955160B2

公开(公告)日：2011-06-07

申请号：US12135315

申请日：2008-06-09

Applicant: Michael A. Cobb ,  Dinesh R. Koli ,  Michael F. Lofaro ,  Dennis G. Manzer ,  Paraneetha Poloju ,  James A. Tornello

Inventor： Michael A. Cobb ,  Dinesh R. Koli ,  Michael F. Lofaro ,  Dennis G. Manzer ,  Paraneetha Poloju ,  James A. Tornello

IPC: B24B1/00

CPC classification number: B24B37/042 ,  B24B37/11

Abstract: A glass mold polishing structure and method. The method includes providing a polishing tool comprising mounting plate, a chuck plate over and mechanically attached to the mounting plate, and a pad structure over and mechanically attached to the chuck plate. A retaining structure is attached the chuck plate. A glass mold comprising a plurality of cavities is placed on the pad structure and within a perimeter formed by the retaining structure. A vacuum device is attached to the chuck plate. The vacuum device is activated such that a vacuum is formed and mechanically attaches the glass mold to the pad structure. The polishing tool comprising the glass mold mechanically attached to the pad structure is placed over and in contact with the polishing pad. The polishing tool comprising the glass mold is rotated. The glass mold is polished as a result of the rotation.

Abstract translation: 玻璃模具抛光结构及方法。 该方法包括提供一种抛光工具，该抛光工具包括安装板，卡盘板，并且机械地连接到安装板上，以及衬垫结构，并且在机械上附接到卡盘板上。 保持结构安装在卡盘板上。 包括多个空腔的玻璃模具被放置在垫结构上并且在由保持结构形成的周边内。 真空装置安装在卡板上。 激活真空装置，使得形成真空并将玻璃模具机械地附接到衬垫结构。 包括机械地附接到垫结构的玻璃模具的抛光工具放置在抛光垫上并与抛光垫接触。 包括玻璃模具的抛光工具旋转。 玻璃模具由于旋转而被抛光。

公开(公告)号：US20090305616A1

公开(公告)日：2009-12-10

申请号：US12135315

申请日：2008-06-09

Applicant: Michael A. Cobb ,  Dinesh R. Koli ,  Michael F. Lofaro ,  Dennis G. Manzer ,  Praneetha Poloju ,  James A. Tornello

Inventor： Michael A. Cobb ,  Dinesh R. Koli ,  Michael F. Lofaro ,  Dennis G. Manzer ,  Praneetha Poloju ,  James A. Tornello

IPC: B24B7/10

CPC classification number: B24B37/042 ,  B24B37/11

Abstract: A glass mold polishing structure and method. The method includes providing a polishing tool comprising mounting plate, a chuck plate over and mechanically attached to the mounting plate, and a pad structure over and mechanically attached to the chuck plate. A retaining structure is attached the chuck plate. A glass mold comprising a plurality of cavities is placed on the pad structure and within a perimeter formed by the retaining structure. A vacuum device is attached to the chuck plate. The vacuum device is activated such that a vacuum is formed and mechanically attaches the glass mold to the pad structure. The polishing tool comprising the glass mold mechanically attached to the pad structure is placed over and in contact with the polishing pad. The polishing tool comprising the glass mold is rotated. The glass mold is polished as a result of the rotation.

Abstract translation: 玻璃模具抛光结构及方法。 该方法包括提供一种抛光工具，该抛光工具包括安装板，卡盘板，并且机械地连接到安装板上，以及衬垫结构，并且在机械上附接到卡盘板上。 保持结构安装在卡盘板上。 包括多个空腔的玻璃模具被放置在垫结构上并且在由保持结构形成的周边内。 真空装置安装在卡板上。 激活真空装置，使得形成真空并将玻璃模具机械地附接到衬垫结构。 包括机械地附接到垫结构的玻璃模具的抛光工具放置在抛光垫上并与抛光垫接触。 包括玻璃模具的抛光工具旋转。 玻璃模具由于旋转而被抛光。

公开(公告)号：US07581314B2

公开(公告)日：2009-09-01

申请号：US11358823

申请日：2006-02-21

Applicant: Hariklia Deligianni ,  Panayotis Andricacos ,  L. Paivikki Buchwalter ,  John M. Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John H. Magerlein ,  Kenneth Stein ,  Richard P. Volant ,  James A. Tornello ,  Jennifer Lund

Inventor： Hariklia Deligianni ,  Panayotis Andricacos ,  L. Paivikki Buchwalter ,  John M. Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John H. Magerlein ,  Kenneth Stein ,  Richard P. Volant ,  James A. Tornello ,  Jennifer Lund

IPC: H01K3/10

CPC classification number: H01H59/0009 ,  H01H2001/0052 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49204

Abstract: A semiconductor micro-electromechanical system (MEMS) switch provided with noble metal contacts that act as an oxygen barrier to copper electrodes is described. The MEMS switch is fully integrated into a CMOS semiconductor fabrication line. The integration techniques, materials and processes are fully compatible with copper chip metallization processes and are typically, a low cost and a low temperature process (below 400° C.). The MEMS switch includes: a movable beam within a cavity, the movable beam being anchored to a wall of the cavity at one or both ends of the beam; a first electrode embedded in the movable beam; and a second electrode embedded in an wall of the cavity and facing the first electrode, wherein the first and second electrodes are respectively capped by the noble metal contact.

Abstract translation: 描述了提供有作为铜电极的氧阻隔的贵金属触点的半导体微机电系统（MEMS）开关。 MEMS开关完全集成到CMOS半导体制造线中。 集成技术，材料和工艺完全兼容铜芯片金属化工艺，通常是低成本和低温工艺（低于400℃）。 MEMS开关包括：在空腔内的可移动光束，可移动光束在光束的一端或两端锚定到空腔的壁; 嵌入可移动光束中的第一电极; 以及第二电极，其嵌入在所述空腔的壁中并且面向所述第一电极，其中所述第一和第二电极分别被所述贵金属接触物覆盖。

公开(公告)号：US07202764B2

公开(公告)日：2007-04-10

申请号：US10604278

申请日：2003-07-08

Applicant: Hariklia Deligianni ,  Panayotis Andricacos ,  L. Paivikki Buchwalter ,  John M. Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John H. Magerlein ,  Kenneth Stein ,  Richard P. Volant ,  James A. Tornello ,  Jennifer Lund

Inventor： Hariklia Deligianni ,  Panayotis Andricacos ,  L. Paivikki Buchwalter ,  John M. Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John H. Magerlein ,  Kenneth Stein ,  Richard P. Volant ,  James A. Tornello ,  Jennifer Lund

IPC: H01H51/22

CPC classification number: H01H59/0009 ,  H01H2001/0052 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49204

Abstract: A semiconductor micro-electromechanical system (MEMS) switch provided with noble metal contacts that act as an oxygen barrier to copper electrodes is described. The MEMS switch is fully integrated into a CMOS semiconductor fabrication line. The integration techniques, materials and processes are fully compatible with copper chip metallization processes and are typically, a low cost and a low temperature process (below 400° C.). The MEMS switch includes: a movable beam within a cavity, the movable beam being anchored to a wall of the cavity at one or both ends of the beam; a first electrode embedded in the movable beam; and a second electrode embedded in an wall of the cavity and facing the first electrode, wherein the first and second electrodes are respectively capped by the noble metal contact.

Abstract translation: 描述了提供有作为铜电极的氧阻隔的贵金属触点的半导体微机电系统（MEMS）开关。 MEMS开关完全集成到CMOS半导体制造线中。 集成技术，材料和工艺完全兼容铜芯片金属化工艺，通常是低成本和低温工艺（低于400℃）。 MEMS开关包括：在空腔内的可移动光束，可移动光束在光束的一端或两端锚定到空腔的壁; 嵌入可移动光束中的第一电极; 以及第二电极，其嵌入在所述空腔的壁中并且面向所述第一电极，其中所述第一和第二电极分别被所述贵金属接触物覆盖。

公开(公告)号：US20100178766A1

公开(公告)日：2010-07-15

申请号：US12352718

申请日：2009-01-13

Applicant: Paul S. Andry ,  John M. Cotte ,  Michael F. Lofaro ,  Edmund J. Sprogis ,  James A. Tornello ,  Cornelia K. Tsang

Inventor： Paul S. Andry ,  John M. Cotte ,  Michael F. Lofaro ,  Edmund J. Sprogis ,  James A. Tornello ,  Cornelia K. Tsang

IPC: H01L21/461

CPC classification number: H01L21/76898 ,  H01L23/481 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05184 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00

Abstract: An assembly including a main wafer having a body with a front side and a back side, and a handler wafer, is obtained. The main wafer has a plurality of blind electrical vias terminating above the back side. The blind electrical vias have conductive cores with surrounding insulator adjacent side and end regions of the cores. The handler wafer is secured to the front side of the body of the main wafer. An additional step includes exposing the blind electrical vias on the back side. The blind electrical vias are exposed to various heights across the back side. Another step involves applying a first chemical mechanical polish process to the back side, to open any of the surrounding insulator adjacent the end regions of the cores remaining after the exposing step, and to co-planarize the via conductive cores, the surrounding insulator adjacent the side regions of the cores, and the body of the main wafer. Further steps include etching the back side to produce a uniform standoff height of each of the vias across the back side; depositing a dielectric across the back side; and applying a second chemical mechanical polish process to the back side, to open the dielectric only adjacent the conductive cores of the vias.

Abstract translation: 获得包括具有前侧和后侧的主体的主晶片和处理器晶片的组件。 主晶片具有在背面上方终止的多个盲电通路。 盲电通孔具有导电芯，其周围绝缘体邻近芯的侧面和端部区域。 处理器晶片固定到主晶片的主体的前侧。 另外的步骤包括在背面暴露盲电通孔。 盲孔通过背面暴露于各种高度。 另一个步骤涉及将第一化学机械抛光工艺应用于背面，以便打开暴露步骤之后残留的芯的端部附近的任何周围的绝缘体，并且将通孔导电芯，邻近的绝缘体 芯的侧面区域和主晶片的主体。 进一步的步骤包括蚀刻背面以产生穿过背面的每个通路的均匀间隔高度; 在背面沉积电介质; 以及向后侧施加第二化学机械抛光工艺，以仅在通孔的导电芯附近打开电介质。

公开(公告)号：US07199450B2

公开(公告)日：2007-04-03

申请号：US10908480

申请日：2005-05-13

Applicant: Jon A. Casey ,  Michael Berger ,  Leena P. Buchwalter ,  Donald F. Canaperi ,  Raymond R. Horton ,  Anurag Jain ,  Eric D. Perfecto ,  James A. Tornello

Inventor： Jon A. Casey ,  Michael Berger ,  Leena P. Buchwalter ,  Donald F. Canaperi ,  Raymond R. Horton ,  Anurag Jain ,  Eric D. Perfecto ,  James A. Tornello

IPC: H01L29/06 ,  H01L23/58

CPC classification number: H01L23/147 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Sealing a via using a soventless, low viscosity, high temperature stable polymer or a high solids content polymer solution of low viscosity, where the polymeric material is impregnated within the via at an elevated temperature. A supply chamber is introduced to administer the polymeric material at an elevated temperature, typically at a temperature high enough to liquefy the polymeric material. The polymeric material is introduced through heated supply lines under force from a pump, piston, or a vacuum held within said supply chamber.

Abstract translation: 使用无粘性，低粘度，高温稳定的聚合物或低粘度的高固含量聚合物溶液密封通孔，其中聚合物材料在高温下浸渍在通孔内。 引入供应室以在升高的温度下施用聚合物材料，通常在高至足以液化聚合物材料的温度下。 聚合物材料通过来自泵，活塞或保持在所述供应室内的真空的力的加热供应管线引入。

公开(公告)号：US06503834B1

公开(公告)日：2003-01-07

申请号：US09677585

申请日：2000-10-03

Applicant: Xiaomeng Chen ,  Mahadevaiyer Krishnan ,  Judith M. Rubino ,  Carlos J. Sambucetti ,  Soon-Cheon Seo ,  James A. Tornello

Inventor： Xiaomeng Chen ,  Mahadevaiyer Krishnan ,  Judith M. Rubino ,  Carlos J. Sambucetti ,  Soon-Cheon Seo ,  James A. Tornello

IPC: H01L2144

CPC classification number: H01L21/76849 ,  H01L21/288

Abstract: The invention provides a process to increase the reliability of BEOL interconnects. The process comprises forming an array of conductors on a dielectric layer on a wafer substrate, polishing the upper surface so that the surfaces of the conductors are substantially co-planar with the upper surface of the dielectric layer, forming an alloy film on the upper surfaces of the conductors, and brush cleaning the upper surfaces of the conductors and the dielectric layer.

Abstract translation: 本发明提供了增加BEOL互连的可靠性的过程。 该方法包括在晶片衬底上的电介质层上形成导体阵列，抛光上表面，使得导体的表面与电介质层的上表面基本上共面，在上表面上形成合金膜 的导体，并刷清洁导体和电介质层的上表面。