公开(公告)号：US08026603B2

公开(公告)日：2011-09-27

申请号：US11408072

申请日：2006-04-21

Applicant: Yung-Yu Hsu ,  Chih-Yuan Cheng ,  Shyi-Ching Liau ,  Min-Lin Lee ,  Ra-Min Tain ,  Rong-Chang Feng

Inventor： Yung-Yu Hsu ,  Chih-Yuan Cheng ,  Shyi-Ching Liau ,  Min-Lin Lee ,  Ra-Min Tain ,  Rong-Chang Feng

IPC: H01L23/52

CPC classification number: H01L24/12 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/16 ,  H01L24/90 ,  H01L2224/1147 ,  H01L2224/11902 ,  H01L2224/13099 ,  H01L2224/1411 ,  H01L2224/16105 ,  H01L2224/16106 ,  H01L2224/16237 ,  H01L2224/81193 ,  H01L2224/81194 ,  H01L2224/81385 ,  H01L2224/81899 ,  H01L2924/01006 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H05K3/326 ,  H05K2201/0373 ,  H05K2201/209 ,  H01L2924/00

Abstract: An interconnect structure of an integrated circuit and manufacturing method therefore are provided, relating to an interconnect structure of flexible packaging. The interconnect structure includes a first and a second conductive pads. A plurality of tiny and conductive first pillars is respectively formed on the first and second pads. With different densities and thicknesses of the first and second pillars, a contact strength can be generated when the pillars interconnecting with each other, such that the pillars are connected closely. Furthermore, the interconnect structure can also be used to connect with fibers made of conductive materials. Moreover, the higher the density of the pillars, the stronger the contact strength. And, electronic substrates and active or passive electronic elements can be stuck on the other side of each pad. Therefore, the interconnect structure can maintain flexibility and have high reliability without being enhanced by any thermosetting polymer.

Abstract translation: 因此，提供了与柔性包装的互连结构相关的集成电路和制造方法的互连结构。 互连结构包括第一和第二导电焊盘。 多个微小且导电的第一支柱分别形成在第一和第二垫上。 当第一和第二支柱具有不同的密度和厚度时，当支柱互相连接时，可以产生接触强度，使得支柱紧密连接。 此外，互连结构也可以用于与由导电材料制成的纤维连接。 此外，支柱的密度越高，接触强度越强。 并且，电子基板和有源或无源电子元件可以卡在每个垫的另一侧上。 因此，互连结构可以保持柔性并且具有高可靠性，而不会被任何热固性聚合物增强。

公开(公告)号：US20110157775A1

公开(公告)日：2011-06-30

申请号：US12776442

申请日：2010-05-10

Applicant: Cheng-Liang Cheng ,  Chi-Lun Chen ,  Li-Duan Tsai ,  Min-Lin Lee ,  Shur-Fen Liu

Inventor： Cheng-Liang Cheng ,  Chi-Lun Chen ,  Li-Duan Tsai ,  Min-Lin Lee ,  Shur-Fen Liu

IPC: H01G9/00

CPC classification number: H01G9/15 ,  H01G9/008 ,  H01G9/28

Abstract: A decoupling device includes a lead frame, a capacitor unit, a metal layer, and a high dielectric organic-inorganic composite material layer. The lead frame includes a cathode terminal portion and an anode terminal portion. The capacitor unit is disposed on the lead frame. The capacitor unit includes a cathode portion, an anode portion, and an insulation portion located between the cathode portion and the anode portion. The cathode portion is electrically connected to the cathode terminal portion, and the anode portion is electrically connected to the anode terminal portion. The high dielectric organic-inorganic composite material layer is connected to the capacitor unit in parallel via the metal layer.

Abstract translation: 解耦装置包括引线框架，电容器单元，金属层和高介电有机 - 无机复合材料层。 引线框架包括阴极端子部分和阳极端子部分。 电容器单元设置在引线框架上。 电容器单元包括阴极部分，阳极部分和位于阴极部分和阳极部分之间的绝缘部分。 阴极部分电连接到阴极端子部分，并且阳极部分电连接到阳极端子部分。 高介电有机 - 无机复合材料层通过金属层并联连接到电容器单元。

公开(公告)号：US20090107717A1

公开(公告)日：2009-04-30

申请号：US12181330

申请日：2008-07-29

Applicant: Chien-Min Hsu ,  Shih-Hsien Wu ,  Shinn-Juh LAI ,  Min-Lin LEE

Inventor： Chien-Min Hsu ,  Shih-Hsien Wu ,  Shinn-Juh LAI ,  Min-Lin LEE

IPC: H05K1/11

CPC classification number: H05K1/112 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H05K1/0228 ,  H05K1/0231 ,  H05K1/0263 ,  H05K1/162 ,  H05K1/185 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09245 ,  H05K2201/09627 ,  H05K2201/09709 ,  H05K2201/10734 ,  H01L2224/05599

Abstract: An electrically conductive structure includes a first conductive structure and a second conductive structure. Each has a conducting section at one end and a coupling section at the other end. The first and second conducting sections are electrically connected to a power and ground contact of an electronic device, respectively. The first and second coupling sections are respectively connected with power and ground layer of a circuit board. The first coupling sections are connected with the first conducting section through first extending sections and the second coupling sections are connected with the second conducting section through second extending sections. At least two coupling sections of the conductive structures are arranged in pairs. The first conductive structure and the second conductive structure are arranged in a staggered array to form two wiring loops having opposite current directions, thereby generating a magnetic flux cancellation effect.

Abstract translation: 导电结构包括第一导电结构和第二导电结构。 每个在一端具有导电部分，另一端具有耦合部分。 第一和第二导电部分分别电连接到电子设备的电源和接地触点。 第一和第二耦合部分分别与电路板的电源层和接地层连接。 第一耦合部分通过第一延伸部分与第一导电部分连接，第二耦合部分通过第二延伸部分与第二导电部分连接。 导电结构的至少两个耦合部分成对布置。 第一导电结构和第二导电结构以交错阵列布置以形成具有相反电流方向的两个布线环，从而产生磁通消除效果。

公开(公告)号：US20090097175A1

公开(公告)日：2009-04-16

申请号：US12047283

申请日：2008-03-12

Applicant: Chen-Hsuan Chiu ,  Min-Lin Lee ,  Shinn-Juh Lai ,  Shih-Hsien Wu ,  Chi-Liang Pan

Inventor： Chen-Hsuan Chiu ,  Min-Lin Lee ,  Shinn-Juh Lai ,  Shih-Hsien Wu ,  Chi-Liang Pan

IPC: H02H9/00 ,  H01L27/02

CPC classification number: H01L23/60 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/3011 ,  H01L2224/05599

Abstract: An ESD protection substrate is disclosed. The ESD protection substrate includes a first conductor, a second conductor, a pointed structure, and an ESD protection material. The pointed structure is electrically connected to the first or the second conductor. The ESD protection material is disposed between the first and the second conductors.

Abstract translation: 公开了ESD保护衬底。 ESD保护衬底包括第一导体，第二导​​体，尖锐结构和ESD保护材料。 尖的结构电连接到第一或第二导体。 ESD保护材料设置在第一和第二导体之间。

公开(公告)号：US20070183131A1

公开(公告)日：2007-08-09

申请号：US11451292

申请日：2006-06-12

Applicant: Uei-Ming Jow ,  Chin-Sun Shyu ,  Chang-Sheng Chen ,  Min-Lin Lee ,  Shinn-Juh Lai

Inventor： Uei-Ming Jow ,  Chin-Sun Shyu ,  Chang-Sheng Chen ,  Min-Lin Lee ,  Shinn-Juh Lai

IPC: H04B3/28 ,  H05K9/00

CPC classification number: H05K1/0218 ,  H05K1/0224 ,  H05K1/0237 ,  H05K1/025 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K2201/0792 ,  H05K2201/09672

Abstract: A mirror image shielding structure is provided, which includes an electronic element and a ground shielding plane below the electronic element. The shape of the ground shielding plane is identical to the projection shape of the electronic element, and the horizontal size of the ground shielding plane is greater than or equal to that of the electronic element. Thus, the parasitic effect between the electronic element and the ground shielding plane is effectively reduced, and the vertical coupling effect between electronic elements is also reduced. Furthermore, the vertical impact on the signal integrity of the embedded elements caused by the layout of the transmission lines is prevented.

Abstract translation: 提供一种镜像屏蔽结构，其包括电子元件和电子元件下方的接地屏蔽平面。 接地屏蔽面的形状与电子元件的突出形状相同，接地屏蔽面的水平尺寸大于或等于电子元件的尺寸。 因此，有效地减小了电子元件与接地屏蔽层之间的寄生效应，并且电子元件之间的垂直耦合效应也降低。 此外，防止了由传输线的布局引起的对嵌入元件的信号完整性的垂直影响。

公开(公告)号：US20070128845A1

公开(公告)日：2007-06-07

申请号：US11408072

申请日：2006-04-21

Applicant: Yung-Yu Hsu ,  Chih-Yuan Chen ,  Shyi-Ching Liau ,  Min-Lin Lee ,  Ra-Min Tain ,  Rong-Chang Feng

Inventor： Yung-Yu Hsu ,  Chih-Yuan Chen ,  Shyi-Ching Liau ,  Min-Lin Lee ,  Ra-Min Tain ,  Rong-Chang Feng

IPC: H01L21/4763 ,  H01L23/48

CPC classification number: H01L24/12 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/16 ,  H01L24/90 ,  H01L2224/1147 ,  H01L2224/11902 ,  H01L2224/13099 ,  H01L2224/1411 ,  H01L2224/16105 ,  H01L2224/16106 ,  H01L2224/16237 ,  H01L2224/81193 ,  H01L2224/81194 ,  H01L2224/81385 ,  H01L2224/81899 ,  H01L2924/01006 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H05K3/326 ,  H05K2201/0373 ,  H05K2201/209 ,  H01L2924/00

Abstract: An interconnect structure of an integrated circuit and manufacturing method therefor are provided, relating to an interconnect structure of flexible packaging. The interconnect structure includes a first and a second conductive pads. A plurality of tiny and conductive first pillars is respectively formed on the first and second pads. With different densities and thicknesses of the first and second pillars, a contact strength can be generated when the pillars interconnecting with each other, such that the pillars are connected closely. Furthermore, the interconnect structure can also be used to connect with fibers made of conductive materials. Moreover, the higher the density of the pillars, the stronger the contact strength. And, electronic substrates and active or passive electronic elements can be stuck on the other side of each pad. Therefore, the interconnect structure can maintain flexibility and have high reliability without being enhanced by any thermosetting polymer.

Abstract translation: 提供了一种集成电路的互连结构及其制造方法，涉及柔性封装的互连结构。 互连结构包括第一和第二导电焊盘。 多个微小且导电的第一支柱分别形成在第一和第二垫上。 当第一和第二支柱具有不同的密度和厚度时，当支柱互相连接时，可以产生接触强度，使得支柱紧密连接。 此外，互连结构也可以用于与由导电材料制成的纤维连接。 此外，支柱的密度越高，接触强度越强。 并且，电子基板和有源或无源电子元件可以卡在每个垫的另一侧上。 因此，互连结构可以保持柔性并且具有高可靠性，而不会被任何热固性聚合物增强。

公开(公告)号：US20070062725A1

公开(公告)日：2007-03-22

申请号：US11470435

申请日：2006-09-06

Applicant: Shih-Hsien WU ,  Min-Lin LEE ,  Shinn-Juh LAY ,  Chi-Hao CHANG

Inventor： Shih-Hsien WU ,  Min-Lin LEE ,  Shinn-Juh LAY ,  Chi-Hao CHANG

IPC: H05K1/16 ,  H01G4/20 ,  H01G7/00

CPC classification number: H05K1/162 ,  H05K3/4611 ,  H05K2201/0209 ,  H05K2201/09309 ,  Y10T29/43 ,  Y10T29/49126

Abstract: An embedded capacitor core includes a first set of capacitors, a second set of capacitors, and an inter-layer dielectric film between the first set of capacitors and the second set of capacitors. The first set of capacitors includes: a first conductive pattern comprising at least two conductive electrodes; a second conductive pattern comprising at least two conductive electrodes corresponding to the two conductive electrodes of the first conductive pattern; and a first dielectric film between the first conductive pattern and the second conductive pattern. The second set of capacitors includes: a third conductive pattern comprising at least two conductive electrodes; a fourth conductive pattern comprising at least two conductive electrodes corresponding to the two conductive electrodes of the fourth conductive pattern; and a second dielectric film between the third conductive pattern and the fourth conductive pattern.

Abstract translation: 嵌入式电容器芯包括第一组电容器，第二组电容器和在第一组电容器和第二组电容器之间的层间电介质膜。 第一组电容器包括：包括至少两个导电电极的第一导电图案; 第二导电图案，包括对应于第一导电图案的两个导电电极的至少两个导电电极; 以及在第一导电图案和第二导电图案之间的第一电介质膜。 第二组电容器包括：包括至少两个导电电极的第三导电图案; 第四导电图案，包括对应于第四导电图案的两个导电电极的至少两个导电电极; 以及在第三导电图案和第四导电图案之间的第二电介质膜。

公开(公告)号：US08304666B2

公开(公告)日：2012-11-06

申请号：US12468058

申请日：2009-05-19

Applicant: Cheng-Ta Ko ,  Min-Lin Lee ,  Wei-Chung Lo ,  Shur-Fen Liu ,  Jinn-Shing King ,  Shinn-Juh Lai ,  Yu-Hua Chen

Inventor： Cheng-Ta Ko ,  Min-Lin Lee ,  Wei-Chung Lo ,  Shur-Fen Liu ,  Jinn-Shing King ,  Shinn-Juh Lai ,  Yu-Hua Chen

IPC: H05K1/11

CPC classification number: H05K1/0222 ,  H05K3/429 ,  H05K2201/09636 ,  H05K2201/09645 ,  H05K2201/09809

Abstract: A plurality of coaxial leads is made within a single via in a circuit substrate to enhance the density of vertical interconnection so as to match the demand for higher density multi-layers circuit interconnection between top circuit layer and bottom circuit layer of the substrate. Coaxial leads provide electromagnetic interference shielding among the plurality of coaxial leads in a single via.

Abstract translation: 多个同轴引线在电路基板中的单个通孔内形成，以增强垂直互连的密度，以便匹配在衬底的顶层电路层和底层电路层之间的较高密度多层电路互连的需求。 同轴引线在单个通孔中提供多个同轴引线之间的电磁干扰屏蔽。

公开(公告)号：US08125761B2

公开(公告)日：2012-02-28

申请号：US12390237

申请日：2009-02-20

Applicant: Chien-Min Hsu ,  Min-Lin Lee ,  Shinn-Juh Lai ,  Chen-Hsuan Chiu

Inventor： Chien-Min Hsu ,  Min-Lin Lee ,  Shinn-Juh Lai ,  Chen-Hsuan Chiu

IPC: H01G4/00

CPC classification number: H01G4/005 ,  H01G4/228 ,  H01L2224/16225 ,  H05K1/0231 ,  H05K1/0298 ,  H05K1/112 ,  H05K1/162 ,  H05K3/429 ,  H05K2201/09309 ,  H05K2201/09672 ,  H05K2201/09845 ,  H05K2201/10734

Abstract: A capacitive module is provided. The capacitive module may include a first capacitor including a first electrode and a second electrode, one of the first electrode and the second electrode being coupled to at least one first conductive via and the other one of the first electrode and the second electrode being coupled to at least one second conductive via. The capacitive module may also include a second capacitor spaced apart from the first capacitor, the second capacitor including a third electrode and a fourth electrode, one of the third electrode and the fourth electrode being coupled to the at least one first conductive via and the other one of the third electrode and the fourth electrode being coupled to the at least one second conductive via. Furthermore, the capacitive module may include a first conductive plane being electrically coupled to a first plane with a first polarity through one of the at least one first conductive via and a second conductive plane being electrically coupled to a second plane with a second polarity, opposite to the first polarity, through one of the at least one second conductive via.

Abstract translation: 提供电容模块。 电容性模块可以包括包括第一电极和第二电极的第一电容器，第一电极和第二电极中的一个耦合到至少一个第一导电通孔，而第一电极和第二电极中的另一个耦合到 至少一个第二导电通孔。 电容性模块还可以包括与第一电容器间隔开的第二电容器，第二电容器包括第三电极和第四电极，第三电极和第四电极中的一个耦合到至少一个第一导电通孔和另一个 第三电极和第四电极中的一个耦合到至少一个第二导电通孔。 此外，电容性模块可以包括第一导电平面，其通过第一导电通孔中的一个与第一极性电耦合到第一平面，第二导电平面电耦合到具有第二极性的第二平面， 通过至少一个第二导电通孔中的一个延伸到第一极性。

公开(公告)号：US08049512B2

公开(公告)日：2011-11-01

申请号：US11882814

申请日：2007-08-06

Applicant: Uei-Ming Jow ,  Min-Lin Lee ,  Shinn-Juh Lai ,  Chin-Sun Shyu ,  Chang-Sheng Chen ,  Ying-Jiunn Lai

Inventor： Uei-Ming Jow ,  Min-Lin Lee ,  Shinn-Juh Lai ,  Chin-Sun Shyu ,  Chang-Sheng Chen ,  Ying-Jiunn Lai

IPC: G01R31/11

CPC classification number: G01R31/2818 ,  G01R31/2813 ,  G01R31/2839 ,  H05K1/0268 ,  H05K1/0298 ,  H05K1/16 ,  H05K3/46 ,  H05K2203/162 ,  Y10T29/49004

Abstract: A circuit board with embedded components includes a plurality of embedded components and at least one transmission line electrically connected to at least one of the embedded components and having a terminal circuit. Therefore, a measuring device is used to be electrically connected to the transmission line and send out a signal, so as to receive a corresponding reflected signal, and then, compare the received reflected signal with a signal pattern in the database to obtain an electrical parameter of the embedded component.

Abstract translation: 具有嵌入式组件的电路板包括多个嵌入式组件和至少一个电连接到至少一个嵌入式组件并具有终端电路的传输线。 因此，使用测量装置电连接到传输线并发出信号以接收对应的反射信号，然后将接收的反射信号与数据库中的信号模式进行比较，以获得电参数 的嵌入式组件。