公开(公告)号：US20090057799A1

公开(公告)日：2009-03-05

申请号：US12229651

申请日：2008-08-26

Applicant: Chang-Yueh Chan ,  Chih-Ming Huang ,  Chien-Ping Huang ,  Chin-Huang Chang ,  Cheng-Hsu Hsiao

Inventor： Chang-Yueh Chan ,  Chih-Ming Huang ,  Chien-Ping Huang ,  Chin-Huang Chang ,  Cheng-Hsu Hsiao

IPC: H01L31/00 ,  H01L21/00

CPC classification number: H01L31/0203 ,  H01L31/02164 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/1815 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A sensor semiconductor device and a method for fabricating the same are provided. At least one sensor chip is mounted and electrically connected to a lead frame. A first and a second encapsulation molding processes are sequentially performed to form a transparent encapsulant for encapsulating the sensor chip and a part of the lead frame and to form a light-impervious encapsulant for encapsulating the transparent encapsulant. The transparent encapsulant has a light-pervious portion formed at a position corresponding to and above a sensor zone of the sensor chip. The light-pervious portion is exposed from the light-impervious encapsulant. Light may penetrate the light-pervious portion, without using an additional cover board, thereby reducing manufacturing steps and costs. The above arrangement avoids prior-art problems of poor reliability caused by a porous encapsulant and poor signal reception caused by interference of ambient light entering into a conventional chip only encapsulated by a transparent encapsulant.

Abstract translation: 提供一种传感器半导体器件及其制造方法。 至少一个传感器芯片被安装并电连接到引线框架。 依次执行第一和第二封装成型工艺以形成用于封装传感器芯片和引线框架的一部分的透明密封剂，并形成用于封装透明密封剂的不透光密封剂。 透明密封剂具有形成在对应于传感器芯片的传感器区域上方的位置处的透光部分。 透光部分从不透光的密封剂暴露出来。 光可以穿透透光部分，而不使用附加的盖板，从而减少制造步骤和成本。 上述布置避免了由多孔密封剂引起的可靠性差的现有技术问题，以及由仅通过透明密封剂封装的传统芯片的环境光的干扰引起的差信号接收。

公开(公告)号：US20080283982A1

公开(公告)日：2008-11-20

申请号：US12152802

申请日：2008-05-15

Applicant: Chung-Lun Liu ,  Chin-Huang Chang ,  Chien-Ping Huang ,  Chang-Yueh Chan ,  Chih-Ming Huang

Inventor： Chung-Lun Liu ,  Chin-Huang Chang ,  Chien-Ping Huang ,  Chang-Yueh Chan ,  Chih-Ming Huang

IPC: H01L21/58 ,  H01L23/495

CPC classification number: H05K1/141 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/81801 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/3421 ,  H05K3/3436 ,  H05K2201/1034 ,  H05K2201/10659 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention proposes a multi-chip semiconductor device having leads and a method for fabricating the same. The method includes the steps of: providing a substrate having a plurality of connection pads disposed on a surface thereof; mounting a plurality of semiconductor chips on the surface of the substrate, and electrically connecting the semiconductor chips to the surface of the substrate; forming an encapsulant on the substrate to encapsulate the semiconductor chips and expose the connection pads to form a package unit; and providing a lead frame having a plurality of leads, and electrically connecting the connection pads exposed from the package unit to the leads of the lead frame to form a multi-chip semiconductor device having leads, thereby forming a multi-chip semiconductor device having leads. By the multi-chip semiconductor device and the method for fabricating the same as proposed in the present invention, problems like poor reliability caused by stress induced by several types of materials in a semiconductor package into which a substrate and leads are integrated, moisture absorption by an encapsulated substrate, and cracks developed as a result of moisture absorption by the substrate can be avoided.

Abstract translation: 本发明提出一种具有引线的多芯片半导体器件及其制造方法。 该方法包括以下步骤：提供具有设置在其表面上的多个连接焊盘的基板; 将多个半导体芯片安装在所述基板的表面上，并且将所述半导体芯片电连接到所述基板的表面; 在衬底上形成密封剂以封装半导体芯片并暴露连接焊盘以形成封装单元; 并且提供具有多个引线的引线框架，并且将从封装单元暴露的连接焊盘电连接到引线框架的引线以形成具有引线的多芯片半导体器件，从而形成具有引线的多芯片半导体器件 。 通过本发明中提出的多芯片半导体器件及其制造方法，由半导体封装中由几种材料引起的应力引起的可靠性差的问题，其中衬底和引线被集成到其中，由于 可以避免被封装的基材和由于基材吸湿而显影的裂纹。

公开(公告)号：US20080251910A1

公开(公告)日：2008-10-16

申请号：US12082718

申请日：2008-04-11

Applicant: Chih-Wei Chang ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Chun-Ming Liao ,  Cheng-Hsu Hsiao

Inventor： Chih-Wei Chang ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Chun-Ming Liao ,  Cheng-Hsu Hsiao

IPC: H01L23/36 ,  H01L21/56

CPC classification number: H01L21/56 ,  H01L23/4334 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/01079

Abstract: A method for fabricating semiconductor packages is disclosed, including mounting and electrically connecting a semiconductor chip onto a chip carrier; mounting a heat-dissipating structure on the semiconductor chip; placing the heat-dissipating structure into a mold cavity for filling therein a packaging material to form an encapsulant, wherein the heat-dissipating structure has a heat spreader having a size larger than that of the predetermined size of the semiconductor package, a covering layer formed on the, and a plurality of protrusions formed on edges of the covering layer that are free from being corresponding in position to the semiconductor chip, such that the protrusions can abut against a top surface of the mold cavity to prevent the heat spreader from being warped; and finally performing a singulation process according to the predetermined size and removing the encapsulant formed on the covering layer to form the desired semiconductor package. Also, this invention discloses a heat-dissipating structure applicable to the method described above.

Abstract translation: 公开了一种用于制造半导体封装的方法，包括将半导体芯片安装并电连接到芯片载体上; 在半导体芯片上安装散热结构; 将散热结构放置在模腔中，用于在其中填充包装材料以形成密封剂，其中散热结构具有尺寸大于半导体封装的预定尺寸的散热器，形成覆盖层 以及在覆盖层的边缘上形成的多个突起，其不与半导体芯片的位置相对应，使得突起可抵靠模腔的顶表面以防止散热器翘曲 ; 最后按照规定的尺寸进行分割处理，除去覆盖层上形成的密封剂，形成所需的半导体封装。 此外，本发明公开了一种适用于上述方法的散热结构。

公开(公告)号：US20080182401A1

公开(公告)日：2008-07-31

申请号：US12060379

申请日：2008-04-01

Applicant: Chun-Chi Ke ,  Kook-Jui Tai ,  Chien-Ping Huang

Inventor： Chun-Chi Ke ,  Kook-Jui Tai ,  Chien-Ping Huang

IPC: H01L21/44

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/1147 ,  H01L2224/13022 ,  H01L2224/13027 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/14104 ,  H01L2924/0001 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/013

Abstract: A semiconductor device and a fabrication method thereof are provided. A semiconductor substrate having a plurality of bonding pads is prepared, and a first passivation layer, a second passivation layer and a metallic layer are successively formed on the semiconductor substrate. A third passivation layer is further applied on the semiconductor substrate and has a plurality of openings for exposing a portion of the metallic layer, wherein each of the openings is shifted in position from a corresponding one of the bonding pads by a distance not exceeding a radius of the bonding pad. A plurality of solder bumps are bonded to the exposed portion of the metallic layer and have a larger contact area with the third passivation layer. This provides better buffer to reduce stress exerted on the solder bumps, thereby preventing problems of cracking and delamination as in the prior art.

Abstract translation: 提供半导体器件及其制造方法。 制备具有多个接合焊盘的半导体衬底，并且在半导体衬底上依次形成第一钝化层，第二钝化层和金属层。 第三钝化层进一步施加在半导体衬底上并且具有用于暴露金属层的一部分的多个开口，其中每个开口从对应的一个焊盘移位一定距离不超过半径 的焊盘。 多个焊料凸点与金属层的露出部分接合，并且与第三钝化层具有较大的接触面积。 这提供了更好的缓冲器以减少施加在焊料凸块上的应力，从而防止了现有技术中的开裂和分层问题。

公开(公告)号：US20080122070A1

公开(公告)日：2008-05-29

申请号：US11986359

申请日：2007-11-21

Applicant: Wen-Tsung Tseng ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Chih-Wei Chang ,  Cheng-Hsu Hsiao

Inventor： Wen-Tsung Tseng ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Chih-Wei Chang ,  Cheng-Hsu Hsiao

IPC: H01L23/373 ,  H01L21/58

CPC classification number: H01L23/3128 ,  H01L21/568 ,  H01L23/4334 ,  H01L24/16 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/16152 ,  H01L2224/0401

Abstract: A heat dissipating semiconductor package and a fabrication method therefor are provided. The fabrication method for the heat dissipating semiconductor package mainly includes steps of: containing a substrate having a chip mounted thereon in an aperture of a carrier; mounting a heat dissipating sheet having supporting portions on the carrier with the heat dissipating sheet being attached on the chip; forming an encapsulant to encapsulate the semiconductor chip and the heat dissipating structure; removing a part of the encapsulant above the heat dissipating sheet with a part of the heat dissipating sheet exposed from the encapsulant by lapping; and forming a cover layer on the part of heat dissipating sheet to prevent it from oxidation; and cutting along a predetermined size of the semiconductor package, thereby heat generated from an operation of the chip is dissipated via the heat dissipating structure.

Abstract translation: 提供一种散热半导体封装及其制造方法。 用于散热半导体封装的制造方法主要包括以下步骤：将载置有孔的芯片安装在其上; 将散热板安装在载体上，并将散热板安装在芯片上; 形成密封剂以封装半导体芯片和散热结构; 通过研磨从所述密封剂暴露出的部分所述散热片去除所述散热片上方的所述密封剂的一部分; 在散热片的一部分上形成覆盖层以防止其氧化; 并且沿着预定尺寸的半导体封装进行切割，由此从芯片的操作产生的热量经由散热结构消散。

公开(公告)号：US07371617B2

公开(公告)日：2008-05-13

申请号：US11580736

申请日：2006-10-12

Applicant: Ho-Yi Tsai ,  Chien-Ping Huang

Inventor： Ho-Yi Tsai ,  Chien-Ping Huang

IPC: H01L21/00

CPC classification number: H01L23/4334 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0401

Abstract: A semiconductor package with a heat sink and a method for fabricating the same are proposed. The heat sink is provided with a rigid and thermally resistant detach member on a top surface thereof, and is attached via its bottom surface to a chip mounted on a chip carrier. The detach member is sized larger than the heat sink and can be easily removed from the top surface of the heat sink. Subsequently, a molding process is performed to form an encapsulant for completely encapsulating the chip, the heat sink and the detach member. Then, a singulation process is performed to cut along predetermined cutting lines located between sides of the heat sink and corresponding sides of the detach member. Finally, the detach member and a portion of the encapsulant formed on the detach member are removed from the heat sink. The above fabrication method reduces the packaging cost.

Abstract translation: 提出了具有散热器的半导体封装及其制造方法。 散热器在其顶表面上设置有刚性且耐热的分离构件，并且经由其底表面附接到安装在芯片载体上的芯片。 分离构件的尺寸大于散热器，并且可以容易地从散热器的顶表面去除。 随后，进行模制处理以形成用于完全封装芯片，散热器和分离构件的密封剂。 然后，进行切割处理，以沿着位于散热片的侧面和分离构件的相应侧面之间的预定切割线切割。 最后，分离构件和形成在分离构件上的密封剂的一部分从散热器移除。 上述制造方法降低了包装成本。

公开(公告)号：US07358177B2

公开(公告)日：2008-04-15

申请号：US11190271

申请日：2005-07-26

Applicant: Chun-Chi Ke ,  Chien-Ping Huang

Inventor： Chun-Chi Ke ,  Chien-Ping Huang

IPC: H01L21/44

CPC classification number: H01L24/03 ,  H01L2224/0401 ,  H01L2224/73204 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014

Abstract: A fabrication method of under bump metallurgy (UBM) structure is provided. A blocking layer is applied over a surface of a semiconductor element formed with at least one bond pad and a passivation layer thereon. The passivation layer covers the semiconductor element and exposes the bond pad, and the blocking layer covers the bond pad and the passivation layer. The blocking layer is formed with at least one opening at a position corresponding to the bond pad. Metallic layers are formed on a surface of the blocking layer and at the opening. The metallic layers are patterned to form a UBM structure at the opening corresponding to the bond pad. Then the blocking layer is removed. The blocking layer can separate the metallic layers for forming the UBM structure from the passivation layer to prevent metallic residues of the UBM structure from being left on the passivation layer.

Abstract translation: 提供了一种凸块下冶金（UBM）结构的制造方法。 在其上形成有至少一个接合焊盘和钝化层的半导体元件的表面上施加阻挡层。 钝化层覆盖半导体元件并暴露接合焊盘，并且阻挡层覆盖接合焊盘和钝化层。 阻挡层在对应于接合焊盘的位置处形成有至少一个开口。 金属层形成在阻挡层的表面和开口处。 金属层被图案化以在对应于接合焊盘的开口处形成UBM结构。 然后去除阻挡层。 阻挡层可以将用于形成UBM结构的金属层与钝化层分开，以防止UBM结构的金属残留物残留在钝化层上。

公开(公告)号：US20070296079A1

公开(公告)日：2007-12-27

申请号：US11818225

申请日：2007-06-12

Applicant: Chien-Ping Huang ,  Han-Ping Pu ,  Ho-Yi Tsai

Inventor： Chien-Ping Huang ,  Han-Ping Pu ,  Ho-Yi Tsai

IPC: H01L23/34 ,  H01L21/58

CPC classification number: H01L23/4334 ,  H01L23/3121 ,  H01L24/48 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/1815 ,  H01L2924/18165 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A heat sink package structure and a method for fabricating the same are disclosed. The method includes mounting and electrically connecting a semiconductor chip to a chip carrier, forming an interface layer or a second heat dissipating element having the interface layer on the semiconductor chip and installing a first heat dissipating element having a heat dissipating portion and a supporting portion onto the chip carrier. The method further includes forming openings corresponding to the semiconductor chip in the heat dissipating portion, and forming an encapsulant for covering the semiconductor chip, the interface layer or the second heat dissipating element, and the first heat dissipating element. A height is reserved on top of the interface layer for the formation of the encapsulant for covering the interface layer. The method further includes cutting the encapsulant along edges of the interface layer, and removing the redundant encapsulant on the interface layer. Therefore, the drawbacks of the prior art of the burrs caused by a cutting tool for cutting the heat dissipating element and wearing of the cutting tool are overcome.

Abstract translation: 公开了一种散热器封装结构及其制造方法。 该方法包括将半导体芯片安装并电连接到芯片载体，在半导体芯片上形成具有界面层的界面层或第二散热元件，并将具有散热部分和支撑部分的第一散热元件安装到 芯片载体。 该方法还包括形成对应于散热部分中的半导体芯片的开口，以及形成用于覆盖半导体芯片，界面层或第二散热元件的密封剂和第一散热元件。 在接口层顶部保留一个高度，用于形成覆盖界面层的密封剂。 该方法还包括沿着界面层的边缘切割密封剂，以及去除界面层上的冗余密封剂。 因此，克服了用于切割散热元件的切削工具和切削工具的磨损引起的毛刺现有技术的缺陷。

公开(公告)号：US20070164411A1

公开(公告)日：2007-07-19

申请号：US11603687

申请日：2006-11-21

Applicant: Chien-Ping Huang ,  Chin-Huang Chang

Inventor： Chien-Ping Huang ,  Chin-Huang Chang

IPC: H01L23/02

CPC classification number: H01L23/49811 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/4951 ,  H01L23/49531 ,  H01L23/49548 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/4826 ,  H01L2224/4911 ,  H01L2224/73215 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19106 ,  H01L2924/19107 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package structure and a fabrication method thereof are provided. The fabrication method includes providing a semiconductor chip having an active surface, a inactive surface, and a plurality of bond pads formed on the active surface; coupling one or more substrates to the active surface in such a way that the bond pads are exposed through one or more openings in the one or more substrates and/or gaps between the substrates to electrically connect the bond pads to the substrate; attaching and electrically connecting the semiconductor chip to a leadframe having a plurality of leads; and encapsulating the semiconductor chip, the substrate, and the leadframe with an encapsulant, with at least bottom surfaces of the leads of the leadframe being exposed from the encapsulant. An indented structure is therefore formed on the bottom surface of an inner portion of each of the leads of the leadframe.

Abstract translation: 提供半导体封装结构及其制造方法。 制造方法包括提供具有活性表面，非活性表面和形成在活性表面上的多个接合焊盘的半导体芯片; 将一个或多个衬底耦合到有源表面，使得接合焊盘通过衬底中的一个或多个衬底和/或间隙中的一个或多个开口暴露以将接合焊盘电连接到衬底; 将所述半导体芯片附接并电连接到具有多个引线的引线框架; 以及用密封剂封装半导体芯片，衬底和引线框架，至少引线框架的引线的底表面从密封剂露出。 因此，在引线框架的每个引线的内部的底表面上形成凹陷结构。

公开(公告)号：US20070145561A1

公开(公告)日：2007-06-28

申请号：US11643147

申请日：2006-12-20

Applicant: Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

Inventor： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

IPC: H01L23/02

CPC classification number: H01L23/3121 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/3025 ,  H05K3/284 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/0989 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00

Abstract: An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.

Abstract translation: 提供电子载体板及其封装结构。 电子载板包括载体，形成在载体上的至少一对接合焊盘和覆盖载体的保护层。 保护层形成有用于暴露接合焊盘的开口。 在成对的接合焊盘之间形成有一个沟槽，其长度大于安装在成对接合焊盘上的电子部件的宽度。 该沟槽与一对接合焊盘相邻，并与该接合焊盘露出的相应的一个开口连通。 因此，电子部件和电子载体板之间的间隙可以有效地填充用于封装电子部件的绝缘树脂，从而防止成对焊盘之间的空隙和不期望的电桥发生。