-
公开(公告)号：US08093105B2
公开(公告)日：2012-01-10
申请号：US13113960
申请日：2011-05-23
CPC分类号： H01L21/563 , C08G59/42 , C08L63/00 , H01L23/293 , H01L24/29 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/73203 , H01L2224/83102 , H01L2224/92125 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01033 , H01L2924/14 , H01L2924/1433 , Y10T428/31515 , H01L2924/3512 , H01L2924/00 , H01L2224/05599
摘要： An underfill composition is formulated to increase the surface tension thereof for use in capillary underfilling of an integrated circuit die that is coupled to a mounting substrate. A method includes mixing a surface tension-increasing additive with a bulk polymer and a hardener and allowing the underfill composition to flow between the integrated circuit die and the mounting substrate. An article is achieved by the method. The article can be assembled into a computing system.
摘要翻译： 配制底部填充剂组合物以增加其表面张力，以用于耦合到安装基底的集成电路管芯的毛细管底部填充。 一种方法包括将表面张力增加添加剂与本体聚合物和固化剂混合并使底层填料组合物在集成电路管芯和安装基板之间流动。 通过该方法实现文章。 该文章可以组装成一个计算系统。
-
42.发明授权Capillary-flow underfill compositions, packages containing same, and systems containing same 有权毛细管底部填充组合物，含有它们的包装和含有它们的体系公开(公告)号：US07948090B2
公开(公告)日：2011-05-24
申请号：US11613805
申请日：2006-12-20
CPC分类号： H01L21/563 , C08G59/42 , C08L63/00 , H01L23/293 , H01L24/29 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/73203 , H01L2224/83102 , H01L2224/92125 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01033 , H01L2924/14 , H01L2924/1433 , Y10T428/31515 , H01L2924/3512 , H01L2924/00 , H01L2224/05599
摘要： An underfill composition is formulated to increase the surface tension thereof for use in capillary underfilling of an integrated circuit die that is coupled to a mounting substrate. A method includes mixing a surface tension-increasing additive with a bulk polymer and a hardener and allowing the underfill composition to flow between the integrated circuit die and the mounting substrate. An article is achieved by the method. The article can be assembled into a computing system.
摘要翻译： 配制底部填充剂组合物以增加其表面张力，以用于耦合到安装基底的集成电路管芯的毛细管底部填充。 一种方法包括将表面张力增加添加剂与本体聚合物和固化剂混合并使底层填料组合物在集成电路管芯和安装基板之间流动。 通过该方法实现文章。 该文章可以组装成一个计算系统。
-
43.发明授权公开(公告)号：US07479449B2
公开(公告)日：2009-01-20
申请号：US11856265
申请日：2007-09-17
申请人： Saikumar Jayaraman
发明人： Saikumar Jayaraman
IPC分类号： H01L21/4763
CPC分类号： C08G69/42 , C08G59/504 , H01L21/563 , H01L23/293 , H01L23/296 , H01L23/3128 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/00014 , H01L2924/00 , H01L2224/0401
摘要： A method including introducing a composition including a siloxane-based aromatic diamine in a flowable state between a first substrate including a first set of contact points and a second substrate including a second set of contact points coupled to the first substrate through interconnections between a portion of the first set of contact points a portion of the second set of contact points; and curing the composition.
摘要翻译： 一种方法，包括在包括第一组接触点的第一基板和包括第二组接触点的第二基板之间以可流动状态引入包含基于硅氧烷的芳族二胺的组合物，所述第二组接触点通过第一组接触点的一部分 所述第一组接触点是所述第二组接触点的一部分; 并固化组合物。
-
44.发明申请CAPILLARY-FLOW UNDERFILL COMPOSITIONS, PACKAGES CONTAINING SAME, AND SYSTEMS CONTAINING SAME 有权毛细管流下的组合物，含有该组合物的组合物，以及含有该组合物的组合物公开(公告)号：US20080150170A1
公开(公告)日：2008-06-26
申请号：US11613805
申请日：2006-12-20
CPC分类号： H01L21/563 , C08G59/42 , C08L63/00 , H01L23/293 , H01L24/29 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/73203 , H01L2224/83102 , H01L2224/92125 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01033 , H01L2924/14 , H01L2924/1433 , Y10T428/31515 , H01L2924/3512 , H01L2924/00 , H01L2224/05599
摘要： An underfill composition is formulated to increase the surface tension thereof for use in capillary underfilling of an integrated circuit die that is coupled to a mounting substrate. A method includes mixing a surface tension-increasing additive with a bulk polymer and a hardener and allowing the underfill composition to flow between the integrated circuit die and the mounting substrate. An article is achieved by the method. The article can be assembled into a computing system.
摘要翻译： 配制底部填充剂组合物以增加其表面张力，以用于耦合到安装基底的集成电路管芯的毛细管底部填充。 一种方法包括将表面张力增加添加剂与本体聚合物和固化剂混合并使底层填料组合物在集成电路管芯和安装基板之间流动。 通过该方法实现文章。 该文章可以组装成一个计算系统。
-
45.发明申请STRESS-RELIEF LAYERS AND STRESS-COMPENSATION COLLARS WITH LOW-TEMPERATURE SOLDERS FOR BOARD-LEVEL JOINTS, AND PROCESSES OF MAKING SAME 有权用于板级接头的低温焊料的应力缓和层和应力补偿胶料及其制造方法公开(公告)号：US20070190772A1
公开(公告)日：2007-08-16
申请号：US11736280
申请日：2007-04-17
申请人： Daewoong Suh , Saikumar Jayaraman , Stephen Lehman , Mitesh Patel , Tiffany Byrne , Eward Martin , Mohd Erwan Basiron , Wei Loh , Sheau Lim , Yoong Tatt Chin
发明人： Daewoong Suh , Saikumar Jayaraman , Stephen Lehman , Mitesh Patel , Tiffany Byrne , Eward Martin , Mohd Erwan Basiron , Wei Loh , Sheau Lim , Yoong Tatt Chin
IPC分类号： H01L21/44
CPC分类号： H05K3/3436 , H01L23/562 , H01L24/16 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/056 , H01L2224/16 , H01L2924/00014 , H01L2924/01012 , H01L2924/01025 , H01L2924/01046 , H01L2924/01057 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H05K1/0271 , H05K3/3463 , H05K2201/10977 , H05K2203/0126 , Y02P70/613 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a low melting-point solder bump that is disposed upon the lower surface. The stress-relief layer flows against the low melting-point solder bump. A stress-compensation collar is formed on a board to which the substrate is mated, and the stress-compensation collar partially embeds the low melting-point solder bump. An article that exhibits a stress-relief layer and a stress-compensation collar is also included. A computing system that includes the low melting-point solder, the stress-relief layer, and the stress-compensation collar is also included.
摘要翻译： 通过在基底下表面上分配聚合物以部分地嵌入设置在下表面上的低熔点焊料凸点的条件来形成应力消除层。 应力消除层流向低熔点焊料凸块。 应力补偿轴环形成在与基板相配合的基板上，并且应力补偿套环部分嵌入低熔点焊料凸块。 还包括展示应力消除层和应力补偿套环的物品。 还包括包括低熔点焊料，应力消除层和应力补偿环的计算系统。
-
公开(公告)号：US07253088B2
公开(公告)日：2007-08-07
申请号：US10954999
申请日：2004-09-29
申请人： Daewoong Suh , Saikumar Jayaraman , Stephen E. Lehman , Mitesh Patel , Tiffany A. Byrne , Edward L. Martin , Mohd Erwan B. Basiron , Wei Keat Loh , Sheau Hooi Lim , Yoong Tatt P. Chin
发明人： Daewoong Suh , Saikumar Jayaraman , Stephen E. Lehman , Mitesh Patel , Tiffany A. Byrne , Edward L. Martin , Mohd Erwan B. Basiron , Wei Keat Loh , Sheau Hooi Lim , Yoong Tatt P. Chin
IPC分类号： H01L21/44
CPC分类号： H05K3/3436 , H01L23/562 , H01L24/16 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/056 , H01L2224/16 , H01L2924/00014 , H01L2924/01012 , H01L2924/01025 , H01L2924/01046 , H01L2924/01057 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H05K1/0271 , H05K3/3463 , H05K2201/10977 , H05K2203/0126 , Y02P70/613 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a low melting-point solder bump that is disposed upon the lower surface. The stress-relief layer flows against the low melting-point solder bump. A stress-compensation collar is formed on a board to which the substrate is mated, and the stress-compensation collar partially embeds the low melting-point solder bump. An article that exhibits a stress-relief layer and a stress-compensation collar is also included. A computing system that includes the low melting-point solder, the stress-relief layer, and the stress-compensation collar is also included.
-
47.发明申请Wafer-level processing of chip-packaging compositions including bis-maleimides 有权晶片级处理包括双马来酰亚胺的芯片封装组合物公开(公告)号：US20070155047A1
公开(公告)日：2007-07-05
申请号：US11323300
申请日：2005-12-30
申请人： Saikumar Jayaraman , Stephen Lehman
发明人： Saikumar Jayaraman , Stephen Lehman
IPC分类号： H01L21/00
CPC分类号： H01L21/561 , C08G73/12 , H01L21/563 , H01L23/293 , H01L24/29 , H01L2224/05556 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/274 , H01L2224/29109 , H01L2224/29111 , H01L2224/2919 , H01L2224/73104 , H01L2224/73204 , H01L2224/81193 , H01L2224/83191 , H01L2224/83193 , H01L2224/83856 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01082 , H01L2924/0132 , H01L2924/04953 , H01L2924/14 , H01L2924/1433 , H01L2924/181 , H01L2924/19041 , H01L2924/351 , H01L2924/01083 , H01L2924/3512 , H01L2924/00 , H01L2924/00015 , H01L2224/05599
摘要： A process of packaging a microelectronic chip includes wafer-level application of a chip-packaging composition that includes a polymer of a bis-maleimide. A process includes wafer-level addition of the chip-packaging compositions that include adding particulate fillers to achieve a coefficient of thermal expansion of about 20 ppm/K. A computing system is also included that uses a microelectronic die that was processed with the bis-maleimide at the wafer level, before singulation.
摘要翻译： 包装微电子芯片的方法包括晶片级应用包含双马来酰亚胺聚合物的芯片封装组合物。 一种方法包括晶片级添加芯片封装组合物，其包括添加颗粒填料以获得约20ppm / K的热膨胀系数。 还包括一种计算系统，其在分割之前使用在晶片级用双马来酰亚胺处理的微电子管芯。
-
48.发明申请Chip-packaging compositions including bis-maleimides, packages made therewith, and methods of assembling same 审中-公开包含双马来酰亚胺的芯片包装组合物，由其制成的包装及其组装方法公开(公告)号：US20070152311A1
公开(公告)日：2007-07-05
申请号：US11323475
申请日：2005-12-30
申请人： Saikumar Jayaraman , Stephen Lehman
发明人： Saikumar Jayaraman , Stephen Lehman
CPC分类号： H01L23/293 , H01L21/563 , H01L23/3121 , H01L23/3737 , H01L24/48 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48472 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2924/00014 , H01L2924/01019 , H01L2924/14 , H01L2924/1433 , H01L2924/16152 , H01L2924/181 , H01L2924/19041 , H01L2924/00 , H01L2224/05599 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A chip-packaging composition includes a polymer of a bis-maleimide. A process includes formation of the chip-packaging composition including adding particulate fillers to achieve a coefficient of thermal expansion of about 20 ppm/K. A method includes assembly of the chip-packaging composition with a die or a mounting substrate. A computing system is also included that uses the chip-packaging composition.
摘要翻译： 芯片包装组合物包含双马来酰亚胺的聚合物。 一种方法包括形成芯片包装组合物，包括添加颗粒填料以实现约20ppm / K的热膨胀系数。 一种方法包括将芯片封装组合物与模具或安装基板组装在一起。 还包括使用芯片封装组合物的计算系统。
-
公开(公告)号：US07211638B2
公开(公告)日：2007-05-01
申请号：US10607426
申请日：2003-06-25
申请人： Saikumar Jayaraman
发明人： Saikumar Jayaraman
CPC分类号： C09D183/04 , C08K3/32 , C08K5/5419 , Y10T428/31663
摘要： The present invention describes a method including: providing a material A, the material A including a siloxane backbone with a hydride functional group; reacting the material A with a material B in the presence of a catalyst to form a material C, the material B including an alkenyl functional group and an aromatic carbonate functional group; heating the material C to form a material D, the material D including a phenol functional group; and reacting the material D with a material E and a material F to form a material G, the material E including a cyanogen halide, the material F including an acid acceptor, the material G including an aromatic cyanate ester functional group.The present invention further describes a die attach adhesive including a three-dimensional network of substituted triazine rings.
摘要翻译： 本发明描述了一种方法，包括：提供材料A，包含具有氢化物官能团的硅氧烷主链的材料A; 在催化剂存在下使材料A与材料B反应形成材料C，材料B包括链烯基官能团和芳族碳酸酯官能团; 加热材料C以形成材料D，材料D包括酚官能团; 并使材料D与材料E和材料F反应以形成材料G，所述材料E包括卤化氰，包括酸受体的材料F，所述材料G包括芳族氰酸酯官能团。 本发明进一步描述了包含取代的三嗪环的三维网络的管芯附着粘合剂。
-
50.发明申请Curing processes for substrate imprinting, structures made thereby, and polymers used therefor 审中-公开用于基材印记的固化方法，由此制备的结构以及用于其的聚合物公开(公告)号：US20050142345A1
公开(公告)日：2005-06-30
申请号：US10751270
申请日：2003-12-30
申请人： Saikumar Jayaraman
发明人： Saikumar Jayaraman
CPC分类号： H05K3/4664 , H05K3/005 , H05K3/107 , H05K3/1258 , H05K2201/09036 , H05K2203/0108 , H05K2203/1189 , Y10T428/24975
摘要： A mounting substrate includes an at least double-embossed structure on one side for containing metallization traces. The mounting substrate is overlaid with an uncured polymer and it is imprinted and cured by infrared or microwave energy. A second uncured polymer is placed over the cured polymer first film. It is imprinted and also cured under conditions that allow retention of significant features of the cured polymer first film. A chip package is also made of the double-embossed structure. The chip package can include a heat sink. A computing system is also disclosed that includes the double-embossed structure.
摘要翻译： 安装基板包括在一侧上用于容纳金属化迹线的至少双压花结构。 安装基板覆盖有未固化的聚合物，并通过红外或微波能量进行印刷和固化。 将第二未固化的聚合物置于固化的聚合物第一膜上。 在允许保留固化的聚合物第一膜的显着特征的条件下，它被印迹并固化。 芯片封装也由双压花结构制成。 芯片封装可以包括一个散热片。 还公开了包括双压花结构的计算系统。
-
-
-
-
-
-
-
-
-
搜索结果
98 条记录 (耗时 0.033 秒)
