公开(公告)号：US10693456B2

公开(公告)日：2020-06-23

申请号：US16194013

申请日：2018-11-16

Applicant: Infineon Technologies AG

Inventor： Werner Roessler ,  Anton Mauder

IPC: H03K99/00 ,  H03K17/687 ,  H03K17/567 ,  H03K17/06

Abstract: A method and an electronic circuit are disclosed. The method includes driving a transistor device in an on-state by applying a drive voltage higher than a threshold voltage of the transistor device to a drive input, and adjusting a voltage level of the drive voltage based on a load signal that represents a current level of a load current through the transistor device, wherein the current level is an actual current level or an expected current level of the load current.

公开(公告)号：US20190318996A1

公开(公告)日：2019-10-17

申请号：US16385337

申请日：2019-04-16

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Oliver Hellmund ,  Peter Irsigler ,  Hanno Melzner ,  Stefan Miethaner ,  Sebastian Schmidt ,  Hans-Joachim Schulze

IPC: H01L23/552 ,  H01L23/29 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/00 ,  H01L25/07

Abstract: A molding compound and a semiconductor arrangement with a molding compound are disclosed. The molding compound includes a matrix and a filler including filler particles. The filler particles each include a core with an electrically conducting or a semiconducting material and an electrically insulating cover.

公开(公告)号：US20190237575A1

公开(公告)日：2019-08-01

申请号：US16263244

申请日：2019-01-31

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Hans-Joachim Schulze ,  Matteo Dainese ,  Elmar Falck ,  Franz-Josef Niedernostheide ,  Manfred Pfaffenlehner

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40

CPC classification number: H01L29/7811 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/402

Abstract: A semiconductor component includes a semiconductor body having opposing first surface and second surfaces, and a side surface surrounding the semiconductor body. The semiconductor component also includes an active region including a first semiconductor region of a first conductivity type, which is electrically contacted via the first surface, and a second semiconductor region of a second conductivity type, which is electrically contacted via the second surface. The semiconductor component further includes an edge termination region arranged in a lateral direction between the first semiconductor region of the active region and the side surface, and includes a first edge termination structure and a second edge termination structure. The second edge termination structure is arranged in the lateral direction between the first edge termination structure and the side surface and extends from the first surface in a vertical direction more deeply into the semiconductor body than the first edge termination structure.

公开(公告)号：US10367057B2

公开(公告)日：2019-07-30

申请号：US16196373

申请日：2018-11-20

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Franz-Josef Niedernostheide ,  Frank Dieter Pfirsch ,  Christian Philipp Sandow

IPC: H03K3/00 ,  H01L29/06 ,  H01L29/08 ,  H01L29/739 ,  H01L29/40 ,  H01L29/78 ,  H01L29/10 ,  H03K17/567

Abstract: A power semiconductor device is disclosed. The device includes a semiconductor body coupled to a first load terminal structure and a second load terminal structure, a first cell and a second cell. A first mesa is included in the first cell, the first mesa including: a first port region and a first channel region. A second mesa included in the second cell, the second mesa including a second port region. A third cell is electrically connected to the second load terminal structure and electrically connected to a drift region. The third cell includes a third mesa comprising: a third port region, a third channel region, and a third control electrode.

公开(公告)号：US20190198612A1

公开(公告)日：2019-06-27

申请号：US16290477

申请日：2019-03-01

Applicant: Infineon Technologies AG

Inventor： Alexander Philippou ,  Anton Mauder

IPC: H01L29/06 ,  H01L21/762 ,  H01L21/02 ,  H01L29/417 ,  H01L21/311 ,  H01L29/10 ,  H01L29/78 ,  H01L29/423 ,  H01L29/66 ,  H01L29/739 ,  H01L27/12

CPC classification number: H01L29/0649 ,  H01L21/02233 ,  H01L21/02255 ,  H01L21/31144 ,  H01L21/76208 ,  H01L21/764 ,  H01L27/0629 ,  H01L27/1207 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7812 ,  H01L29/7813

Abstract: A power semiconductor device includes a semiconductor-on-insulator island having a semiconductor region and an insulation structure, the insulation structure being formed by an oxide and separating the semiconductor region from a portion of a semiconductor body of the power semiconductor device. The insulation structure includes a sidewall that laterally confines the semiconductor region; a bottom that vertically confines the semiconductor region; and a local deepening that forms at least a part of a transition between the sidewall and the bottom, wherein the local deepening extends further along the extension direction as compared to the bottom.

公开(公告)号：US10325996B2

公开(公告)日：2019-06-18

申请号：US15724604

申请日：2017-10-04

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Franz Hirler ,  Anton Mauder ,  Helmut Strack ,  Frank Kahlmann ,  Gerhard Miller

IPC: H01L21/22 ,  H01L29/66 ,  H01L29/36 ,  H01L29/739 ,  H01L29/74 ,  H01L21/265 ,  H01L29/78 ,  H01L29/861 ,  H01L29/872 ,  H01L29/08 ,  H01L29/10 ,  H01L29/167 ,  H01L29/40 ,  H01L29/06 ,  H01L29/165

Abstract: A semiconductor device is produced by providing a semiconductor substrate, forming an epitaxial layer on the semiconductor substrate, and introducing dopant atoms of a first doping type and dopant atoms of a second doping type into the epitaxial layer.

公开(公告)号：US20190081142A1

公开(公告)日：2019-03-14

申请号：US16189858

申请日：2018-11-13

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Franz-Josef Niedernostheide ,  Christian Philipp Sandow

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/78 ,  H01L29/10 ,  H01L29/739 ,  H01L29/423 ,  H01L29/417 ,  H01L29/36

CPC classification number: H01L29/0696 ,  H01L29/0692 ,  H01L29/1033 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41708 ,  H01L29/41741 ,  H01L29/42364 ,  H01L29/42376 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7813

Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminal structures, first and second cells electrically connected to the first load terminal structure and to a drift region, the drift region having a first conductivity type; a first mesa in the first cell and including: a port region electrically connected to the first load terminal structure, and a channel region coupled to the drift region; a second mesa in the second cell and including: a port region of the opposite conductivity type and electrically connected to the first load terminal structure, and a channel region coupled to the drift region. Each mesa is spatially confined, in a direction perpendicular to a direction of the load current within the respective mesa, by an insulation structure. The insulation structure houses a control electrode structure, and a guidance electrode arranged between the mesas.

公开(公告)号：US20190067416A1

公开(公告)日：2019-02-28

申请号：US16169671

申请日：2018-10-24

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Rudolf Elpelt ,  Dethard Peters

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L29/423 ,  H01L29/16 ,  H01L29/10

Abstract: An embodiment of a semiconductor device includes a SiC semiconductor body region having a body region of a first conductivity type, a drift zone of a second conductivity type, and a compensation structure of the first conductivity type. The compensation structure and a drift zone section of the drift zone form a super junction structure. The compensation structure adjoins the body region and is positioned entirely below the body region in a vertical direction perpendicular to a surface of the SiC semiconductor body. The compensation structure includes a first compensation sub-structure and a second compensation sub-structure. The first compensation sub-structure and the second compensation sub-structure are arranged above one another in the vertical direction. A width of the compensation structure changes along the vertical direction.

公开(公告)号：US10115791B2

公开(公告)日：2018-10-30

申请号：US15649870

申请日：2017-07-14

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Rudolf Elpelt ,  Dethard Peters

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/16 ,  H01L29/78

Abstract: An embodiment of a semiconductor device includes a body region of a first conductivity type in a SiC semiconductor body of a second conductivity type. A super junction structure is in the SiC semiconductor body, and includes a drift zone section being of the second conductivity type and a compensation structure of the first conductivity type. The compensation structure adjoins the body region and includes compensation sub-structures consecutively arranged along a vertical direction perpendicular to a surface of the SiC semiconductor body. The compensation sub-structures include a first compensation sub-structure and a second compensation sub-structure. A resistance of the second compensation sub-structure between opposite ends of the second compensation sub-structure along the vertical direction is at least five times larger than a resistance of the first compensation sub-structure between opposite ends of the first compensation sub-structure along the vertical direction.

公开(公告)号：US10083835B2

公开(公告)日：2018-09-25

申请号：US15634406

申请日：2017-06-27

Applicant: Infineon Technologies AG

Inventor： Johannes Georg Laven ,  Anton Mauder ,  Roland Rupp ,  Hans-Joachim Schulze ,  Werner Schustereder

IPC: H01L21/263 ,  H01L21/265 ,  H01L21/04 ,  H01L21/3065 ,  H01L21/266 ,  H01L29/739 ,  H01L21/67 ,  H01L21/28 ,  H01L29/423 ,  H01L29/40 ,  H01L29/78 ,  H01L29/812 ,  H01L29/808 ,  H01L29/10

CPC classification number: H01L21/2633 ,  H01L21/047 ,  H01L21/0475 ,  H01L21/0485 ,  H01L21/049 ,  H01L21/26586 ,  H01L21/266 ,  H01L21/28114 ,  H01L21/30621 ,  H01L21/3065 ,  H01L21/67069 ,  H01L29/045 ,  H01L29/1058 ,  H01L29/1066 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/404 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/7396 ,  H01L29/7397 ,  H01L29/7813 ,  H01L29/8083 ,  H01L29/8128

Abstract: By directing an ion beam with a beam divergence θ on a process surface of a semiconductor substrate, parallel electrode trenches are formed in the semiconductor substrate. A center axis of the directed ion beam is tilted to a normal to the process surface at a tilt angle α, wherein at least one of the tilt angle α and the beam divergence θ is not equal to zero. The semiconductor substrate is moved along a direction parallel to the process surface during formation of the electrode trenches. A conductive electrode is formed in the electrode trenches, wherein first sidewalls of the electrode trenches are tilted to the normal by a first slope angle φ1 with φ1 =(α+θ/2) and second sidewalls are tilted to the normal by a second slope angle φ2 with φ2 =(α−θ/2).