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公开(公告)号:US20090239580A1
公开(公告)日:2009-09-24
申请号:US12471984
申请日:2009-05-26
申请人: Shunpei YAMAZAKI , Jun KOYAMA
发明人: Shunpei YAMAZAKI , Jun KOYAMA
CPC分类号: G06F21/32 , G01N35/085 , G06K9/00006 , G07C9/00087 , G07C9/00158
摘要: A communication system capable of easily distinguishing a user includes means for storing reference living body information, means for reading collation living body information of the user, means for collating the collation living body information with the reference living body information and means for sending a notice of coincidence as data to a mating party when the collation result proves coincident.
摘要翻译: 能够容易地辨别用户的通信系统包括存储参考生物体信息的装置,用于读取用户的对照生物体信息的装置,用于将对照生物体信息与参照生物体信息进行整理的装置,以及发送通知的装置 当对照结果证实符合时,巧合作为交配对象的数据。
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公开(公告)号:US20090195359A1
公开(公告)日:2009-08-06
申请号:US12358345
申请日:2009-01-23
申请人: Jun KOYAMA , Shunpei YAMAZAKI
发明人: Jun KOYAMA , Shunpei YAMAZAKI
IPC分类号: H04Q5/22
CPC分类号: G06K19/07749 , G06F11/20 , G06K19/0723 , G06K19/07758 , H01L2924/0002 , H01L2924/00
摘要: An object is to increase the reliability of a semiconductor device which is capable of wireless communication. The semiconductor device includes a plurality of functional circuits as redundant circuits, and each of the plurality of functional circuits includes an antenna and a semiconductor integrated circuit. The plurality of functional circuits is covered with one sealing layer in which a fibrous body is impregnated with resin. Further, the semiconductor integrated circuit is provided with a transmission/reception circuit electrically connected to the antenna, a power supply circuit electrically connected to the transmission/reception circuit, and a logic circuit electrically connected to the transmission/reception circuit and the power supply circuit.
摘要翻译: 目的是提高能够进行无线通信的半导体装置的可靠性。 半导体器件包括多个功能电路作为冗余电路,并且多个功能电路中的每一个包括天线和半导体集成电路。 多个功能电路用一个密封层覆盖,其中纤维体浸渍有树脂。 此外,半导体集成电路设置有与天线电连接的发送/接收电路,电连接到发送/接收电路的电源电路和电连接到发送/接收电路和电源电路的逻辑电路 。
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公开(公告)号:US20090180326A1
公开(公告)日:2009-07-16
申请号:US12407539
申请日:2009-03-19
申请人: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO
发明人: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO
IPC分类号: G11C16/06
CPC分类号: G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C11/5671 , G11C16/0433 , G11C16/10 , G11C16/16 , G11C16/26 , G11C16/32
摘要: There is provided a non-volatile memory which enables high accuracy threshold control in a writing operation. In the present invention, a drain voltage and a drain current of a memory transistor are controlled to carry out a writing operation of a hot electron injection system, which is wherein a charge injection speed does not depend on a threshold voltage. FIGS. 1A and 1B are views of a circuit structure for controlling the writing. In FIGS. 1A and 1B, an output of an operational amplifier 103 is connected to a control gate of a memory transistor 101, a constant current source 102 is connected to a drain electrode, and a source electrode is grounded. The constant current source 102 and a voltage Vpgm are respectively connected to two input terminals of the operational amplifier 103.
摘要翻译: 提供了一种在写入操作中实现高精度阈值控制的非易失性存储器。 在本发明中,控制存储晶体管的漏极电压和漏极电流,进行热电子注入系统的写入动作,其中电荷注入速度不依赖于阈值电压。 图 图1A和1B是用于控制写入的电路结构的视图。 在图 如图1A和1B所示,运算放大器103的输出连接到存储晶体管101的控制栅极,恒流源102连接到漏电极,源电极接地。 恒流源102和电压Vpgm分别连接到运算放大器103的两个输入端。
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公开(公告)号:US20090160753A1
公开(公告)日:2009-06-25
申请号:US12371936
申请日:2009-02-17
申请人: Jun KOYAMA , Keitaro IMAI , Shinji MAEKAWA , Makoto FURUNO , Osamu NAKAMURA , Shunpei YAMAZAKI
发明人: Jun KOYAMA , Keitaro IMAI , Shinji MAEKAWA , Makoto FURUNO , Osamu NAKAMURA , Shunpei YAMAZAKI
IPC分类号: G09G3/36
CPC分类号: H01L27/1288 , G02F1/13454 , G02F1/13624 , G09G3/20 , G09G2300/0408 , G09G2300/08 , G09G2310/0289 , H01L27/1214 , H01L29/04 , H01L29/78669 , H01L29/78678
摘要: When semi-amorphous TFTs are used for forming a signal line driver circuit and a pixel, a large amplitude is required for driving the pixel, and a large power supply voltage is thus needed. On the other hand, when a shift register is made up of transistors having a single conductivity, a bootstrap circuit is required, and a voltage over a power supply is applied to a specific element. Therefore, not both the driving amplitude and the reliability can be achieved with a single power supply. According to the invention, a level shifter having a single conductivity is provided to solve such a problem.
摘要翻译: 当使用半非晶TFT来形成信号线驱动电路和像素时,驱动像素需要大的幅度,因此需要大的电源电压。 另一方面,当移位寄存器由具有单一导电性的晶体管构成时,需要自举电路,并且将电源上的电压施加到特定元件。 因此,不能通过单个电源实现驱动振幅和可靠性。 根据本发明,提供具有单一电导率的电平移位器来解决这个问题。
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公开(公告)号:US20090090954A1
公开(公告)日:2009-04-09
申请号:US12047054
申请日:2008-03-12
申请人: Shunpei YAMAZAKI , Jun KOYAMA , Keisuke HAYASHI
发明人: Shunpei YAMAZAKI , Jun KOYAMA , Keisuke HAYASHI
IPC分类号: H01L29/68 , H01L29/788
CPC分类号: H01L27/115 , G11C16/0433 , H01L27/105 , H01L27/11526 , H01L27/11529 , H01L27/11541 , H01L27/12 , H01L27/1203 , H01L27/1233 , H01L29/66757 , H01L29/66765 , H01L29/78621 , H01L29/78675 , H01L29/78678 , H01L29/7881
摘要: Memory elements, switching elements, and peripheral circuits to constitute a nonvolatile memory are integrally formed on a substrate by using TFTs. Since semiconductor active layers of memory element TFTs are thinner than those of other TFTs, impact ionization easily occurs in channel regions of the memory element TFTs. This enables low-voltage write/erase operations to be performed on the memory elements, and hence the memory elements are less prone to deteriorate. Therefore, a nonvolatile memory capable of miniaturization can be provided.
摘要翻译: 用于构成非易失性存储器的存储器元件,开关元件和外围电路通过使用TFT而一体地形成在衬底上。 由于存储元件TFT的半导体有源层比其他TFT薄,所以在存储元件TFT的沟道区容易发生冲击电离。 这使得能够对存储器元件执行低电压写入/擦除操作,因此存储元件不容易劣化。 因此,可以提供能够小型化的非易失性存储器。
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公开(公告)号:US20130001583A1
公开(公告)日:2013-01-03
申请号:US13609906
申请日:2012-09-11
申请人: Shunpei YAMAZAKI , Satoshi MURAKAMI , Jun KOYAMA , Yukio TANAKA , Hidehito KITAKADO , Hideto OHNUMA
发明人: Shunpei YAMAZAKI , Satoshi MURAKAMI , Jun KOYAMA , Yukio TANAKA , Hidehito KITAKADO , Hideto OHNUMA
IPC分类号: H01L29/786
CPC分类号: G02F1/1368 , G02F1/133345 , G02F1/13454 , G02F1/136227 , G02F1/136286 , G02F2201/123 , G02F2202/104 , H01L27/12 , H01L27/1222 , H01L27/124 , H01L27/1248 , H01L27/1259 , H01L27/3248 , H01L27/3258 , H01L27/3262 , H01L27/3272 , H01L27/3276 , H01L29/458 , H01L29/78621 , H01L29/78627 , H01L29/78675 , H01L2029/7863 , H01L2227/323
摘要: This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719 and 720 not overlapping with a gate wiring are arranged in an n-channel TFT 804 forming a pixel unit. As a result, a TFT structure having a small OFF current value is achieved. In this instance, an element belonging to the Group 15 of the Periodic Table exists in a higher concentration in the LDD region 707 than in the LDD regions 717, 718, 719 and 720.
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公开(公告)号:US20130001568A1
公开(公告)日:2013-01-03
申请号:US13609915
申请日:2012-09-11
申请人: Shunpei YAMAZAKI , Satoshi MURAKAMI , Jun KOYAMA , Yukio TANAKA , Hidehito KITAKADO , Hideto OHNUMA
发明人: Shunpei YAMAZAKI , Satoshi MURAKAMI , Jun KOYAMA , Yukio TANAKA , Hidehito KITAKADO , Hideto OHNUMA
IPC分类号: H01L29/786
CPC分类号: G02F1/1368 , G02F1/133345 , G02F1/13454 , G02F1/136227 , G02F1/136286 , G02F2201/123 , G02F2202/104 , H01L27/12 , H01L27/1222 , H01L27/124 , H01L27/1248 , H01L27/1259 , H01L27/3248 , H01L27/3258 , H01L27/3262 , H01L27/3272 , H01L27/3276 , H01L29/458 , H01L29/78621 , H01L29/78627 , H01L29/78675 , H01L2029/7863 , H01L2227/323
摘要: This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719 and 720 not overlapping with a gate wiring are arranged in an n-channel TFT 804 forming a pixel unit. As a result, a TFT structure having a small OFF current value is achieved. In this instance, an element belonging to the Group 15 of the Periodic Table exists in a higher concentration in the LDD region 707 than in the LDD regions 717, 718, 719 and 720.
摘要翻译: 本发明提供一种具有高操作性能和高可靠性的半导体器件。 在形成驱动电路的n沟道TFT 802中配置与栅极配线重叠的LDD区域707,能够实现高耐热载流子注入的TFT结构。 不与栅极布线重叠的LDD区域717,718,719和720被布置在形成像素单元的n沟道TFT 804中。 结果,实现了具有小的截止电流值的TFT结构。 在这种情况下,属于周期表第15族的元素在LDD区707中比在LDD区717,718,719和720中的浓度更高。
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公开(公告)号:US20120305912A1
公开(公告)日:2012-12-06
申请号:US13570297
申请日:2012-08-09
申请人: Jun KOYAMA , Shunpei YAMAZAKI
发明人: Jun KOYAMA , Shunpei YAMAZAKI
IPC分类号: H01L29/12
CPC分类号: H01L27/1225 , G02F1/133345 , G02F1/134309 , G02F1/13452 , G02F1/13454 , G02F1/136286 , G02F1/1368 , G02F2201/123 , G09G3/3266 , G09G3/3275 , G09G3/3677 , G09G3/3688 , G09G2300/0426 , G09G2310/0286 , G09G2310/08 , G09G2330/023 , H01L27/124 , H01L27/1285 , H01L29/045 , H01L29/66742 , H01L29/66969 , H01L29/7869
摘要: One embodiment of the present invention provides a highly reliably display device in which a high mobility is achieved in an oxide semiconductor. A first oxide component is formed over a base component. Crystal growth proceeds from a surface toward an inside of the first oxide component by a first heat treatment, so that a first oxide crystal component is formed in contact with at least part of the base component. A second oxide component is formed over the first oxide crystal component. Crystal growth is performed by a second heat treatment using the first oxide crystal component as a seed, so that a second oxide crystal component is formed. Thus, a stacked oxide material is formed. A transistor with a high mobility is formed using the stacked oxide material and a driver circuit is formed using the transistor.
摘要翻译: 本发明的一个实施例提供了一种在氧化物半导体中实现高迁移率的高度可靠的显示装置。 第一氧化物组分形成在基底组分上。 晶体生长通过第一次热处理从第一氧化物组分的表面向内部进行,从而形成第一氧化物晶体组分与至少一部分基础组分接触。 在第一氧化物晶体组分上形成第二氧化物组分。 通过使用第一氧化物晶体成分作为种子的第二次热处理进行晶体生长,从而形成第二氧化物晶体成分。 因此,形成堆叠的氧化物材料。 使用层叠的氧化物材料形成具有高迁移率的晶体管,并且使用该晶体管形成驱动电路。
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公开(公告)号:US20120206503A1
公开(公告)日:2012-08-16
申请号:US13363408
申请日:2012-02-01
申请人: Yoshiharu HIRAKATA , Jun KOYAMA , Shunpei YAMAZAKI
发明人: Yoshiharu HIRAKATA , Jun KOYAMA , Shunpei YAMAZAKI
IPC分类号: G09G5/00 , G09G3/36 , G02F1/1335
CPC分类号: H04N13/31 , G02B27/225 , G02F1/13306 , G02F1/1347 , G02F1/136209 , G02F1/1368 , G09G3/003 , H01L27/1225 , H04N13/324 , H04N13/359 , H04N13/361 , H04N2213/001
摘要: A display device capable of displaying both a 3D image and a 2D image is provided. The display device includes a plurality of optical filter regions where light-blocking panels for producing binocular disparity are arranged in matrix. The light-blocking panel can select whether to transmit light emitted from a display panel in each of the plurality of optical filter regions. Thus, in the display device, some regions where binocular disparity is produced can be provided. Consequently, the display device can display both a 3D image and a 2D image.
摘要翻译: 提供能够同时显示3D图像和2D图像的显示装置。 显示装置包括多个滤光器区域,其中用于产生双目视差的遮光板被排列成矩阵。 遮光面板可以选择是否在多个滤光器区域中的每一个中透射从显示面板发射的光。 因此,在显示装置中,可以提供产生双目视差的一些区域。 因此,显示装置可以同时显示3D图像和2D图像。
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公开(公告)号:US20120206446A1
公开(公告)日:2012-08-16
申请号:US13367715
申请日:2012-02-07
申请人: Shunpei YAMAZAKI , Jun KOYAMA
发明人: Shunpei YAMAZAKI , Jun KOYAMA
IPC分类号: G06T15/00
CPC分类号: H04N13/366 , G02B27/2214 , H04N13/31 , H04N13/315 , H04N13/324
摘要: A display device includes a display panel including a matrix of pixel regions, and a shutter panel including a matrix of optical shutter regions each of which state is selected from a light-transmitting state and a light-shielding state. In a first display state, the display panel performs display regarding one pixel region as a display element unit, and each of the plurality of optical shutter regions in the shutter panel is brought into a light-transmitting state or a light-shielding state. In a second display state, the display panel performs display regarding at least two pixel regions as the display element unit, and each of the plurality of optical shutter regions in the shutter panel is brought into a light-transmitting state or a light-shielding state. As a result, the range of distance with which 3D images can be displayed can differ between the first display state and the second display state.
摘要翻译: 显示装置包括包括像素区域矩阵的显示面板和包括光闸区域矩阵的快门面板,每个光闸区域的状态均选自透光状态和遮光状态。 在第一显示状态下,显示面板执行关于一个像素区域的显示作为显示元件单元,并且快门面板中的多个光学快门区域中的每一个进入透光状态或遮光状态。 在第二显示状态下,显示面板执行关于至少两个像素区域的显示作为显示元件单元,并且快门面板中的多个光学快门区域中的每一个进入透光状态或遮光状态 。 结果,可以显示3D图像的距离的范围可以在第一显示状态和第二显示状态之间不同。
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