利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

83 条记录 (耗时 0.031 秒)

    Strained channel on insulator device
    42.
    发明授权
    Strained channel on insulator device 失效
    应变绝缘体上的通道

    公开(公告)号：US07029994B2

    公开(公告)日：2006-04-18

    申请号：US11083537

    申请日：2005-03-18

    申请人： Chung-Hu Ge ,  Chao-Hsiung Wang ,  Chien-Chao Huang ,  Wen-Chin Lee ,  Chenming Hu

    发明人： Chung-Hu Ge ,  Chao-Hsiung Wang ,  Chien-Chao Huang ,  Wen-Chin Lee ,  Chenming Hu

    IPC分类号： H01L21/20

    CPC分类号： H01L21/823807 ,  H01L21/76264 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/7848

    摘要： A semiconductor device 10 includes a substrate 12 (e.g., a silicon substrate) with an insulating layer 14 (e.g., an oxide such as silicon dioxide) disposed thereon. A first semiconducting material layer 16 (e.g., SiGe) is disposed on the insulating layer 14 and a second semiconducting material layer 18 (e.g., Si) is disposed on the first semiconducting material layer 16. The first and second semiconducting material layers 16 and 18 preferably have different lattice constants such that the first semiconducting material layer 16 is compressive and the second semiconducting material layer is tensile 18.

    摘要翻译： 半导体器件10包括其上设置有绝缘层14（例如氧化物如二氧化硅）的衬底12（例如，硅衬底）。 第一半导体材料层16（例如，SiGe）设置在绝缘层14上，并且第二半导体材料层18（例如，Si）设置在第一半导体材料层16上。 第一和第二半导体材料层16和18优选地具有不同的晶格常数，使得第一半导体材料层16是压缩的，并且第二半导体材料层是拉伸18。

    FinFET device and method of manufacturing same
    44.
    发明授权
    FinFET device and method of manufacturing same 有权
    FinFET器件及其制造方法

    公开(公告)号：US08723272B2

    公开(公告)日：2014-05-13

    申请号：US13252892

    申请日：2011-10-04

    申请人： Chi-Wen Liu ,  Chao-Hsiung Wang

    发明人： Chi-Wen Liu ,  Chao-Hsiung Wang

    IPC分类号： H01L27/088

    CPC分类号： H01L27/0886 ,  H01L21/823821 ,  H01L29/0847 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

    摘要： A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a fin structure disposed over the substrate. The fin structure includes one or more fins. The semiconductor device further includes an insulation material disposed on the substrate. The semiconductor device further includes a gate structure disposed on a portion of the fin structure and on a portion of the insulation material. The gate structure traverses each fin of the fin structure. The semiconductor device further includes a source and drain feature formed from a material having a continuous and uninterrupted surface area. The source and drain feature includes a surface in a plane that is in direct contact with a surface in a parallel plane of the insulation material, each of the one or more fins of the fin structure, and the gate structure.

    摘要翻译： 公开了一种用于制造半导体器件的半导体器件和方法。 示例性半导体器件包括：衬底，其包括设置在衬底上的鳍结构。 翅片结构包括一个或多个翅片。 半导体器件还包括设置在基板上的绝缘材料。 半导体器件还包括设置在鳍结构的一部分上和绝缘材料的一部分上的栅极结构。 栅极结构横穿翅片结构的每个翅片。 半导体器件还包括由具有连续且不间断表面积的材料形成的源极和漏极特征。 源极和漏极特征包括在与绝缘材料的平行平面中的表面直接接触的平面中的表面，翅片结构的一个或多个翅片中的每一个以及栅极结构。

    Magnetic shielding for magnetically sensitive semiconductor devices
    47.
    发明授权
    Magnetic shielding for magnetically sensitive semiconductor devices 有权
    磁敏半导体器件的磁屏蔽

    公开(公告)号：US07183617B2

    公开(公告)日：2007-02-27

    申请号：US11060000

    申请日：2005-02-17

    申请人： Chao-Hsiung Wang ,  Horng-Huei Tseng ,  Denny Tang

    发明人： Chao-Hsiung Wang ,  Horng-Huei Tseng ,  Denny Tang

    IPC分类号： H01L27/14

    CPC分类号： H01L23/552 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01025 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/3025 ,  H01L2224/0401

    摘要： A magnetic shielding device is provided for protecting at least one magnetically sensitive component on a substrate according to embodiments of the present invention. The device comprises a first shield having a top portion, and one or more side portions, wherein the top and side portions along with the substrate encloses the magnetic sensitive component within for protecting the same from an external magnetic field, and wherein the magnetic shielding device contains at least two magnetic shielding materials with one having a relatively higher magnetic permeability property but lower magnetic saturation property while the other having a relatively lower magnetic permeability property but higher magnetic saturation property.

    摘要翻译： 根据本发明的实施例，提供了一种磁屏蔽装置，用于保护基板上的至少一个磁敏部件。 该装置包括具有顶部部分和一个或多个侧部部分的第一屏蔽件，其中顶部和侧部与基板一起包围磁敏部件，以便将其与外部磁场保护起来，并且其中磁屏蔽装置 包含至少两个磁屏蔽材料，具有较高磁导率性能但具有较低磁饱和性能的磁屏蔽材料，而另一种具有较低的磁导率性能但较高的磁饱和性能。

    Method for dicing semiconductor wafers
    48.
    发明授权
    Method for dicing semiconductor wafers 有权
    切割半导体晶片的方法

    公开(公告)号：US07183137B2

    公开(公告)日：2007-02-27

    申请号：US10725697

    申请日：2003-12-01

    申请人： Hsin-Hui Lee ,  Chien-Chao Huang ,  Chao-Hsiung Wang ,  Fu-Liang Yang ,  Chenming Hu

    发明人： Hsin-Hui Lee ,  Chien-Chao Huang ,  Chao-Hsiung Wang ,  Fu-Liang Yang ,  Chenming Hu

    IPC分类号： H01L21/50 ,  H01L21/78

    CPC分类号： H01L21/78 ,  B28D5/00

    摘要： A method is disclosed for dicing a wafer having a base material with a diamond structure. The wafer first undergoes a polishing process, in which a predetermined portion of the wafer is polished away from its back side. The wafer is then diced through at least one line along a direction at a predetermined offset angle from a natural cleavage direction of the diamond structure.

    摘要翻译： 公开了一种用于切割具有金刚石结构的基底材料的晶片的方法。 晶片首先进行抛光处理，其中将晶片的预定部分从其背面抛光。 然后将晶片沿着与金刚石结构的天然裂解方向成预定偏移角的方向通过至少一条线切割。

    Write line design in MRAM
    49.
    发明申请
    Write line design in MRAM 审中-公开
    在MRAM中写线设计

    公开(公告)号：US20060278908A1

    公开(公告)日：2006-12-14

    申请号：US11505141

    申请日：2006-08-16

    申请人： Wen Lin ,  Denny Tang ,  Li-shyue Lai ,  Chao-Hsiung Wang

    发明人： Wen Lin ,  Denny Tang ,  Li-shyue Lai ,  Chao-Hsiung Wang

    IPC分类号： H01L29/94

    CPC分类号： G11C11/15 ,  G11C5/063

    摘要： A magnetic random access memory device (MRAM) and the method for forming the same are disclosed. The MRAM has a magnetic tunnel junction (MTJ) device, a first write line, and a second write line orthogonal to the first write line, wherein at least one of the first and second write lines has a width narrower than that of the MTJ.

    摘要翻译： 公开了一种磁性随机存取存储器件（MRAM）及其形成方法。 MRAM具有与第一写入线正交的磁性隧道结（MTJ）器件，第一写入线和第二写入线，其中第一和第二写入线中的至少一个具有比MTJ窄的宽度。

    Semiconductor structure and method for integrating SOI devices and bulk devices
    50.
    发明授权
    Semiconductor structure and method for integrating SOI devices and bulk devices 有权
    用于集成SOI器件和散装器件的半导体结构和方法

    公开(公告)号：US07105897B2

    公开(公告)日：2006-09-12

    申请号：US10977236

    申请日：2004-10-28

    申请人： Hao-Yu Chen ,  Fu-Liang Yang ,  Hung-Wei Chen ,  Ping-Kun Wu ,  Chao-Hsiung Wang

    发明人： Hao-Yu Chen ,  Fu-Liang Yang ,  Hung-Wei Chen ,  Ping-Kun Wu ,  Chao-Hsiung Wang

    IPC分类号： H01L27/01 ,  H01L27/12 ,  H01L31/0392

    CPC分类号： H01L21/823481 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/1203

    摘要： This invention discloses a method and a semiconductor structure for integrating at least one bulk device and at least one silicon-on-insulator (SOI) device. The semiconductor structure includes a first substrate having an SOI area and a bulk area, on which the bulk device is formed; an insulation layer formed on the first substrate in the SOI area; and a second substrate, on which the SOI device is formed, stacked on the insulation layer. The surface of the first substrate is not on the substantially same plane as the surface of the second substrate.

    摘要翻译： 本发明公开了一种用于集成至少一个体器件和至少一个绝缘体上硅（SOI）器件的方法和半导体结构。 半导体结构包括具有SOI区域和体积区域的第一基板，在其上形成散装器件; 形成在SOI区域的第一基板上的绝缘层; 以及在其上形成有SOI器件的第二衬底，堆叠在绝缘层上。 第一基板的表面不在与第二基板的表面基本相同的平面上。