公开(公告)号：US20110051224A1

公开(公告)日：2011-03-03

申请号：US12939909

申请日：2010-11-04

Applicant: James Randolph Webster ,  Thanh Nghia Tu ,  Xiaoming Yan ,  Wonsuk Chung

Inventor： James Randolph Webster ,  Thanh Nghia Tu ,  Xiaoming Yan ,  Wonsuk Chung

IPC: G02B26/00

CPC classification number: B81B3/0008 ,  B81B2201/042 ,  B81C2201/0107 ,  B81C2201/0109 ,  B81C2201/115 ,  G02B26/001 ,  Y10T428/24917

Abstract: Methods of fabricating an electromechanical systems device that mitigate permanent adhesion, or stiction, of the moveable components of the device are provided. The methods provide an amorphous silicon sacrificial layer with improved and reproducible surface roughness. The amorphous silicon sacrificial layers further exhibit excellent adhesion to common materials used in electromechanical systems devices.

Abstract translation: 提供了减轻设备的可移动部件的永久性粘附或静电的机电系统装置的制造方法。 该方法提供了具有改进和可再现的表面粗糙度的非晶硅牺牲层。 非晶硅牺牲层对于机电系统器件中常用的材料进一步表现出优异的附着性。

公开(公告)号：US20090305010A1

公开(公告)日：2009-12-10

申请号：US12133813

申请日：2008-06-05

Applicant: James Randolph Webster ,  Thanh Nghia Tu ,  Xiaoming Yan ,  Wonsuk Chung

Inventor： James Randolph Webster ,  Thanh Nghia Tu ,  Xiaoming Yan ,  Wonsuk Chung

IPC: B05D5/06 ,  H05H1/24 ,  B32B3/00

CPC classification number: B81B3/0008 ,  B81B2201/042 ,  B81C2201/0107 ,  B81C2201/0109 ,  B81C2201/115 ,  G02B26/001 ,  Y10T428/24917

Abstract: Methods of fabricating an electromechanical systems device that mitigate permanent adhesion, or stiction, of the moveable components of the device are provided. The methods provide an amorphous silicon sacrificial layer with improved and reproducible surface roughness. The amorphous silicon sacrificial layers further exhibit excellent adhesion to common materials used in electromechanical systems devices.

Abstract translation: 提供了减轻设备的可移动部件的永久性粘附或静电的机电系统装置的制造方法。 该方法提供了具有改进和可再现的表面粗糙度的非晶硅牺牲层。 非晶硅牺牲层对于机电系统器件中常用的材料进一步表现出优异的附着性。

公开(公告)号：US20090137113A1

公开(公告)日：2009-05-28

申请号：US11946831

申请日：2007-11-28

Applicant: Sheng Hung Li ,  Siew-Seong Tan ,  Cheng-Yen Liu ,  Li-Ken Yeh

Inventor： Sheng Hung Li ,  Siew-Seong Tan ,  Cheng-Yen Liu ,  Li-Ken Yeh

IPC: H01L21/4763

CPC classification number: B81C1/00801 ,  B81C2201/0107 ,  B81C2201/014

Abstract: A method for fabricating a microstructure is to form at least one insulation layer including a micro-electro-mechanical structure therein over an upper surface of a silicon substrate. The micro-electro-mechanical structure includes at least one microstructure and a metal sacrificial structure that are independent with each other. In the metal sacrificial structure are formed a plurality of metal layers and a plurality of metal via layers connected to the respective metal layers. A barrier layer is formed over an upper surface of the insulation layer, and an etching stop layer is subsequently formed over a lower surface of the silicon substrate. An etching operation is carried out from the lower surface of the silicon substrate to form a space corresponding to the micro-electro-mechanical structure, and then the metal sacrificial structure is etched, thus achieving a microstructure suspension.

Abstract translation: 用于制造微结构的方法是在硅衬底的上表面上形成包括微​​电子机械结构的至少一个绝缘层。 微电子机械结构包括彼此独立的至少一个微结构和金属牺牲结构。 在金属牺牲结构中形成多个金属层和连接到各个金属层的多个金属通孔层。 在绝缘层的上表面上形成阻挡层，随后在硅衬底的下表面上形成蚀刻停止层。 从硅衬底的下表面进行蚀刻操作以形成与微电子机械结构相对应的空间，然后蚀刻金属牺牲结构，从而实现微结构悬浮。

公开(公告)号：US20050230839A1

公开(公告)日：2005-10-20

申请号：US11149921

申请日：2005-06-10

Applicant: Michel Despont ,  Roy Magnuson ,  Ute Drechsler

Inventor： Michel Despont ,  Roy Magnuson ,  Ute Drechsler

IPC: B81B3/00 ,  B81C1/00 ,  C23F13/14 ,  H01L21/306 ,  H01L21/336

CPC classification number: H01L21/30604 ,  B81B2201/12 ,  B81B2203/0118 ,  B81C1/00801 ,  B81C2201/0107 ,  B81C2201/0114 ,  B81C2201/0133 ,  C23F13/14

Abstract: A method for protecting a material of a microstructure comprising the material and a noble metal layer against undesired galvanic etching during manufacture, the method comprises forming on the structure a sacrificial metal layer having a lower redox potential than the material, the sacrificial metal layer being electrically connected to the noble metal layer.

Abstract translation: 一种用于在制造期间保护包含该材料的微结构材料和贵金属层以防止不期望的电化学蚀刻的方法，所述方法包括在所述结构上形成具有比所述材料更低的氧化还原电位的牺牲金属层，所述牺牲金属层是电 连接到贵金属层。

公开(公告)号：US06949397B2

公开(公告)日：2005-09-27

申请号：US10466516

申请日：2002-01-11

Applicant: Michel Despont ,  Roy H. Magnuson ,  Ute Drechsler

Inventor： Michel Despont ,  Roy H. Magnuson ,  Ute Drechsler

IPC: B81B3/00 ,  B81C1/00 ,  C23F13/14 ,  H01L21/306 ,  H01L21/00

CPC classification number: H01L21/30604 ,  B81B2201/12 ,  B81B2203/0118 ,  B81C1/00801 ,  B81C2201/0107 ,  B81C2201/0114 ,  B81C2201/0133 ,  C23F13/14

Abstract: A method for protecting a material of a microstructure comprising said material and a noble metal layer against undesired galvanic etching during manufacture comprises forming on the structure a sacrificial metal layer having a lower redox potential than said material, the sacrificial metal layer being electrically connected to said noble metal layer.

Abstract translation: 一种用于在制造过程中保护包含所述材料的微结构材料和贵金属层以防止不期望的电镀蚀刻的方法包括在所述结构上形成具有比所述材料更低的氧化还原电位的牺牲金属层，所述牺牲金属层电连接到所述 贵金属层。

公开(公告)号：US20050194348A1

公开(公告)日：2005-09-08

申请号：US11029181

申请日：2005-01-03

Applicant: Adam Cohen ,  Gang Zhang ,  Fan-Gang Tseng

Inventor： Adam Cohen ,  Gang Zhang ,  Fan-Gang Tseng

IPC: B81B3/00 ,  G01P15/08 ,  G01P15/125 ,  H01P1/202 ,  H01P3/06 ,  H01P5/18 ,  H01P11/00 ,  H05K3/46 ,  B44C1/22 ,  C25F3/00

CPC classification number: B81C1/00611 ,  B81B2201/042 ,  B81C1/00126 ,  B81C2201/0107 ,  B81C2201/0122 ,  B81C2201/056 ,  G01P15/0802 ,  G01P15/125 ,  H01P1/202 ,  H01P3/06 ,  H01P5/183 ,  H01P11/00 ,  H01P11/005 ,  H01P11/007 ,  H05K3/4647 ,  Y10T29/49155

Abstract: Various embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer. In other embodiments, electrochemically fabricated structures are formed on dielectric substrates.

Abstract translation: 各种实施方案涉及使用至少一种导电结构材料，至少一种导电牺牲材料和至少一种介电材料形成的多层中尺度或微结构结构的电化学制造。 在一些实施方案中，电介质材料是可UV固化的光聚合物。 在其它实施例中，在电介质基底上形成电化学制造的结构。

公开(公告)号：US06821901B2

公开(公告)日：2004-11-23

申请号：US10084622

申请日：2002-02-28

Applicant: Seung-jin Song ,  Kyoungdoug Min ,  Young-chang Joo ,  Hong-seok Min ,  Sejun Kim ,  Kun-joong Park

Inventor： Seung-jin Song ,  Kyoungdoug Min ,  Young-chang Joo ,  Hong-seok Min ,  Sejun Kim ,  Kun-joong Park

IPC: H01L21311

CPC classification number: B81C1/00087 ,  B81C2201/0107 ,  B81C2201/0112 ,  B81C2201/0132 ,  H01L21/3081 ,  H01L21/32134

Abstract: A method of through-etching a substrate that is simplified and by which the flow of ions can be kept to be regular during a plasma dry etching process, is provided. According to this method, a buffer layer is formed on a first plane of the substrate, a metal layer is formed on the buffer layer, an etching mask pattern is formed on a second plane opposite to the first plane, and the substrate is through-etched with the etching mask pattern as an etching mask. Preferably, the substrate is formed of a single-crystal silicon, the buffer layer is formed of silicon dioxide, and the metal layer is formed of aluminum.

Abstract translation: 提供了一种通过蚀刻简化的衬底的方法，并且通过该方法可以在等离子体干蚀刻工艺期间将离子流保持为规则的方法。 根据该方法，在基板的第一平面上形成缓冲层，在缓冲层上形成金属层，在与第一平面相反的第二平面上形成蚀刻掩模图案， 用蚀刻掩模图案蚀刻作为蚀刻掩模。 优选地，基板由单晶硅形成，缓冲层由二氧化硅形成，金属层由铝形成。

公开(公告)号：US20030162402A1

公开(公告)日：2003-08-28

申请号：US10084622

申请日：2002-02-28

Inventor： Seung-jin Song ,  Kyoungdoug Min ,  Young-chang Joo ,  Hong-seok Min ,  Sejun Kim ,  Kun-joong Park

IPC: H01L021/302 ,  H01L021/461

CPC classification number: B81C1/00087 ,  B81C2201/0107 ,  B81C2201/0112 ,  B81C2201/0132 ,  H01L21/3081 ,  H01L21/32134

Abstract: A method of through-etching a substrate that is simplified and by which the flow of ions can be kept to be regular during a plasma dry etching process, is provided. According to this method, a buffer layer is formed on a first plane of the substrate, a metal layer is formed on the buffer layer, an etching mask pattern is formed on a second plane opposite to the first plane, and the substrate is through-etched with the etching mask pattern as an etching mask. Preferably, the substrate is formed of a single-crystal silicon, the buffer layer is formed of silicon dioxide, and the metal layer is formed of aluminum.

Abstract translation: 提供了一种通过蚀刻简化的衬底的方法，并且通过该方法可以在等离子体干蚀刻工艺期间将离子流保持为规则的方法。 根据该方法，在基板的第一平面上形成缓冲层，在缓冲层上形成金属层，在与第一平面相反的第二平面上形成蚀刻掩模图案， 用蚀刻掩模图案蚀刻作为蚀刻掩模。 优选地，基板由单晶硅形成，缓冲层由二氧化硅形成，金属层由铝形成。

公开(公告)号：US5792675A

公开(公告)日：1998-08-11

申请号：US730257

申请日：1996-10-15

Applicant: Michael Offenberg

Inventor： Michael Offenberg

IPC: B81B3/00 ,  G01P15/08 ,  G01P15/125 ,  H01L49/00 ,  H01L21/00

CPC classification number: B81B3/0086 ,  B81B3/0035 ,  B81B3/0078 ,  B81C1/00595 ,  G01P15/0802 ,  G01P15/125 ,  B81B2201/0235 ,  B81B2203/0118 ,  B81B2203/0136 ,  B81C2201/0107 ,  B81C2201/0109 ,  B81C2201/016 ,  G01P2015/0814

Abstract: In an accelerometer sensor of crystalline material, whose components are composed partly of monocrystalline and partly of polycrystalline material, a band-shaped seismic mass preferably is composed of polycrystalline material, whose suspension by means of suspension segments of monocrystalline material at the end regions permits a movement in the longitudinal direction upon the occurrence of an acceleration. Parallel plates extend from this mass at right angles to their longitudinal direction and, together with additional plates, which run parallel to said plates and are anchored at a base, form a capacitor arrangement and are composed, in particular, of monocrystalline material. At least the monocrystalline material is doped to attain an electric conductivity. When lightly doped, the long and thin plates and suspension segments have a high conductivity, given a very small mechanical prestressing, and can easily be isotropically undercut. The polycrystalline formation of the seismic mass can be designed to be very wide and large by etching away an underlying sacrificial oxide.

Abstract translation: 在结晶材料的加速度传感器中，其部件部分由单晶组成，部分由多晶材料组成，带状地震质量体优选地由多晶材料组成，其结晶区域的单晶材料悬浮段的悬浮液允许 发生加速时的纵向移动。 平行板从该质量块垂直于其纵向方向延伸，并且与另外的板一起平行于所述板并锚定在基座上，形成电容器布置，并且特别地由单晶材料组成。 至少单晶材料被掺杂以获得导电性。 当轻掺杂时，长且薄的板和悬浮段具有高导电性，给定非常小的机械预应力，并且可以容易地各向同性地切削。 通过蚀刻掉潜在的牺牲氧化物，可以将地震块的多晶形成设计得非常宽和大。

公开(公告)号：US5578755A

公开(公告)日：1996-11-26

申请号：US348700

申请日：1994-12-02

Applicant: Michael Offenberg

Inventor： Michael Offenberg

IPC: B81B3/00 ,  G01P15/08 ,  G01P15/125 ,  H01L49/00

CPC classification number: B81B3/0086 ,  B81B3/0035 ,  B81B3/0078 ,  B81C1/00595 ,  G01P15/0802 ,  G01P15/125 ,  B81B2201/0235 ,  B81B2203/0118 ,  B81B2203/0136 ,  B81C2201/0107 ,  B81C2201/0109 ,  B81C2201/016 ,  G01P2015/0814

Abstract: In an accelerometer sensor of crystalline material, whose components are composed partly of monocrystalline and partly of polycrystalline material, a band-shaped seismic mass preferably is composed of polycrystalline material, whose suspension by means of suspension segments of monocrystalline material at the end regions permits a movement in the longitudinal direction upon the occurrence of an acceleration. Parallel plates extend from this mass at right angles to their longitudinal direction and, together with additional plates, which run parallel to said plates and are anchored at a base, form a capacitor arrangement and are composed, in particular, of monocrystalline material. At least the monocrystalline material is doped to attain an electric conductivity. When lightly doped, the long and thin plates and suspension segments have a high conductivity, given a very small mechanical prestressing, and can easily be isotropically undercut. The polycrystalline formation of the seismic mass can be designed to be very wide and large by etching away an underlying sacrificial oxide.

Abstract translation: 在结晶材料的加速度传感器中，其部件部分由单晶组成，部分由多晶材料组成，带状地震质量体优选地由多晶材料组成，其结晶区域的单晶材料悬浮段的悬浮液允许 发生加速时的纵向移动。 平行板从该质量块垂直于其纵向方向延伸，并且与另外的板一起平行于所述板并锚定在基座上，形成电容器布置，并且特别地由单晶材料组成。 至少单晶材料被掺杂以获得导电性。 当轻掺杂时，长且薄的板和悬浮段具有高导电性，给定非常小的机械预应力，并且可以容易地各向同性地切削。 通过蚀刻掉潜在的牺牲氧化物，可以将地震块的多晶形成设计得非常宽和大。