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    Apparatus for differential far-end crosstalk reduction
    41.
    发明授权
    Apparatus for differential far-end crosstalk reduction 有权
    差分远端串扰降低装置

    公开(公告)号：US09113555B2

    公开(公告)日：2015-08-18

    申请号：US13725556

    申请日：2012-12-21

    Applicant: Intel Corporation

    Inventor： Raul Enriquez Shibayama ,  Xiaoning Ye ,  Kai Xiao ,  Benjamin Lopez Garcia

    IPC: H01R13/66 ,  H05K1/02 ,  H05K1/16

    CPC classification number: H05K1/0228 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/162 ,  H05K2201/09636 ,  Y10T29/49147

    Abstract: A method of reducing crosstalk. The method may include forming a first contact over a first vertical conductor. The method may include forming a second contact over a second vertical conductor. The method may include forming a capacitive coupler between the first contact and the second contact, wherein the capacitive coupler is to cancel crosstalk received at the second vertical conductor from the first vertical conductor.

    Abstract translation: 减少串扰的方法。 该方法可以包括在第一垂直导体上形成第一接触。 该方法可以包括在第二垂直导体上形成第二接触。 该方法可以包括在第一触点和第二触点之间形成电容耦合器，其中电容耦合器将消除来自第一垂直导体的在第二垂直导体处接收的串扰。

    Structured circuit board and method
    42.
    发明授权
    Structured circuit board and method 有权
    结构电路板和方法

    公开(公告)号：US09084353B2

    公开(公告)日：2015-07-14

    申请号：US13807325

    申请日：2011-06-28

    Applicant: Jan De Geest ,  Stefaan Hendrik Jozef Sercu

    Inventor： Jan De Geest ,  Stefaan Hendrik Jozef Sercu

    IPC: H05K1/02 ,  H05K1/11

    CPC classification number: H05K1/0251 ,  H05K1/024 ,  H05K1/0245 ,  H05K1/115 ,  H05K3/429 ,  H05K2201/0187 ,  H05K2201/09063 ,  H05K2201/09618 ,  H05K2201/09636 ,  H05K2201/09718 ,  H05K2201/10189

    Abstract: A circuit board (1) is provided comprising a plurality of insulating layers, at least one ground layer and at least one layer comprising signal traces. The circuit board comprises at least a first conductive via (17) and a second conductive via (17). The first conductive via and the second conductive via penetrate through at least a first insulating layer of the plurality of insulating layers and are connected to a signal trace. The first conductive via and the second conductive via are arranged adjacent each other. At least in the first insulating layer the first conductive via and the second conductive via are separated in a first direction of separation (R) by a first adjustment portion comprising a dielectric material property different from the first insulating layer.

    Abstract translation: 提供电路板（1），其包括多个绝缘层，至少一个接地层和至少一个包含信号迹线的层。 电路板包括至少第一导电通孔（17）和第二导电通孔（17）。 第一导电通孔和第二导电通孔穿透多个绝缘层中的至少第一绝缘层，并连接到信号迹线。 第一导电通孔和第二导电通孔彼此相邻布置。 至少在第一绝缘层中，通过包括不同于第一绝缘层的介电材料性质的第一调节部分，第一导电通孔和第二导电通孔在第一分离方向（R）分离。

    STRUCTURED CIRCUIT BOARD AND METHOD
    43.
    发明申请
    STRUCTURED CIRCUIT BOARD AND METHOD 有权
    结构电路板和方法

    公开(公告)号：US20130199834A1

    公开(公告)日：2013-08-08

    申请号：US13807325

    申请日：2011-06-28

    Applicant: Jan De Geest ,  Stefaan Hendrik Jozef Sercu

    Inventor： Jan De Geest ,  Stefaan Hendrik Jozef Sercu

    IPC: H05K1/11

    CPC classification number: H05K1/0251 ,  H05K1/024 ,  H05K1/0245 ,  H05K1/115 ,  H05K3/429 ,  H05K2201/0187 ,  H05K2201/09063 ,  H05K2201/09618 ,  H05K2201/09636 ,  H05K2201/09718 ,  H05K2201/10189

    Abstract: A circuit board (1) is provided comprising a plurality of insulating layers, at least one ground layer and at least one layer comprising signal traces. The circuit board comprises at least a first conductive via (17) and a second conductive via (17). The first conductive via and the second conductive via penetrate through at least a first insulating layer of the plurality of insulating layers and are connected to a signal trace. The first conductive via and the second conductive via are arranged adjacent each other. At least in the first insulating layer the first conductive via and the second conductive via are separated in a first direction of separation (R) by a first adjustment portion comprising a dielectric material property different from the first insulating layer.

    Abstract translation: 提供电路板（1），其包括多个绝缘层，至少一个接地层和至少一个包含信号迹线的层。 电路板包括至少第一导电通孔（17）和第二导电通孔（17）。 第一导电通孔和第二导电通孔穿透多个绝缘层中的至少第一绝缘层，并连接到信号迹线。 第一导电通孔和第二导电通孔彼此相邻布置。 至少在第一绝缘层中，通过包括不同于第一绝缘层的介电材料性质的第一调节部分，第一导电通孔和第二导电通孔在第一分离方向（R）分离。

    Spark Gap Apparatus
    45.
    发明申请
    Spark Gap Apparatus 有权
    火花隙设备

    公开(公告)号：US20120039010A1

    公开(公告)日：2012-02-16

    申请号：US12856276

    申请日：2010-08-13

    Applicant: Andrew F. Tresness

    Inventor： Andrew F. Tresness

    IPC: H02H7/20

    CPC classification number: H05K1/026 ,  H01T4/08 ,  H05K1/116 ,  H05K3/0038 ,  H05K2201/09036 ,  H05K2201/09636 ,  H05K2203/0242

    Abstract: A spark gap for protecting electronic circuits from excessive electrical surges comprises a substrate containing an opening, a dielectric medium occupying the opening, and first and second electrodes. The first electrode is embedded in the substrate, on one side of the opening, and has a first conductive surface that extends through the substrate and is substantially exposed in the opening and to the dielectric medium. The second electrode is embedded in the substrate, on another side of the opening, and has a second conductive surface that extends through the substrate and is substantially exposed in the opening and to the dielectric medium. The first conductive surface is in opposing relation to the second conductive surface, and they are spaced apart by a predetermined distance to establish a gap width. An electrical arc is generated across the opening when a voltage potential difference between the conductive surfaces exceeds a threshold value.

    Abstract translation: 用于保护电子电路不受过度电涌影响的火花隙包括含有开口的基板，占据开口的电介质以及第一和第二电极。 第一电极在开口的一侧嵌入衬底中，并且具有延伸穿过衬底并基本上暴露在开口和电介质中的第一导电表面。 第二电极嵌入基板中，在开口的另一侧上，并且具有延伸穿过基板的第二导电表面，并且基本上暴露在开口和介电介质中。 第一导电表面与第二导电表面相对，并且它们间隔开预定距离以建立间隙宽度。 当导电表面之间的电压差超过阈值时，跨越开口产生电弧。

    ADJACENT PLATED THROUGH HOLES WITH STAGGERED COUPLINGS FOR CROSSTALK REDUCTION IN HIGH SPEED PRINTED CIRCUIT BOARDS
    47.
    发明申请
    ADJACENT PLATED THROUGH HOLES WITH STAGGERED COUPLINGS FOR CROSSTALK REDUCTION IN HIGH SPEED PRINTED CIRCUIT BOARDS 失效
    在高速印刷电路板中用于降低CROSSTALK的STAGGERED耦合的通孔

    公开(公告)号：US20120000701A1

    公开(公告)日：2012-01-05

    申请号：US13187173

    申请日：2011-07-20

    Applicant: Jason Edward CHAN ,  Jose Ricardo Paniagua

    Inventor： Jason Edward CHAN ,  Jose Ricardo Paniagua

    IPC: H05K1/11

    CPC classification number: H01R12/523 ,  H01R12/58 ,  H01R13/6461 ,  H01R13/6477 ,  H05K1/0216 ,  H05K1/0245 ,  H05K1/0298 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/09636 ,  H05K2201/09845 ,  H05K2203/0242

    Abstract: An electrical signal connection, an electrical signaling system, and a method of connecting printed circuit boards. The electrical signal connection having a first conductive via and a second conductive via disposed in a first printed circuit board. A first conductive trace with a first end and a second end has the first end electrically coupled to the first conductive via at a first distance from the top surface of the first printed circuit board. The second end of the first conductive via is electrically coupled to the second printed circuit board. A second conductive trace with a first end and a second end has the first end being electrically coupled to the second conductive via at a second distance from the top surface of the first printed circuit board. The second end being is electrically coupled to the second printed circuit board.

    Abstract translation: 电信号连接，电信号系统和连接印刷电路板的方法。 电信号连接具有设置在第一印刷电路板中的第一导电通孔和第二导电通孔。 具有第一端和第二端的第一导电迹线具有与第一印刷电路板的顶表面第一距离处电耦合到第一导电通孔的第一端。 第一导电通孔的第二端电耦合到第二印刷电路板。 具有第一端和第二端的第二导电迹线具有第一端部，其与第一印刷电路板的顶表面距离第二距离电耦合到第二导电通孔。 第二端电连接到第二印刷电路板。

    Circuit board including hybrid via structures
    49.
    发明授权
    Circuit board including hybrid via structures 有权
    电路板包括混合通孔结构

    公开(公告)号：US08044305B2

    公开(公告)日：2011-10-25

    申请号：US11443763

    申请日：2006-05-31

    Applicant: Xingjian Cai ,  Ke Wang ,  Qing-lun Chen

    Inventor： Xingjian Cai ,  Ke Wang ,  Qing-lun Chen

    IPC: H05K1/16

    CPC classification number: H05K1/115 ,  H05K1/0237 ,  H05K1/0245 ,  H05K1/112 ,  H05K3/3415 ,  H05K3/3421 ,  H05K3/3447 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/09627 ,  H05K2201/09636 ,  H05K2201/09709 ,  H05K2201/10189 ,  H05K2201/10659 ,  Y02P70/613

    Abstract: A circuit board may include hybrid via structures configured to connect to components, such as connectors and electronic components, mounted on the circuit board. A hybrid via structure may include one or more micro-vias configured to provide an electrical connection to a signal trace in the circuit board and one or more through-vias configured to provide a ground connection to at least one reference plane in the circuit board. In one embodiment, a plurality of circuit boards including the hybrid via structures and signal traces may be connected to establish a channel supporting differential signaling and data transfer rates of at least about 5 Gb/s. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

    Abstract translation: 电路板可以包括被配置为连接到安装在电路板上的诸如连接器和电子部件的组件的混合通孔结构。 混合通孔结构可以包括一个或多个微通孔，其被配置为提供与电路板中的信号迹线的电连接以及被配置为提供到电路板中的至少一个参考平面的接地连接的一个或多个通孔。 在一个实施例中，可以连接包括混合通路结构和信号迹线的多个电路板，以建立支持至少约5Gb / s的差分信令和数据传输速率的信道。 当然，在不偏离本实施例的情况下，可以进行许多替代，变化和修改。

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