公开(公告)号：US5734223A

公开(公告)日：1998-03-31

申请号：US564811

申请日：1995-11-29

Applicant: Hideo Makishima ,  Yoshiaki Yanai

Inventor： Hideo Makishima ,  Yoshiaki Yanai

IPC: H01J29/04 ,  H01J1/304 ,  H01J3/02 ,  H01J31/12 ,  H01J1/30

CPC classification number: H01J3/022 ,  H01J2201/319

Abstract: In a field emission cold cathode composed of a plurality of micro cold cathodes, the diameter of a plurality of openings formed in a gate electrode is large at a central region of an electron emission zone but small at a peripheral region of the electron emission zone, or the thickness of the gate electrode is small at the central region of the electron emission zone but large at the peripheral region of the electron emission zone. Alternatively, the thickness of an insulator layer is small at the central region of the electron emission zone but large at the peripheral region of the electron emission zone. Or, a resistance layer is provided between a substrate and a plurality of electron emission electrodes, and resistivity of the resistance layer is small at the central region of the electron emission zone but large at the peripheral region of the electron emission zone.

Abstract translation: 在由多个微冷阴极构成的场致发射冷阴极中，形成在栅电极中的多个开口的直径在电子发射区的中心区域处较大，但在电子发射区的外围区域较小， 或者栅电极的厚度在电子发射区的中心区域较小，但在电子发射区的外围区域较大。 或者，绝缘体层的厚度在电子发射区的中心区域较小，但在电子发射区的外围区域较大。 或者，在基板和多个电子发射电极之间设置电阻层，电子发射区的中心区域的电阻率较小，但在电子发射区的外围区域较大。

公开(公告)号：US5723871A

公开(公告)日：1998-03-03

申请号：US214319

申请日：1994-03-17

Applicant: Tsutomu Nakanishi ,  Hiromichi Horinaka ,  Takashi Saka ,  Toshihiro Kato

Inventor： Tsutomu Nakanishi ,  Hiromichi Horinaka ,  Takashi Saka ,  Toshihiro Kato

IPC: H01J1/34 ,  H01J3/02 ,  H01L29/201 ,  H01L29/161

CPC classification number: H01J1/34 ,  H01J3/021 ,  H01J2201/3423 ,  H01J2203/0296

Abstract: A process of producing a highly spin-polarized electron beam, including the steps of applying a light energy to a semiconductor device comprising a first compound semiconductor layer having a first lattice constant and a second compound semiconductor layer having a second lattice constant different from the first lattice constant, the second semiconductor layer being in junction contact with the first semiconductor layer to provide a strained semiconductor heterostructure, a magnitude of mismatch between the first and second lattice constants defining an energy splitting between a heavy hole band and a light hole band in the second semiconductor layer, such that the energy splitting is greater than a thermal noise energy in the second semiconductor layer in use; and extracting the highly spin-polarized electron beam from the second semiconductor layer upon receiving the light energy. A semiconductor device for emitting, upon receiving a light energy, a highly spin-polarized electron beam, including a first compound semiconductor layer formed of gallium arsenide phosphide, GaAs.sub.1-x P.sub.x, and having a first lattice constant; and a second compound semiconductor layer provided on the first semiconductor layer, the second semiconductor layer having a second lattice constant different from the first lattice constant and a thickness, t, smaller than the thickness of the first semiconductor layer.

公开(公告)号：US5723867A

公开(公告)日：1998-03-03

申请号：US607463

申请日：1996-02-27

Applicant: Hironori Imura

Inventor： Hironori Imura

IPC: H01J1/304 ,  B81B1/00 ,  H01J3/02 ,  H01J3/18 ,  G01N27/00 ,  H01J1/02

CPC classification number: H01J3/022

Abstract: In a field emission cathode, periphery portions of opening portions of a gate electrode are recessed on a side of a substrate, and a focusing electrode having opening portions which are identical in number with the opening portions of the gate electrode are disposed on the gate electrode. Further, a shield electrode having opening portions which are identical in number with opening portions of the gate electrode are disposed between the gate electrode and the focusing electrode. According to the above-mentioned construction, a focusing aberration can be reduced, and a focused electron flow can be obtained by a low electric potential of the gate electrode.

Abstract translation: 在场发射阴极中，栅电极的开口部的周边部分在基板的一侧凹陷，并且具有与栅电极的开口部分数目相同的开口部分的聚焦电极设置在栅极上 。 此外，具有与栅电极的开口部分数量相同的开口部分的屏蔽电极设置在栅电极和聚焦电极之间。 根据上述结构，可以降低聚焦像差，并且可以通过栅电极的低电位获得聚焦的电子流。

公开(公告)号：US5721560A

公开(公告)日：1998-02-24

申请号：US509501

申请日：1995-07-28

Applicant: David A. Cathey, Jr. ,  William Lewis ,  Glen E. Hush ,  Steven Howell

Inventor： David A. Cathey, Jr. ,  William Lewis ,  Glen E. Hush ,  Steven Howell

IPC: G09G3/22 ,  H01J3/02 ,  H01J1/30 ,  H01J19/24

CPC classification number: H01J3/022 ,  G09G3/22 ,  G09G2300/08 ,  G09G2330/026 ,  H01J2329/00

Abstract: A method for controlling a field emission display to reduce emission to grid during turn on and turn off is provided. A field emission display (FED) includes emitter sites formed on a baseplate; a grid for controlling electron emission from the emitter sites; a display screen for collecting electrons to form an image and a power supply. In order to reduce emission to grid during turn on, the display screen is enabled by the power supply prior to enabling of the emitter sites. An anode-baseplate voltage differential is thus established prior to electron emission. For turn on, the method includes varying the capacitances of the control circuits for the display screen and grid such that a time constant (RC) for the grid is larger than a time constant (RC) for the display screen. Alternately the method of the invention can be implemented during turn on using software, using time delay circuit components, or using an emitter site control circuit to control electron flow to the emitter sites. During turn off, the electron emission and anode-baseplate voltage differential are eliminated while a path to ground is provided for the grid.

Abstract translation: 提供一种用于控制场致发射显示以在打开和关闭期间减少到格栅的发射的方法。 场发射显示器（FED）包括形成在基板上的发射器位置; 用于控制来自发射器位点的电子发射的栅格; 用于收集电子以形成图像和电源的显示屏。 为了在接通电源时减少发射到电网，显示屏在启动发射器位置之前由电源启用。 因此，在电子发射之前建立阳极基板电压差。 为了打开，该方法包括改变用于显示屏和栅格的控制电路的电容，使得网格的时间常数（RC）大于显示屏幕的时间常数（RC）。 或者，本发明的方法可以在打开使用软件，使用时间延迟电路组件或使用发射器位置控制电路来控制到发射器位置的电子流的情况下实现。 在关闭期间，消除了电子发射和阳极基板电压差，同时为电网提供了接地的路径。

公开(公告)号：US5700176A

公开(公告)日：1997-12-23

申请号：US735042

申请日：1996-10-22

Applicant: Michael D. Potter

Inventor： Michael D. Potter

IPC: H01J9/39 ,  H01J1/304 ,  H01J3/02 ,  H01J7/18 ,  H01J9/02 ,  H01J9/40

CPC classification number: H01J9/025 ,  H01J3/022 ,  H01J2201/30423 ,  H01J2209/385

Abstract: A fabrication process is disclosed using process steps (S1-S18) similar to those of semiconductor integrated circuit fabrication to produce lateral-emitter field-emission devices and their arrays. In a preferred fabrication process for the simplified anode device, the following steps are performed: an anode film (70) is deposited; an insulator film (90) is deposited over the anode film; an ultra-thin conductive emitter film (100) is deposited over the insulator and patterned; a trench opening (160) is etched through the emitter and insulator, stopping at the anode film, thus forming and automatically aligning an emitting edge of the emitter; and means are provided for applying an electrical bias to the emitter and anode, sufficient to cause field emission of electrons from the emitting edge of the emitter to the anode. The anode film may comprise a phosphor (75) for a device specially adapted for use in a field emission display. The fabrication process may also include steps to deposit additional insulator films (130) and to deposit additional conductive films for control electrodes (140), which are automatically aligned with the emitter blade edge or tip (110). A fabrication process for forming an evacuated or gas-filled sealed chamber in a substrate is disclosed.

Abstract translation: 使用与半导体集成电路制造类似的工艺步骤（S1-S18）来公开制造横向射极场致发射器件及其阵列的制造工艺。 在简化阳极器件的优选制造工艺中，执行以下步骤：沉积阳极膜（70）; 绝缘膜（90）沉积在阳极膜上; 在绝缘体上沉积超薄导电发射极膜（100）并图案化; 通过发射极和绝缘体蚀刻沟槽开口（160），停止在阳极膜处，从而形成并自动对准发射极的发射边缘; 并且提供用于将电偏压施加到发射极和阳极的装置，足以引起电子从发射极的发射边到阳极的场发射。 阳极膜可以包括用于特别适用于场致发射显示器的器件的荧光体（75）。 制造工艺还可以包括沉积额外的绝缘膜（130）并且沉积用于控制电极（140）的附加导电膜的步骤，所述导电膜自动地与发射器叶片边缘或尖端（110）对齐。 公开了一种用于在衬底中形成抽真空或充气密封腔的制造工艺。

公开(公告)号：US5686782A

公开(公告)日：1997-11-11

申请号：US453594

申请日：1995-05-30

Applicant: Phil E. Hecker, Jr. ,  Robert E. Yui ,  Jules David Levine

Inventor： Phil E. Hecker, Jr. ,  Robert E. Yui ,  Jules David Levine

IPC: H01J3/02 ,  H01J1/30

CPC classification number: H01J3/022 ,  H01J2329/00

Abstract: An electron emitter plate (110) for an FED image display has an extraction (gate) electrode (22) spaced by a dielectric insulating spacer (125) from a cathode electrode including a conductive mesh (18). Arrays (12) of microtips (14) are located in mesh spacings (16), within apertures (26) formed in clusters (23) in extraction electrode (22). Microtips (14) are deposited through the apertures (26). The insulating spacer (125) is etched to undercut electrode (22) to connect apertures, forming a common cavity (141) for microtips (14) within each mesh spacing (16). Support beam structures (143) are deposited onto extraction electrode (22), either separately or simultaneously with formation of the microtips (14). The support beam structures (143) span the cavity (143) to support the extraction electrode (22) above the cathode electrode over cavity (143). The etch-out reduces the dielectric constant factor of gate-to-cathode capacitance in the finished structure. Strengthening the gate (22) with structures (143) enables gate support over the cavity (141).

Abstract translation: 用于FED图像显示器的电子发射器板（110）具有从包括导电网（18）的阴极电极与电介质绝缘间隔物（125）间隔开的提取（栅极）电极（22）。 小尖头（14）的阵列（12）位于提取电极（22）中形成为簇（23）的孔（26）内的网格间隔（16）中。 微尖头（14）通过孔（26）沉积。 绝缘间隔物（125）被蚀刻到底切电极（22）以连接孔，在每个网格间隔（16）内形成用于微尖端（14）的公共腔（141）。 支撑梁结构（143）分别或同时形成微尖端（14）沉积到引出电极（22）上。 所述支撑梁结构（143）跨越所述空腔（143）以在所述阴极（143）上方支撑所述阴极电极上方的所述引出电极（22）。 蚀刻减少了成品结构中栅极至阴极电容的介电常数因子。 加强具有结构（143）的门（22）可使门支撑在空腔（141）上。

公开(公告)号：US5680011A

公开(公告)日：1997-10-21

申请号：US257190

申请日：1994-06-08

Applicant: Hideo Makishima

Inventor： Hideo Makishima

IPC: H01J23/06 ,  H01J3/02 ,  H01J23/065 ,  H01J23/38 ,  H01J23/04 ,  H01J25/00

CPC classification number: H01J23/065 ,  H01J23/38 ,  H01J3/022

Abstract: Tips of emitters are protruded over a control electrode in a field emission cathode. The cathode is a part of an input cavity, and an anode facing the cathode is also a part of the input cavity. A voltage which is in the vicinity of a threshold value or less than the threshold value is applied across the control electrode and the emitters, so that an emission current is modulated in density by a RF input signal.

Abstract translation: 发射极的尖端突出在场发射阴极中的控制电极上。 阴极是输入腔的一部分，面向阴极的阳极也是输入腔的一部分。 在控制电极和发射极两端施加阈值以下的电压或小于阈值的电压，使得通过RF输入信号以浓度调制发射电流。

公开(公告)号：US5679960A

公开(公告)日：1997-10-21

申请号：US296927

申请日：1994-08-31

Applicant: Yoshiaki Akama

Inventor： Yoshiaki Akama

IPC: H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H01J29/04 ,  H01J31/12 ,  H01L29/80 ,  H01J1/46

CPC classification number: H01J9/025 ,  H01J3/022

Abstract: A device for emitting electrons, comprising a substrate, an insulating film formed on a surface of the substrate and having a recess, an emitter electrode formed on the insulating film and having an edge portion located at the recess, the edge portion of the emitter electrode being formed in the form of an arch within a plane perpendicular to the surface of the substrate so as to be sharpened toward a distal end of the emitter electrode, the edge portion of the emitter electrode being sharpened also in a planar direction parallel to the surface of the substrate toward the distal end of the emitter electrode so as to have a linear portion at the distal end, and the edge portion of the emitter electrode being adapted to emit electrons from the linear portion when an electric field is applied to the edge portion of the emitter electrode, and a gate electrode formed on the insulating structure and having an edge portion located at the recess and opposing the edge portion of the emitter electrode via a gap, the edge portion of the gate electrode being adapted to apply an electric field to the linear portion of the emitter electrode via the gap when a potential difference is given between the gate electrode and the emitter electrode.

Abstract translation: 一种用于发射电子的装置，包括基板，形成在基板的表面上并具有凹部的绝缘膜，形成在绝缘膜上并具有位于凹部处的边缘部分的发射极，发射极的边缘部分 在与基板的表面垂直的平面内形成拱形，朝向发射电极的远端被锐化，发射电极的边缘部分也在平行于表面的平面方向上被锐化 的基板朝向发射极的远端，以便在远端具有直线部分，并且当电场施加到边缘部分时，发射电极的边缘部分适于从线性部分发射电子 以及形成在所述绝缘结构上并具有位于所述凹部处的边缘部分并且与所述发射极电极的边缘部分相对的栅电极 经由间隙经过栅极电极和发射极电极之间的电位差时，栅电极的边缘部分经由该间隙向发射电极的直线部分施加电场。

公开(公告)号：US5667418A

公开(公告)日：1997-09-16

申请号：US449036

申请日：1995-05-24

Applicant: Theodore S. Fahlen ,  Robert M. Duboc, Jr. ,  Paul A. Lovoi

Inventor： Theodore S. Fahlen ,  Robert M. Duboc, Jr. ,  Paul A. Lovoi

IPC: H01J3/02 ,  H01J9/14 ,  H01J9/18 ,  H01J17/49 ,  H01J29/02 ,  H01J29/08 ,  H01J29/46 ,  H01J31/12 ,  H01J61/30 ,  H01J9/26

CPC classification number: H01J61/30 ,  H01J17/49 ,  H01J29/028 ,  H01J29/085 ,  H01J29/467 ,  H01J3/022 ,  H01J31/123 ,  H01J31/126 ,  H01J31/127 ,  H01J9/14 ,  H01J9/185 ,  H01J2329/8625 ,  H01J2329/863 ,  H01J2329/864 ,  H01J2329/8645 ,  Y10S264/91

Abstract: A flat panel device is provided with an internal support structure in the form of a spacer. In one fabrication technique, the spacer is formed as a laminate of multiple layers of ceramic, glass-ceramic, ceramic-reinforced glass, devitrified glass, or/and metal coated with electrically insulating material. The spacer is placed between a backplate structure and a faceplate structure which are connected together to form an enclosure that encases the spacer. In another fabrication technique, the spacer constitutes a spacer wall placed between the backplate and faceplate structures. When the backplate structure is connected to the faceplate structure to form an enclosure that encases the spacer wall, the spacer wall follows a corrugated path adjacent to at least one of the faceplate and backplate structures.

Abstract translation: 平板装置设置有间隔件形式的内部支撑结构。 在一种制造技术中，间隔件形成为多层陶瓷，玻璃陶瓷，陶瓷增强玻璃，失透玻璃，或/和涂覆有电绝缘材料的金属的叠层。 间隔件放置在背板结构和面板结构之间，所述背板结构和面板结构连接在一起以形成包围间隔件的外壳。 在另一种制造技术中，间隔件构成放置在背板和面板结构之间的间隔壁。 当背板结构连接到面板结构以形成围绕间隔壁的外壳时，间隔壁遵循邻近面板和背板结构中的至少一个的波纹路径。

公开(公告)号：US5663608A

公开(公告)日：1997-09-02

申请号：US633545

申请日：1996-04-17

Applicant: Gary W. Jones ,  Steven M. Zimmerman

Inventor： Gary W. Jones ,  Steven M. Zimmerman

IPC: G01R33/10 ,  G02B27/00 ,  G02B27/01 ,  G02B27/22 ,  G09G3/00 ,  H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H01J9/24 ,  H01J29/02 ,  H01J29/94 ,  H01J31/12 ,  H04N5/70 ,  H04N5/74 ,  H04N13/00 ,  H01J1/02

CPC classification number: G09G3/001 ,  G01R33/10 ,  G02B27/017 ,  G02B27/0172 ,  G02B27/0176 ,  G02B27/2235 ,  H01J1/3042 ,  H01J29/028 ,  H01J29/94 ,  H01J3/022 ,  H01J31/127 ,  H01J9/025 ,  H04N13/0422 ,  H04N13/0438 ,  H04N13/044 ,  H04N13/0459 ,  H04N13/0497 ,  H04N5/7408 ,  G02B2027/0132 ,  G02B2027/0136 ,  H01J2201/304 ,  H01J2201/30426 ,  H01J2201/30457 ,  H01J2201/319 ,  H01J2209/385 ,  H01J2329/00 ,  H01J2329/8625 ,  H01J2329/863 ,  H01J2329/864 ,  H04N13/0059 ,  H04N13/0285 ,  H04N13/0427 ,  H04N13/0456 ,  H04N5/70 ,  H04N5/7491

Abstract: A field emitter structure, comprising: a base substrate; a field emitter element on the base substrate; a multilayer differentially etched dielectric stack circumscribingly surrounding the field emitter element on the base substrate; and a gate electrode overlying the multilayer differentially etched dielectric stack, and in circumscribing spaced relationship to the field emitter element. Also disclosed are electron source devices, comprising an electron emitter element including a material selected from the group consisting of leaky dielectric materials, and leaky insulator materials, as well as electron source devices, comprising an electron emitter element including an insulator material doped with a tunneling electron emission enhancingly effective amount of a dopant species, and thin film triode devices.

Abstract translation: 一种场发射器结构，包括：基底; 基底基板上的场发射体元件; 围绕基底衬底上的场发射体元件的多层差分蚀刻介质堆叠; 以及覆盖多层差分蚀刻的电介质叠层的栅电极，并且以与外界发射极元件间隔开的关系。 还公开了电子源器件，其包括电子发射器元件，其包括选自由漏电介质材料和漏绝缘体材料组成的组的材料，以及电子源器件，其包括电子发射器元件，该电子发射器元件包括掺杂有隧道 电子发射增加有效量的掺杂物种类和薄膜三极管器件。