Multi-layer, multi-material fabrication methods for producing micro-scale and millimeter-scale devices with enhanced electrical and/or mechanical properties
    51.
    发明授权
    Multi-layer, multi-material fabrication methods for producing micro-scale and millimeter-scale devices with enhanced electrical and/or mechanical properties 有权
    用于生产具有增强的电和/或机械性能的微尺度和毫米级装置的多层多材料制造方法

    公开(公告)号:US08613846B2

    公开(公告)日:2013-12-24

    申请号:US12906970

    申请日:2010-10-18

    IPC分类号: C25D5/02 C25D5/10

    摘要: Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that partially coats the surface of the structure. Other embodiments are directed to electrochemical fabrication methods for producing structures or devices (e.g. microprobes) from a core material and a shell or coating material that completely coats the surface of each layer from which the probe is formed including interlayer regions. Additional embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes) from a core material and a shell or coating material wherein the coating material is located around each layer of the structure without locating the coating material in inter-layer regions. Each of these groups of embodiments incorporate both the core material and the coating material during the formation of each layer and each layer is also formed with a sacrificial material that is removed after formation of all layers of the structure. In some embodiments the core material may be a genuine structural material while in others it may be only a functional structural material (i.e. a material that would be removed with sacrificial material if it were accessible by an etchant during removal of sacrificial material.

    摘要翻译: 本发明的一些实施方案涉及用于从芯材料和部分涂覆结构表面的壳或涂层材料形成结构或器件(例如用于半导体器件的晶片级测试的微探针)的电化学制造方法。 其它实施方案涉及用于从芯材和壳或涂层材料制造结构或器件(例如微探针)的电化学制造方法,其完全涂覆形成探针的每个层的表面,包括中间层区域。 本发明的另外的实施方案涉及用于从核心材料和壳或涂层材料形成结构或器件(例如微针)的电化学制造方法,其中涂层材料围绕结构的每一层定位,而不将涂层材料定位在相互之间, 层区域。 这些实施例组中的每一个在形成每个层期间都包括芯材料和涂层材料,并且每个层还形成有牺牲材料,该牺牲材料在形成所述结构的所有层之后被去除。 在一些实施例中,芯材料可以是真正的结构材料,而在其它实施例中,其可以仅是功能性结构材料(即,如果在去除牺牲材料期间可通过蚀刻剂获得牺牲材料,则该材料将被除去。

    Methods and Apparatus for Forming Multi-Layer Structures Using Adhered Masks
    54.
    发明申请
    Methods and Apparatus for Forming Multi-Layer Structures Using Adhered Masks 审中-公开
    使用粘附掩模形成多层结构的方法和装置

    公开(公告)号:US20110315556A1

    公开(公告)日:2011-12-29

    申请号:US13206133

    申请日:2011-08-09

    IPC分类号: C25D5/02

    摘要: Numerous electrochemical fabrication methods and apparatus are provided for producing multi-layer structures (e.g. having meso-scale or micro-scale features) from a plurality of layers of deposited materials using adhered masks (e.g. formed from liquid photoresist or dry film), where two or more materials may be provided per layer where at least one of the materials is a structural material and one or more of any other materials may be a sacrificial material which will be removed after formation of the structure. Materials may comprise conductive materials that are electrodeposited or deposited in an electroless manner. In some embodiments special care is undertaken to ensure alignment between patterns formed on successive layers.

    摘要翻译: 提供了多种电化学制造方法和装置,用于使用粘附的掩模(例如由液体光致抗蚀剂或干膜形成)从多层沉积材料制备多层结构(例如具有中尺度或微尺度特征),其中两个 或者可以在每层中提供更多的材料,其中至少一种材料是结构材料,并且任何其它材料中的一种或多种可以是在形成结构之后被去除的牺牲材料。 材料可以包括以无电解方式电沉积或沉积的导电材料。 在一些实施例中,特别注意确保在连续层上形成的图案之间的对准。

    Mesoscale and microscale device fabrication methods using split structures and alignment elements
    55.
    发明授权
    Mesoscale and microscale device fabrication methods using split structures and alignment elements 失效
    使用分裂结构和对准元件的中尺度和微米器件制造方法

    公开(公告)号:US07611616B2

    公开(公告)日:2009-11-03

    申请号:US11506586

    申请日:2006-08-18

    IPC分类号: C25D5/02

    摘要: Various embodiments of the invention are directed to formation of mesoscale or microscale devices using electrochemical fabrication techniques where structures are formed from a plurality of layers as opened structures which can be folded over or other otherwise combined to form structures of desired configuration. Each layer is formed from at least one structural material and at least one sacrificial material. The initial formation of open structures may facilitate release of the sacrificial material, ability to form fewer layers to complete a structure, ability to locate additional materials into the structure, ability to perform additional processing operations on regions exposed while the structure is open, and/or the ability to form completely encapsulated and possibly hollow structures.

    摘要翻译: 本发明的各种实施例涉及使用电化学制造技术形成中尺度或微尺寸器件,其中结构由多个层形成为打开的结构,其可折叠或以其他方式组合以形成所需构造的结构。 每个层由至少一种结构材料和至少一种牺牲材料形成。 开放结构的初始形成可以促进牺牲材料的释放,形成较少层以完成结构的能力,将附加材料定位到结构中的能力,对结构打开时暴露的区域执行附加处理操作的能力和/ 或形成完全封装和可能中空结构的能力。

    EFAB Methods and Apparatus Including Spray Metal or Powder Coating Processes
    56.
    发明申请
    EFAB Methods and Apparatus Including Spray Metal or Powder Coating Processes 审中-公开
    包括喷涂金属或粉末涂层工艺的EFAB方法和设备

    公开(公告)号:US20090139869A1

    公开(公告)日:2009-06-04

    申请号:US12324135

    申请日:2008-11-26

    IPC分类号: C25D5/02 C25D5/10 C25D5/48

    CPC分类号: C23C4/02 C25D1/00 C25D1/003

    摘要: Various embodiments of the invention present techniques for forming structures via a combined electrochemical fabrication process and a thermal spraying process or powder deposition processes. In a first set of embodiments, selective deposition occurs via masking processes (e.g. a contact masking process or adhered mask process) and thermal spraying or powder deposition is used in blanket deposition processes to fill in voids left by selective deposition processes. In a second set of embodiments, after selective deposition of a first material, a second material is blanket deposited to fill in the voids, the two depositions are planarized to a common level and then a portion of the first or second materials is removed (e.g. by etching) and a third material is sprayed into the voids left by the etching operation. In both embodiments the resulting depositions are planarized to a desired layer thickness in preparation for adding additional layers.

    摘要翻译: 本发明的各种实施例提出了通过组合的电化学制造工艺和热喷涂工艺或粉末沉积工艺形成结构的技术。 在第一组实施例中,通过掩模工艺(例如接触掩模工艺或粘附的掩模工艺)进行选择性沉积,并且在覆盖沉积工艺中使用热喷涂或粉末沉积来填充通过选择性沉积工艺留下的空隙。 在第二组实施例中,在选择性沉积第一材料之后,第二材料被覆盖沉积以填充空隙,将两个沉积物平坦化到共同的水平,然后去除第一或第二材料的一部分(例如 通过蚀刻),并且通过蚀刻操作将第三材料喷射到留下的空隙中。 在两个实施方案中,将所得沉积物平坦化至所需的层厚度,以准备添加另外的层。

    Electrochemical fabrication process for forming multilayer multimaterial microprobe structures
    57.
    发明授权
    Electrochemical fabrication process for forming multilayer multimaterial microprobe structures 有权
    用于形成多层多材料微探针结构的电化学制造工艺

    公开(公告)号:US07531077B2

    公开(公告)日:2009-05-12

    申请号:US11029221

    申请日:2005-01-03

    IPC分类号: C25D5/02

    摘要: Some embodiments of the invention are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that partially coats the surface of the probe. Other embodiments are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that completely coats the surface of each layer from which the probe is formed including interlayer regions. These first two groups of embodiments incorporate both the core material and the coating material during the formation of each layer. Still other embodiments are directed to the electrochemical fabrication of microprobe arrays that are partially encapsulated by a dielectric material during a post layer formation coating process. In even further embodiments, the electrochemical fabrication of microprobes from two or more materials may occur by incorporating a coating material around each layer of the structure without locating the coating material in inter-layer regions.

    摘要翻译: 本发明的一些实施方案涉及由芯材料和部分涂覆探针的表面的材料形成的微针的电化学制造。 其它实施方案涉及由核心材料形成的微结构的电化学制造,以及完全涂覆形成探针的每个层的表面的材料,包括中间层区域。 这些前两组实施例在形成每个层期间都包括芯材料和涂层材料。 其他实施例涉及在后层形成涂覆工艺期间由电介质材料部分封装的微探针阵列的电化学制造。 在甚至进一步的实施方案中,来自两种或更多种材料的微结构的电化学制造可以通过在结构的每一层周围并入涂层材料而不将涂层材料定位在层间区域中而进行。

    Method and apparatus for maintaining parallelism of layers and/or achieving desired thicknesses of layers during the electrochemical fabrication of structures
    60.
    发明授权
    Method and apparatus for maintaining parallelism of layers and/or achieving desired thicknesses of layers during the electrochemical fabrication of structures 有权
    在结构的电化学制造期间保持层的平行度和/或实现所需厚度的层的方法和装置

    公开(公告)号:US08702956B2

    公开(公告)日:2014-04-22

    申请号:US13356398

    申请日:2012-01-23

    IPC分类号: C25D5/52 C25D5/10 C25D5/02

    摘要: Some embodiments of the present invention provide processes and apparatus for electrochemically fabricating multilayer structures (e.g. mesoscale or microscale structures) with improved endpoint detection and parallelism maintenance for materials (e.g. layers) that are planarized during the electrochemical fabrication process. Some methods involve the use of a fixture during planarization that ensures that planarized planes of material are parallel to other deposited planes within a given tolerance. Some methods involve the use of an endpoint detection fixture that ensures precise heights of deposited materials relative to an initial surface of a substrate, relative to a first deposited layer, or relative to some other layer formed during the fabrication process. In some embodiments planarization may occur via lapping while other embodiments may use a diamond fly cutting machine.

    摘要翻译: 本发明的一些实施例提供了用于电化学制造多层结构(例如中尺度或微结构)的方法和装置,其具有改进的端点检测和用于在电化学制造过程中被平坦化的材料(例如层)的并行维护。 一些方法涉及在平坦化期间使用夹具,其确保材料的平面化平面平行于给定公差内的其它沉积平面。 一些方法涉及使用端点检测夹具,其相对于第一沉积层或相对于在制造过程期间形成的一些其它层,相对于衬底的初始表面确保沉积材料的精确高度。 在一些实施例中,平面化可以通过研磨发生,而其他实施例可以使用金刚石切片机。