公开(公告)号：US20220189766A1

公开(公告)日：2022-06-16

申请号：US17436752

申请日：2020-03-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuichi YANAGISAWA ,  Hiromi SAWAI ,  Daisuke MATSUBAYASHI

IPC: H01L21/02 ,  H01L27/11582 ,  H01L21/3213

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first oxide, an insulator over the first oxide, a first conductor over the insulator, a second conductor electrically connected to the first oxide, and a second oxide provided between the first oxide and the second conductor, and the contact area between the second oxide and the second conductor is larger than the contact area between the second oxide and the first oxide.

公开(公告)号：US20220157818A1

公开(公告)日：2022-05-19

申请号：US17509157

申请日：2021-10-25

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Takanori MATSUZAKI ,  Yoshinobu ASAMI ,  Daisuke MATSUBAYASHI ,  Tatsuya ONUKI

IPC: H01L27/105 ,  H01L27/12 ,  H01L29/786

Abstract: A first transistor, a second transistor, a capacitor, and first to third conductors are included. The first transistor includes a first gate, a source, and a drain. The second transistor includes a second gate, a third gate over the second gate, first and second low-resistance regions, and an oxide sandwiched between the second gate and the third gate. The capacitor includes a first electrode, a second electrode, and an insulator sandwiched therebetween. The first low-resistance region overlaps with the first gate. The first conductor is electrically connected to the first gate and is connected to a bottom surface of the first low-resistance region. The capacitor overlaps with the first low-resistance region. The second conductor is electrically connected to the drain. The third conductor overlaps with the second conductor and is connected to the second conductor and a side surface of the second low-resistance region.

公开(公告)号：US20200227562A1

公开(公告)日：2020-07-16

申请号：US16630977

申请日：2018-07-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Daisuke MATSUBAYASHI ,  Yoshinobu ASAMI

IPC: H01L29/786 ,  H01L29/24 ,  H01L27/108

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes an oxide; a first conductor and a second conductor apart from each other over the oxide; a first insulator over the first conductor and the second conductor, in which an opening is formed to overlap with a region between the first conductor and the second conductor; a third conductor in the opening; and a second insulator between the oxide, the first conductor, the second conductor, and the first insulator and the third conductor. The second insulator has a first thickness between the oxide and the third conductor, and has a second thickness between the first conductor or the second conductor and the third conductor. The first thickness is smaller than the second thickness.

公开(公告)号：US20200185386A1

公开(公告)日：2020-06-11

申请号：US16623648

申请日：2018-06-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Daisuke MATSUBAYASHI ,  Tatsuya ONUKI

IPC: H01L27/105 ,  H01L27/12 ,  H01L29/786 ,  H01L21/02 ,  H01L21/4757 ,  H01L29/24 ,  H01L29/66 ,  H01L21/477

Abstract: A semiconductor device that can be highly integrated is provided. The semiconductor device includes a transistor, an interlayer film, and a first conductor. The transistor includes an oxide over a first insulator; a second conductor over the oxide; a second insulator provided between the oxide and the second conductor and in contact with a side surface of the second conductor; and a third insulator provided for the side surface of the second conductor with the second insulator therebetween. The oxide includes a first region, a second region, and a third region. The first region overlaps with the second conductor. The second region is provided between the first region and the third region. The third region has a lower resistance than the second region. The second region has a lower resistance than the first region. The interlayer film is provided over the first insulator and the oxide. The first conductor is electrically connected to the third region. The third region overlaps with one of the third insulator, the first conductor, and the interlayer film. A top surface of the third insulator is level with a top surface of the interlayer film.

公开(公告)号：US20190035937A1

公开(公告)日：2019-01-31

申请号：US16024967

申请日：2018-07-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hideomi SUZAWA ,  Tetsuhiro TANAKA ,  Hirokazu WATANABE ,  Yuhei SATO ,  Yasumasa YAMANE ,  Daisuke MATSUBAYASHI

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/45

Abstract: A semiconductor device having a reduced amount of oxygen vacancy in a channel formation region of an oxide semiconductor is provided. Further, a semiconductor device which includes an oxide semiconductor and has improved electric characteristics is provided. Furthermore, a methods for manufacturing the semiconductor device is provided. An oxide semiconductor film is formed; a conductive film is formed over the oxide semiconductor film at the same time as forming a low-resistance region between the oxide semiconductor film and the conductive film; the conductive film is processed to form a source electrode and a drain electrode; and oxygen is added to the low-resistance region between the source electrode and the drain electrode, so that a channel formation region having a higher resistance than the low-resistance region is formed and a first low-resistance region and a second low-resistance region between which the channel formation region is positioned are formed.

公开(公告)号：US20180190827A1

公开(公告)日：2018-07-05

申请号：US15908215

申请日：2018-02-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yutaka OKAZAKI ,  Daisuke MATSUBAYASHI ,  Yuichi SATO

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/78 ,  H01L21/441 ,  H01L29/45 ,  H01L29/423 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L21/441 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/7853 ,  H01L29/78603 ,  H01L29/78696 ,  H01L2029/42388

Abstract: A semiconductor device in which parasitic capacitance is reduced is provided. A first insulating layer is deposited over a substrate. A first oxide insulating layer and an oxide semiconductor layer are deposited over the first insulating layer. A second oxide insulating layer is deposited over the oxide semiconductor layer and the first insulating layer. A second insulating layer and a first conductive layer are deposited over the second oxide insulating layer. A gate electrode layer, a gate insulating layer, and a third oxide insulating layer are formed by etching. A sidewall insulating layer including a region in contact with a side surface of the gate electrode layer is formed. A second conductive layer is deposited over the gate electrode layer, the sidewall insulating layer, the oxide semiconductor layer, and the first insulating layer. A third conductive layer is deposited over the second conductive layer. A low-resistance region is formed in the oxide semiconductor layer by performing heat treatment. An element contained in the second conductive layer moves from the second conductive layer to the oxide semiconductor layer side by performing the heat treatment. An element contained in the oxide semiconductor layer moves from the oxide semiconductor layer to the third conductive layer side by performing the heat treatment.

公开(公告)号：US20180166392A1

公开(公告)日：2018-06-14

申请号：US15825778

申请日：2017-11-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Daisuke MATSUBAYASHI

IPC: H01L23/532 ,  H01L23/485 ,  H01L27/01 ,  H01L29/08 ,  H01L29/423

CPC classification number: H01L23/53295 ,  H01L21/28 ,  H01L23/485 ,  H01L23/532 ,  H01L27/016 ,  H01L27/0688 ,  H01L27/10805 ,  H01L27/1156 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1259 ,  H01L29/08 ,  H01L29/0847 ,  H01L29/41 ,  H01L29/417 ,  H01L29/423 ,  H01L29/42368 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/7869

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first insulator over a substrate; an oxide over the first insulator; a second insulator over the oxide; a first conductor over the second insulator; a third insulator over the first conductor; a fourth insulator in contact with a side surface of the second insulator, a side surface of the first conductor, and a side surface of the third insulator; a fifth insulator in contact with a top surface of the oxide and a side surface of the fourth insulator; and a second conductor in contact with the top surface of the oxide and the fifth insulator. The level of the top surface of the fourth insulator is higher than the level of the top surface of the fifth insulator.

公开(公告)号：US20180076204A1

公开(公告)日：2018-03-15

申请号：US15804096

申请日：2017-11-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daisuke MATSUBAYASHI

IPC: H01L27/108 ,  H01L29/786 ,  C23C14/08 ,  H01L49/02 ,  H01L27/12 ,  H01L21/84 ,  H01L27/105 ,  H01L27/115 ,  H01L27/06

CPC classification number: H01L27/1085 ,  C23C14/08 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10891 ,  H01L27/10894 ,  H01L27/10897 ,  H01L27/115 ,  H01L27/11507 ,  H01L27/11514 ,  H01L27/1156 ,  H01L27/1203 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1255 ,  H01L28/40 ,  H01L29/78642 ,  H01L29/7869

Abstract: A memory device that is as small in area as possible and has an extremely long data retention period. A transistor with extremely low leakage current is used as a cell transistor of a memory element in a memory device. Moreover, in order to reduce the area of a memory cell, the transistor is formed so that its source and drain are stacked in the vertical direction in a region where a bit line and a word line intersect each other. Further, a capacitor is stacked above the transistor.

公开(公告)号：US20180033807A1

公开(公告)日：2018-02-01

申请号：US15658513

申请日：2017-07-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shinpei MATSUDA ,  Daigo ITO ,  Daisuke MATSUBAYASHI ,  Yasutaka SUZUKI ,  Etsuko KAMATA ,  Yutaka SHIONOIRI ,  Shuhei NAGATSUKA

IPC: H01L27/12 ,  H01L29/786 ,  H01L27/105 ,  H01L29/423

CPC classification number: H01L27/1251 ,  H01L27/1052 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/42384 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A highly reliable semiconductor device capable of retaining data for a long period is provided. The transistor includes a first gate electrode, a first gate insulator over the first gate electrode, a first oxide and a second oxide over the first gate insulator, a first conductor over the first oxide, a second conductor over the second oxide, a third oxide covering the first gate insulator, the first oxide, the first conductor, the second oxide, and the second conductor, a second gate insulator over the third oxide, and a second gate electrode over the second gate insulator. An end portion of the second gate electrode is positioned between an end portion of the first conductor and an end portion of the second conductor in a channel length direction.

公开(公告)号：US20170271523A1

公开(公告)日：2017-09-21

申请号：US15617696

申请日：2017-06-08

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazuya HANAOKA ,  Daisuke MATSUBAYASHI ,  Yoshiyuki KOBAYASHI ,  Shunpei YAMAZAKI ,  Shinpei MATSUDA

IPC: H01L29/786

Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.