公开(公告)号：US20110272700A1

公开(公告)日：2011-11-10

申请号：US13185931

申请日：2011-07-19

申请人： Tetsuji YAMAGUCHI ,  Kengo AKIMOTO ,  Hiroki KAYOIJI ,  Toru TAKAYAMA

发明人： Tetsuji YAMAGUCHI ,  Kengo AKIMOTO ,  Hiroki KAYOIJI ,  Toru TAKAYAMA

IPC分类号： H01L29/786

CPC分类号： H01L27/12 ,  H01L27/1248

摘要： An object of the present invention is to provide a method for manufacturing a thin film transistor which enables heat treatment aimed at improving characteristics of a gate insulating film such as lowering of an interface level or reduction in a fixed charge without causing a problem of misalignment in patterning due to expansion or shrinkage of glass. A method for manufacturing a thin film transistor of the present invention comprises the steps of heat-treating in a state where at least a gate insulating film is formed over a semiconductor film on which element isolation is not performed, simultaneously isolating the gate insulating film and the semiconductor film into an element structure, forming an insulating film covering a side face of an exposed semiconductor film, thereby preventing a short-circuit between the semiconductor film and a gate electrode. Expansion or shrinkage of a glass substrate during the heat treatment can be prevented from affecting misalignment in patterning since the gate insulating film and the semiconductor film are simultaneously processed into element shapes after the heat treatment.

摘要翻译： 本发明的目的是提供一种薄膜晶体管的制造方法，其能够进行旨在提高栅极绝缘膜的特性的热处理，例如降低界面电平或降低固定电荷，而不会引起不对准的问题 由于玻璃的膨胀或收缩造成图案化。 本发明的薄膜晶体管的制造方法包括以下步骤：在不进行元件隔离的半导体膜上形成至少栅极绝缘膜的状态下进行热处理，同时隔离栅极绝缘膜和 将半导体膜形成为元件结构，形成覆盖露出的半导体膜的侧面的绝缘膜，由此防止半导体膜与栅电极之间的短路。 由于栅极绝缘膜和半导体膜在热处理后同时被加工成元件形状，所以可以防止热处理期间的玻璃基板的膨胀或收缩，从而影响图案中的未对准。

公开(公告)号：US20100290496A1

公开(公告)日：2010-11-18

申请号：US12697651

申请日：2010-02-01

申请人： Toru TAKAYAMA ,  Tomoya Satoh

发明人： Toru TAKAYAMA ,  Tomoya Satoh

IPC分类号： H01S5/22 ,  H01S5/30 ,  H01S5/323

CPC分类号： H01S5/22 ,  H01S5/0655 ,  H01S5/10 ,  H01S5/1064 ,  H01S5/2219 ,  H01S5/32341

摘要： A nitride semiconductor laser device includes: an active layer made of a nitride formed on a semiconductor substrate; a stripe-shaped ridge waveguide including a cladding layer having a ridge structure in its upper portion, formed on the active layer; a first current blocking layer transparent to light generated from the active layer, formed at least on a side face of the ridge waveguide; a second current blocking layer having light absorbency, formed on a flat portion of the cladding layer on each side of the ridge waveguide at a position spaced from the side face of the waveguide; and a third current blocking layer formed on the first and second current blocking layers, wherein ηg>η1, ηg>η2, and ηg

摘要翻译： 氮化物半导体激光器件包括：形成在半导体衬底上的由氮化物制成的有源层; 形成在活性层上的包括在其上部具有脊状结构的包覆层的条状脊状波导; 至少在脊形波导的侧面上形成对从有源层产生的光透明的第一电流阻挡层; 具有光吸收性的第二电流阻挡层形成在与波导的侧面间隔开的位置处的脊波导的每一侧上的包覆层的平坦部分上; 以及形成在所述第一和第二电流阻挡层上的第三电流阻挡层，其中所述第一电流阻挡层和所述第二电流阻挡层的第一电流阻挡层和第二电流阻挡层上的第一电流阻挡层和第二电流阻挡层。 2，＆eegr 3，和e e g g分别是第一，第二和第三电流阻挡层和氮化镓的热膨胀系数。

公开(公告)号：US20090285254A1

公开(公告)日：2009-11-19

申请号：US12392452

申请日：2009-02-25

申请人： Toru TAKAYAMA ,  Hiroki Nagai ,  Hitoshi Sato ,  Tomoya Satoh ,  Isao Kidoguchi

发明人： Toru TAKAYAMA ,  Hiroki Nagai ,  Hitoshi Sato ,  Tomoya Satoh ,  Isao Kidoguchi

IPC分类号： H01S5/026

CPC分类号： H01S5/32325 ,  H01S5/0224 ,  H01S5/026 ,  H01S5/0425 ,  H01S5/2218 ,  H01S5/3202 ,  H01S5/32316 ,  H01S5/4087

摘要： A semiconductor laser device has a red laser element and an infrared laser element on a substrate. The red laser element has a double hetero structure in which an InGaP-based or AlGaInP-based active layer is interposed between a first conductivity type cladding layer and a second conductivity type cladding layer having a ridge. The infrared laser element has a double hetero structure in which a GaAs-based or AlGaAs-based active layer is interposed between a first conductivity type cladding layer and a second conductivity type cladding layer having a ridge. Provided that a first electrode formed over the second conductivity type cladding layer has a width W1 in a direction perpendicular to a cavity length direction and a second electrode formed over the second conductivity type cladding layer has a width W2 in a direction perpendicular to a cavity length direction, the relations of W1>W2 and 80 μm≧W2≧60 μm are satisfied.

摘要翻译： 半导体激光装置在基板上具有红色激光元件和红外激光元件。 红色激光元件具有双异质结构，其中InGaP基或AlGaInP基有源层插入在具有脊的第一导电型包层和第二导电型包覆层之间。 红外激光元件具有双异质结构，其中在第一导电型包覆层和具有脊的第二导电型包覆层之间插入GaAs基或AlGaAs基有源层。 假设形成在第二导电类型包层上的第一电极在垂直于空腔长度方向的方向上具有宽度W1，并且形成在第二导电类型包层上的第二电极在垂直于腔长度的方向上具有宽度W2 方向，满足W1> W2和80mum> = W2> =60μm的关系。

公开(公告)号：US20070091955A1

公开(公告)日：2007-04-26

申请号：US11563506

申请日：2006-11-27

申请人： Toru TAKAYAMA

发明人： Toru TAKAYAMA

IPC分类号： H01S5/00

CPC分类号： H01S5/2231 ,  G11B7/123 ,  H01S5/02248 ,  H01S5/02292 ,  H01S5/0421 ,  H01S5/1014 ,  H01S5/162 ,  H01S5/2201 ,  H01S5/221

摘要： A semiconductor laser device is provided, in which an optical axis of a far-field pattern (FFP) is stabilized and which is capable of oscillating in a fundamental transverse mode up to a high output. An optical pickup apparatus also is provided, in which an optical axis of an FFP is stabilized and which is capable of being operated in fundamental transverse mode oscillation up to a high output. A semiconductor laser device is formed on a tilted substrate composed of a compound semiconductor, and includes an active layer and two cladding layers interposing the active layer therebetween. One of the cladding layers forms a mesa-shaped ridge. The ridge includes a first region where a width of a bottom portion of the ridge is substantially constant and a second region where the width of the bottom portion of the ridge is varied continuously. The second region is placed between the first region and an end face in an optical path.

摘要翻译： 提供了一种半导体激光器件，其中远场图案（FFP）的光轴被稳定并且能够以基本横向模式振荡到高输出。 还提供了一种光拾取装置，其中FFP的光轴是稳定的，并且能够在基本横向模式振荡下操作，直到高输出。 半导体激光装置形成在由化合物半导体构成的倾斜基板上，并且包括有源层和在其间插入有源层的两个包覆层。 包层之一形成台面状的脊。 脊包括脊的底部的宽度基本上恒定的第一区域和脊的底部的宽度连续变化的第二区域。 第二区域被放置在光路中的第一区域和端面之间。

公开(公告)号：US20130194003A1

公开(公告)日：2013-08-01

申请号：US13462070

申请日：2012-05-02

申请人： Toru TAKAYAMA ,  Hirotoshi Aizawa ,  Shinya Takeshita

发明人： Toru TAKAYAMA ,  Hirotoshi Aizawa ,  Shinya Takeshita

IPC分类号： H03K19/0948

CPC分类号： H03K19/0013 ,  H03K19/00361 ,  H03K19/018521

摘要： The driver circuit includes a first controlling circuit that outputs, to a gate of the auxiliary pMOS transistor, a first controlling signal that rises in synchronization with a rising of the first pulse signal and falls after a delay from a falling of the first pulse signal. The driver circuit includes a second controlling circuit that outputs, to a gate of the auxiliary nMOS transistor, a second controlling signal that rises in synchronization with a rising of the second pulse signal and falls after a delay from a falling of the second pulse signal.

摘要翻译： 驱动器电路包括第一控制电路，其向辅助pMOS晶体管的栅极输出与第一脉冲信号的上升同步上升的第一控制信号，并且在从第一脉冲信号的下降延迟之后落下。 驱动器电路包括第二控制电路，其向辅助nMOS晶体管的栅极输出与第二脉冲信号的上升同步上升的第二控制信号，并且在从第二脉冲信号的下降延迟之后下降。

公开(公告)号：US20120256607A1

公开(公告)日：2012-10-11

申请号：US13527678

申请日：2012-06-20

申请人： Kazutoshi NAKAMURA ,  Toru TAKAYAMA ,  Yuki KAMATA ,  Akio NAKAGAWA ,  Yoshinobu SANO ,  Toshiyuki NAKA

发明人： Kazutoshi NAKAMURA ,  Toru TAKAYAMA ,  Yuki KAMATA ,  Akio NAKAGAWA ,  Yoshinobu SANO ,  Toshiyuki NAKA

IPC分类号： G05F1/00

CPC分类号： H03K5/00006 ,  G06F1/08 ,  H02J1/00 ,  H02M3/156 ,  H03K2005/00293 ,  H03L7/0996 ,  Y10T307/50

摘要： A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.

摘要翻译： 一种半导体器件包括：具有多级的第一延迟元件的电压控制型时钟产生电路，其振荡频率根据施加到第一延迟元件的控制电压而被控制; 具有串联连接的多级第二延迟元件的延迟电路; 以及选择电路，从由各个第二延迟元件的多级输出的脉冲信号中选择一个。 第一延迟元件和第二延迟元件具有形成在同一半导体衬底上的相同结构，并且根据控制电压来调整第二延迟元件的延迟量。

公开(公告)号：US20120223305A1

公开(公告)日：2012-09-06

申请号：US13404516

申请日：2012-02-24

申请人： Hitomi SATO ,  Takayuki SAITO ,  Kosei NODA ,  Toru TAKAYAMA

发明人： Hitomi SATO ,  Takayuki SAITO ,  Kosei NODA ,  Toru TAKAYAMA

IPC分类号： H01L29/12

CPC分类号： H01L29/7869 ,  H01L27/10873 ,  H01L27/1156 ,  H01L29/4908 ,  H01L29/78603 ,  H01L29/78606

摘要： Provided is a highly reliable semiconductor device by giving stable electric characteristics to a transistor in which a semiconductor film whose threshold voltage is difficult to control is used as an active layer. By using a silicon oxide film having a negative fixed charge as a film in contact with the active layer of the transistor or a film in the vicinity of the active layer, a negative electric field is always applied to the active layer due to the negative fixed charge and the threshold voltage of the transistor can be shifted in the positive direction. Thus, the highly reliable semiconductor device can be manufactured by giving stable electric characteristics to the transistor.

摘要翻译： 提供了一种高可靠性的半导体器件，其通过对其中阈值电压难以控制的半导体膜用作有源层的晶体管给予稳定的电特性。 通过使用具有负固定电荷的氧化硅膜作为与晶体管的有源层或有源层附近的膜接触的膜，由于负固定，总是向有源层施加负电场 电荷和晶体管的阈值电压可以向正方向移动。 因此，可以通过给晶体管提供稳定的电特性来制造高度可靠的半导体器件。

公开(公告)号：US20100296542A1

公开(公告)日：2010-11-25

申请号：US12706636

申请日：2010-02-16

申请人： Satoshi MURASAWA ,  Toru TAKAYAMA ,  Yoshiaki HASEGAWA

发明人： Satoshi MURASAWA ,  Toru TAKAYAMA ,  Yoshiaki HASEGAWA

IPC分类号： H01S5/30

CPC分类号： H01S5/34333 ,  B82Y20/00 ,  H01L2224/48463 ,  H01S5/0202 ,  H01S5/0207 ,  H01S5/02276 ,  H01S5/0425 ,  H01S5/0655 ,  H01S5/1017 ,  H01S5/1082 ,  H01S5/3201 ,  H01S2301/18

摘要： A semiconductor laser apparatus includes, on a substrate, a first-conductivity type layer, an active layer, a second-conductivity type layer having a ridge extending along an optical waveguide direction, and a current blocking layer formed on sides of the ridge. The ridge is disposed to separate the substrate into a first region having a first width, and a second region having a second width greater than the first width, in a direction perpendicular to the optical waveguide direction. The second-conductivity type layer has a shock attenuating portion having a height greater than or equal to that of the ridge, on sides of the ridge. In the second region, a trench extending from an upper surface of the shock attenuating portion, penetrating at least the active layer, and reaching the first-conductivity type layer, is formed along the optical waveguide direction.

摘要翻译： 半导体激光装置在基板上包括第一导电型层，有源层，具有沿着光波导方向延伸的脊的第二导电型层，以及形成在堤脊侧面的电流阻挡层。 脊设置成在垂直于光波导方向的方向上将基板分离成具有第一宽度的第一区域和具有大于第一宽度的第二宽度的第二区域。 第二导电型层具有在脊的侧面上具有大于或等于脊的高度的冲击衰减部分。 在第二区域中，沿着光波导方向形成从冲击衰减部的上表面延伸穿过至少有源层并到达第一导电型层的沟槽。

公开(公告)号：US20100124244A1

公开(公告)日：2010-05-20

申请号：US12556986

申请日：2009-09-10

申请人： Atsushi HIGUCHI ,  Toru TAKAYAMA ,  Hiroki NAGAI ,  Kouji MAKITA

发明人： Atsushi HIGUCHI ,  Toru TAKAYAMA ,  Hiroki NAGAI ,  Kouji MAKITA

IPC分类号： H01S5/323 ,  H01S5/30 ,  H01S5/00

CPC分类号： H01S5/22 ,  B82Y20/00 ,  G11B7/127 ,  H01S5/0014 ,  H01S5/162 ,  H01S5/2214 ,  H01S5/2218 ,  H01S5/3211 ,  H01S5/34313 ,  H01S2301/18

摘要： A semiconductor laser device includes a semiconductor layer including an active layer. The active layer includes: a gain region; an end face window region formed in a region of the active layer including an end face of the semiconductor layer, and having a larger band gap energy than the gain region; and a transition region formed between the gain region and the end face window region. The band gap energy of the transition region continuously changes from the band gap energy of the gain region to that of the end face window region. The gain region and a portion of the transition region located near the gain region form a current injection portion into which current is injected. The end face window region and a portion of the transition region located near the end face window region form a current non-injection portion into which current is prevented from being injected.

摘要翻译： 半导体激光器件包括具有有源层的半导体层。 有源层包括：增益区; 形成在所述有源层的包括所述半导体层的端面并且具有比所述增益区域更大的带隙能量的区域中的端面窗口区域; 以及形成在增益区域和端面窗口区域之间的过渡区域。 过渡区域的带隙能量从增益区域的带隙能量连续地变化到端面窗口区域的带隙能量。 位于增益区附近的增益区域和过渡区域的一部分形成注入电流的电流注入部分。 端面窗区域和位于端面窗区域附近的过渡区域的一部分形成电流被防止注入的电流非注入部分。

公开(公告)号：US20100081247A1

公开(公告)日：2010-04-01

申请号：US12579642

申请日：2009-10-15

申请人： Hongyong ZHANG ,  Hideki UOCHI ,  Toru TAKAYAMA ,  Takeshi FUKUNAGA ,  Yasuhiko TAKEMURA

发明人： Hongyong ZHANG ,  Hideki UOCHI ,  Toru TAKAYAMA ,  Takeshi FUKUNAGA ,  Yasuhiko TAKEMURA

IPC分类号： H01L21/268

CPC分类号： H01L21/02672 ,  G09G2300/0408 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/1251 ,  H01L27/1277 ,  H01L27/1281 ,  H01L29/66757

摘要： A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film an a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.

摘要翻译： 提供了使用晶体硅膜制造诸如薄膜晶体管的半导体器件的方法。 通过选择性地形成包含镍，铁，钴，钌，铑，钯，锇，铱，铂，钪，钛，钒，铬，锰，铜，锌，金，银的薄膜，颗粒或簇而获得晶体硅膜 或其硅化物以岛状，线状，条状，点状或薄膜形式存在于非晶硅膜上或下方，并以它们为起始点，通过在比非晶硅的正常结晶温度低的温度下进行退火， 。 通过选择性地形成覆盖膜来形成具有薄膜晶体管的动态电路，同时获得漏电流低的晶体管和迁移率高的晶体管，即将成为有源层的半导体层 晶体管，然后通过其热结晶。