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244 条记录 (耗时 0.036 秒)

    Enhanced T-gate structure for modulation doped field effect transistors
    51.
    发明授权
    Enhanced T-gate structure for modulation doped field effect transistors 有权
    用于调制掺杂场效应晶体管的增强型T栅极结构

    公开(公告)号：US06972440B2

    公开(公告)日：2005-12-06

    申请号：US10750697

    申请日：2004-01-02

    申请人： Dinkar Singh ,  Katherine Lynn Saenger ,  Vishnubhai V. Patel ,  Alfred Grill ,  Steven John Koester

    发明人： Dinkar Singh ,  Katherine Lynn Saenger ,  Vishnubhai V. Patel ,  Alfred Grill ,  Steven John Koester

    IPC分类号： H01L21/285 ,  H01L29/423 ,  H01L31/0328

    CPC分类号： H01L21/28587 ,  H01L29/42316

    摘要： A structure and a method are disclosed of an enhanced T-gate for modulation doped field effect transistors (MODFETs). The enhanced T-gate has insulator spacer layers sandwiching the neck portion of the T-gate. The spacer layers are thinner than the T-bar portion overhang. The insulating layer provides mechanical support and protects the vulnerable neck portion of the T-gate from chemical attack during subsequent device processing, making the T-gate structure highly scalable and improving yield. The use of thin conformal low dielectric constant insulating layers ensures a low parasitic gate capacitance, and reduces the risk of shorting gate and source metallurgy when source-to-gate spacings are reduced to smaller dimensions.

    摘要翻译： 公开了用于调制掺杂场效应晶体管（MODFET）的增强型T栅极的结构和方法。 增强型T型栅极具有夹持T型栅极颈部的绝缘体隔离层。 间隔层比T形杆部分突出部薄。 绝缘层提供机械支撑并保护T型门的易损颈部在后续装置处理过程中不会发生化学侵蚀，从而使T型门结构具有高度的可伸缩性并提高产量。 使用薄的共形低介电常数绝缘层确保低的寄生栅极电容，并且当源极到栅极间隔减小到更小的尺寸时，可以降低栅极和源极冶金的短路的风险。

    Method for fabricating an ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device
    56.
    发明授权
    Method for fabricating an ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device 有权
    在半导体器件中制造超低介电常数材料作为层间或层间电介质的方法

    公开(公告)号：US06756323B2

    公开(公告)日：2004-06-29

    申请号：US09938949

    申请日：2001-08-24

    申请人： Alfred Grill ,  Vishnubhai V. Patel

    发明人： Alfred Grill ,  Vishnubhai V. Patel

    IPC分类号： H01L2131

    CPC分类号： H01L21/02126 ,  C23C16/401 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/3122 ,  H01L21/31633 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method for fabricating a thermally stable ultralow dielectric constant film comprising Si, C, O and H atoms in a parallel plate chemical vapor deposition process utilizing plasma enhanced chemical vapor deposition (“PECVD”) process is disclosed. To enable the fabrication of thermally stable ultralow dielectric constant film, specific precursor materials are used, such as, cyclic siloxanes and organic molecules containing ring structures, for instance, tetramethylcycloterasiloxane and cyclopentene oxide. To stabilize plasma in the PECVD reactor and thereby improve uniformity of the deposited film, CO2 is added to TMCTS as a carrier gas, or CO2 or a mixture of CO2 and O2 are added to the PECVD reactor.

    摘要翻译： 公开了一种使用等离子体增强化学气相沉积（“PECVD”）工艺在平行板化学气相沉积工艺中制造包含Si，C，O和H原子的热稳定超低介电常数膜的方法。 为了制造热稳定的超低介电常数膜，使用特定的前体材料，例如环状硅氧烷和含有环结构的有机分子，例如四甲基环四硅氧烷和环戊烯氧化物。 为了稳定PECVD反应器中的等离子体，从而提高沉积膜的均匀性，将CO 2作为载气添加到TMCTS中，或者将CO 2或CO 2和O 2的混合物加入到PECVD反应器中。

    Multilevel interconnect structure containing air gaps and method for making
    57.
    发明授权
    Multilevel interconnect structure containing air gaps and method for making 有权
    包含气隙的多层互连结构和制造方法

    公开(公告)号：US06737725B2

    公开(公告)日：2004-05-18

    申请号：US10144574

    申请日：2002-05-13

    申请人： Alfred Grill ,  Jeffrey Curtis Hedrick ,  Christopher Vincent Jahnes ,  Satyanarayana Venkata Nitta ,  Kevin S. Petrarca ,  Sampath Purushothaman ,  Katherine Lynn Saenger ,  Stanley Joseph Whitehair

    发明人： Alfred Grill ,  Jeffrey Curtis Hedrick ,  Christopher Vincent Jahnes ,  Satyanarayana Venkata Nitta ,  Kevin S. Petrarca ,  Sampath Purushothaman ,  Katherine Lynn Saenger ,  Stanley Joseph Whitehair

    IPC分类号： H01L2900

    CPC分类号： H01L21/7682 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76885

    摘要： A method for forming a multilayer interconnect structure on a substrate that include interconnected conductive wiring and vias spaced apart by a combination of solid or gaseous dielectrics. The inventive method includes the steps of: (a) forming a first planar via plus line level pair embedded in a dielectric matrix formed from one or more solid dielectrics and comprising a via level dielectric and a line level dielectric on a substrate, wherein, at least one of said solid dielectrics is at least partially sacrificial; (b) etching back sacrificial portions of said at least partially sacrificial dielectrics are removed to leave cavities extending into and through said via level, while leaving, at least some of the original via level dielectric as a permanent dielectric under said lines; (c) partially filling or overfilling said cavities with a place-holder material which may or may not be sacrificial; (d) planarizing the structure by removing overfill of said place-holder material; (e) repeating, as necessary, steps (a)-(d); (f) forming a dielectric bridge layer over the planar structure; and (g) forming air gaps by at least partially extracting said place-holder material.

    摘要翻译： 一种在衬底上形成多层互连结构的方法，其包括互连的导电布线和通过固体或气体电介质的组合间隔开的通孔。 本发明的方法包括以下步骤：（a）形成嵌入在由一个或多个固体电介质形成的电介质矩阵中并且包括通孔层电介质和衬底上的线路电介质的介电矩阵中的第一平面通孔加线电平对，其中，在 至少一个所述固体电介质至少部分地是牺牲的; （b）蚀刻所述至少部分牺牲电介质的牺牲部分被去除以留下延伸进入并穿过所述通孔级的空腔，同时留下至少一些原始通孔级电介质作为所述线下的永久电介质; （c）用可能牺牲或可能不是牺牲的位置保持材料部分填充或过度填充所述空腔; （d）通过去除所述位置保持器材料的过量填充来平坦化结构; （e）必要时重复步骤（a） - （d）; （f）在所述平面结构上形成电介质桥接层; 和（g）通过至少部分地提取所述放置支架材料形成气隙。

    Method for fabricating a thermally stable diamond-like carbon film as an intralevel or interlevel dielectric in a semiconductor device and device made
    59.
    发明授权
    Method for fabricating a thermally stable diamond-like carbon film as an intralevel or interlevel dielectric in a semiconductor device and device made 失效
    在半导体器件和器件中制造作为层间或层间电介质的热稳定的类金刚石碳膜的方法

    公开(公告)号：US06346747B1

    公开(公告)日：2002-02-12

    申请号：US09329004

    申请日：1999-06-09

    申请人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel

    发明人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel

    IPC分类号： H01L2348

    CPC分类号： C23C16/5096 ,  C23C16/26 ,  C23C16/56 ,  H01L21/3146 ,  Y10S427/103 ,  Y10S427/104

    摘要： A method for fabricating a thermally stable carbon-based low dielectric constant film such as a hydrogenated amorphous carbon film or a diamond-like carbon film in a parallel plate chemical vapor deposition process utilizing plasma enhanced chemical vapor deposition process is disclosed. Electronic devices containing insulating layers of thermally stable carbon-based low dielectric constant materials that are prepared by the method are further disclosed. In order to render the carbon-based low dielectric constant film thermally stable, i.e., at a temperature of at least 400° C., the films are heat treated at a temperature of not less than 350° C. for at least 0.5 hour. To enable the fabrication of thermally stable carbon-based low dielectric constant film, specific precursor materials such as cyclic hydrocarbons should be used, for instance, cyclohexane or benzene. The geometry of the chemical vapor deposition chamber is important in making the present invention thermally stable low dielectric constant films in order to achieve a specific bias voltage on the substrate onto which the electronic structure is formed.

    摘要翻译： 公开了一种利用等离子体增强化学气相沉积工艺在平行板化学气相沉积工艺中制造热稳定性碳基低介电常数膜的方法，例如氢化无定形碳膜或类金刚石碳膜。 还公开了通过该方法制备的含有热稳定性碳基低介电常数材料绝缘层的电子器件。 为了使碳基低介电常数膜热稳定，即在至少400℃的温度下，将膜在不低于350℃的温度下热处理至少0.5小时。 为了制造热稳定性的碳系低介电常数膜，可以使用环状烃等环状烃等特定的前体材料。 化学气相沉积室的几何形状对于使本发明热稳定的低介电常数膜是重要的，以便在其上形成电子结构的基板上实现特定的偏置电压。