GATED DIODE STRUCTURE FOR ELIMINATING RIE DAMAGE FROM CAP REMOVAL
    63.
    发明申请
    GATED DIODE STRUCTURE FOR ELIMINATING RIE DAMAGE FROM CAP REMOVAL 失效
    用于消除从盖拆卸中的RIE损伤的栅极二极管结构

    公开(公告)号:US20130328124A1

    公开(公告)日:2013-12-12

    申请号:US13489537

    申请日:2012-06-06

    Abstract: A semiconductor structure provided with a plurality of gated-diodes having a silicided anode (p-doped region) and cathode (n-doped region) and a high-K gate stack made of non-silicided gate material, the gated-diodes being adjacent to FETs, each of which having a silicided source, a silicided drain and a silicided HiK gate stack. The semiconductor structure eliminates a cap removal RIE in a gate first High-K metal gate flow from the region of the gated-diode. The lack of silicide and the presence of a nitride barrier on the gate of the diode are preferably made during the gate first process flow. The absence of the cap removal RIE is beneficial in that diffusions of the diode are not subjected to the cap removal RIE, which avoids damage and allows retaining its highly ideal junction characteristics.

    Abstract translation: 一种半导体结构,其具有多个具有硅化阳极(p掺杂区域)和阴极(n掺杂区域)的门控二极管和由非硅化栅极材料制成的高K栅极堆叠,该门控二极管相邻 其中每一个具有硅化源,硅化物漏极和硅化HiK栅极叠层。 半导体结构消除了栅极第一高K金属栅极流从栅极二极管的区域流出的帽去除RIE。 优选在栅极第一工艺流程期间,在二极管的栅极上缺少硅化物和存在氮化物阻挡层。 没有帽去除RIE是有益的,因为二极管的扩散不经受帽去除RIE,这避免了损伤并且允许保持其高度理想的结特性。

    Structure and method for manufacturing asymmetric devices
    64.
    发明授权
    Structure and method for manufacturing asymmetric devices 有权
    用于制造不对称装置的结构和方法

    公开(公告)号:US08482075B2

    公开(公告)日:2013-07-09

    申请号:US13468270

    申请日:2012-05-10

    Abstract: A plurality of gate structures are formed on a substrate. Each of the gate structures includes a first gate electrode and source and drain regions. The first gate electrode is removed from each of the gate structures. A first photoresist is applied to block gate structures having source regions in a source-down direction. A first halo implantation is performed in gate structures having source regions in a source-up direction at a first angle. The first photoresist is removed. A second photoresist is applied to block gate structures having source regions in a source-up direction. A second halo implantation is performed in gate structures having source regions in a source-down direction at a second angle. The second photoresist is removed. Replacement gate electrodes are formed in each of the gate structures.

    Abstract translation: 在基板上形成多个栅极结构。 每个栅极结构包括第一栅极电极和源极和漏极区域。 从每个栅极结构去除第一栅电极。 施加第一光致抗蚀剂以在源向下方向上阻挡具有源极区的栅极结构。 在栅极结构中进行第一光晕注入,其栅源结构的源极区域在源极方向上以第一角度。 去除第一光致抗蚀剂。 施加第二光致抗蚀剂以阻挡在源向上方向上具有源极区的栅极结构。 在栅极结构中进行第二光晕注入,其栅源结构的源极区域以源向下方向为第二角度。 去除第二光致抗蚀剂。 在每个栅极结构中形成替代栅电极。

    PRODUCT TRACKING SYSTEM
    66.
    发明申请
    PRODUCT TRACKING SYSTEM 有权
    产品追踪系统

    公开(公告)号:US20130060813A1

    公开(公告)日:2013-03-07

    申请号:US13224231

    申请日:2011-09-01

    CPC classification number: G06Q10/0833 G06F21/35 G06F21/6209 G06F2221/2101

    Abstract: A method, programmed medium and system are disclosed which provide increased secure tracking of materials and products through the use of a unique coding scheme. The coding scheme contains a unique security code identifier issued by a sole certification agency, and includes a non-coded scheme for public information, and a coded scheme for private information regarding the sourcing and development of materials and products. The disclosure provides for full tracking of a product throughout the supply chain by only certified participants. The disclosed system allows for increased secure tracking of materials and products, and allows for access to greater amounts of information at various stages of manufacture and/or assembly regarding a given material or product.

    Abstract translation: 公开了一种通过使用唯一编码方案提供对材料和产品的安全跟踪的方法,编程介质和系统。 编码方案包含由唯一的认证机构签发的唯一的安全代码标识符,并且包括用于公开信息的非编码方案,以及关于材料和产品的采购和开发的私人信息的编码方案。 本披露提供了只有认证参与者在整个供应链中完全跟踪产品。 所公开的系统允许增加对材料和产品的安全跟踪,​​并允许在关于给定材料或产品的制造和/或组装的各个阶段获得更多量的信息。

    Electrical mask inspection
    68.
    发明授权
    Electrical mask inspection 失效
    电气面罩检查

    公开(公告)号:US08343781B2

    公开(公告)日:2013-01-01

    申请号:US12886612

    申请日:2010-09-21

    CPC classification number: H01L23/544 H01L22/34 H01L2924/0002 H01L2924/00

    Abstract: An apparatus and method for electrical mask inspection is disclosed. A scan chain is formed amongst two metal layers and a via layer. One of the three layers is a functional layer under test, and the other two layers are test layers. A resistance measurement of the scan chain is used to determine if a potential defect exists within one of the vias or metal segments comprising the scan chain.

    Abstract translation: 公开了一种用于电气掩模检查的装置和方法。 在两个金属层和通孔层之间形成扫描链。 三层之一是被测功能层,另外两层是测试层。 使用扫描链的电阻测量来确定在包括扫描链的通孔或金属段之一内是否存在潜在缺陷。

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