公开(公告)号：US20100175790A1

公开(公告)日：2010-07-15

申请号：US12731369

申请日：2010-03-25

Applicant: Eric Duchesne ,  Kang-Wook Lee ,  Valerie Oberson

Inventor： Eric Duchesne ,  Kang-Wook Lee ,  Valerie Oberson

IPC: B23K35/34 ,  B23K35/36

CPC classification number: B23K35/362 ,  Y10T428/12493

Abstract: The invention relates to a composition of matter comprising a soldering flux, wherein the flux consists essentially of a combination of a fluxing agent and a solvent, and wherein the fluxing agent comprises a keto acid such as levulinic acid or acetylbutyric acid. The flux may also comprises an ester acid, or comprises a mixture of the keto acid with the ester acid. The solvent comprises a mixture of a tacky solvent with a non-tacky solvent. The invention also relates to a process comprising soldering at least two surfaces together, each of which comprises a metal area to which solder can adhere by employing the following steps in any order: applying solder to at least one of the metal areas, aligning the metal areas so that they are superimposed over one another, heating at least one of the areas to a temperature that comprises at least the melting temperature of the solder. The last step comprises joining the superimposed areas to one another. The process employs the flux composition operatively associated with the solder, and in one embodiment the invention comprises a mixture of the flux composition with powdered solder. In another embodiment, the process comprises IMS, C4 and C4NP processes and the solder comprises a lead free solder. The invention also comprises a product produced by the foregoing process or processes.

Abstract translation: 本发明涉及包含助焊剂的物质组合物，其中助熔剂基本上由助熔剂和溶剂的组合组成，并且其中助熔剂包括酮酸，例如乙酰丙酸或乙酰基丁酸。 助熔剂还可以包含酯酸，或包含酮酸与酯酸的混合物。 溶剂包括粘性溶剂与非粘性溶剂的混合物。 本发明还涉及一种方法，其包括将至少两个表面焊接在一起，每个表面包括金属区域，焊料可以以任何顺序通过以下步骤粘附到该金属区域：将焊料施加到至少一个金属区域，使金属对准 区域，使得它们彼此叠加，将至少一个区域加热至至少包括焊料的熔化温度的温度。 最后一步包括将叠加的区域相互连接。 该方法使用与焊料可操作地相关联的助熔剂组合物，并且在一个实施方案中，本发明包括焊剂组合物与粉末焊料的混合物。 在另一个实施方案中，该方法包括IMS，C4和C4NP方法，焊料包括无铅焊料。 本发明还包括通过前述方法或方法生产的产品。

公开(公告)号：US20100017037A1

公开(公告)日：2010-01-21

申请号：US12320071

申请日：2009-01-15

Applicant: Hyuk Nam ,  Kang-Wook Lee ,  Seung-Hyoung Ha ,  Geun-Hyoung Lee

Inventor： Hyuk Nam ,  Kang-Wook Lee ,  Seung-Hyoung Ha ,  Geun-Hyoung Lee

IPC: G05B15/00 ,  H02P1/50 ,  H02K21/12 ,  H02K3/12 ,  F25D23/00 ,  F25B1/10 ,  F25B7/00

CPC classification number: F25B49/025 ,  F25B2400/0751 ,  F25B2500/26 ,  F25B2600/021 ,  F25B2600/0251 ,  Y02B30/741

Abstract: Provided is an air conditioning system comprised of a plurality of indoor units connected to each other in parallel, each having an expansion valve, and an outdoor unit including a plurality of compressors, in which at least one of the compressors provided to the outdoor unit is a capacity modulation compressor including an electromotive driving unit for driving a plurality of compression units capable of selectively compressing a working fluid, and the electromotive driving unit for the capacity modulation compressor has a stator with a coil wound around thereon and a rotor rotating inside the stator, the rotor being an LSPRM including a rotor core, flux barriers, permanent magnets and conductive bars.

Abstract translation: 本发明提供一种空调系统，包括并联连接的多个室内机组，各室具有膨胀阀，以及包括多个压缩机的室外机组，其中设置于室外机组的至少一个压缩机为 一种容量调制压缩机，包括用于驱动能够选择性地压缩工作流体的多个压缩单元的电动驱动单元，并且用于容量调节压缩机的电动驱动单元具有卷绕在其上的线圈的定子和在定子内旋转的转子 转子是包括转子芯，磁通屏障，永磁体和导电棒的LSPRM。

公开(公告)号：US07588964B2

公开(公告)日：2009-09-15

申请号：US11790173

申请日：2007-04-24

Applicant: Yong-Chai Kwon ,  Dong-Ho Lee ,  Myung-Kee Chung ,  Kang-Wook Lee ,  Sun-Won Kang ,  Keum-Hee Ma

Inventor： Yong-Chai Kwon ,  Dong-Ho Lee ,  Myung-Kee Chung ,  Kang-Wook Lee ,  Sun-Won Kang ,  Keum-Hee Ma

IPC: H01L23/02

CPC classification number: H01L25/0657 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/12 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/90 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/83856 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

Abstract: A stacked structure of semiconductor devices may include a plurality of stacked semiconductor devices, each having an upper surface and a lower surface and one or more via electrodes protruding from the upper surface to the lower surface. The via-electrodes may have upper parts (heads) protruding from the upper surface and lower parts (ends) protruding from the lower surface. The stacked semiconductor devices may be electrically connected to each other through the via-electrodes. A first adhesive film (e.g., patternable material) and a second adhesive film (e.g. puncturable material) may be formed between the stacked semiconductor devices. The stacked structure of semiconductor devices may be mounted on the upper surface of a printed circuit board (PCB) having a mount-specific adhesive film to form a semiconductor device package. The mounted stacked structure and the upper surface of the PCB may be further covered with a molding material.

Abstract translation: 半导体器件的层叠结构可以包括多个层叠的半导体器件，每个具有上表面和下表面以及从上表面到下表面突出的一个或多个通孔电极。 通孔电极可以具有从上表面突出的上部（头）和从下表面突出的下部（端部）。 层叠的半导体器件可以通过通孔电极彼此电连接。 可以在层叠的半导体器件之间形成第一粘合膜（例如，可图案化材料）和第二粘合膜（例如可刺穿材料）。 半导体器件的堆叠结构可以安装在具有安装专用粘合剂膜的印刷电路板（PCB）的上表面上以形成半导体器件封装。 安装的堆叠结构和PCB的上表面可以进一步被模制材料覆盖。

公开(公告)号：US20090209063A1

公开(公告)日：2009-08-20

申请号：US12385855

申请日：2009-04-22

Applicant: Kang-Wook Lee ,  Gu-Sung Kim ,  Dong-Hyeon Jang ,  Seung-Duk Baek ,  Jae-sik Chung

Inventor： Kang-Wook Lee ,  Gu-Sung Kim ,  Dong-Hyeon Jang ,  Seung-Duk Baek ,  Jae-sik Chung

IPC: H01L21/50 ,  H01L21/768

CPC classification number: H01L25/50 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05569 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  Y02P80/30 ,  Y10S438/977 ,  Y10T436/104998 ,  Y10T436/108331 ,  Y10T436/17 ,  Y10T436/175383 ,  H01L2224/81 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for manufacturing chip stack packages may include: providing at least two wafers, each wafer having a plurality of chips, and scribe lanes formed between and separating adjacent chips; forming a plurality of via holes in peripheral portions of the scribe lanes; forming connection vias by filling the via holes; establishing electrical connections between the chip pads and corresponding connection vias; removing material from the back sides of the wafers to form thinned wafers; separating the thinned wafers into individual chips by removing a central portion of each scribe lane; attaching a first plurality of individual chips to a test wafer; attaching a second plurality of individual chips to the first plurality of individual chips to form a plurality of chip stack structures; encapsulating the plurality of chip stack structures; and separating the plurality of chip stack structures to form individual chip stack packages.

Abstract translation: 用于制造芯片堆叠封装的方法可以包括：提供至少两个晶片，每个晶片具有多个芯片，以及在相邻芯片之间形成并分隔相邻芯片的划线; 在划线的周边部分形成多个通孔; 通过填充通孔形成连接通孔; 建立芯片焊盘和相应的连接通孔之间的电连接; 从晶片的背面去除材料以形成薄的晶片; 通过去除每个划线的中心部分将薄的晶片分离成单独的芯片; 将第一多个独立芯片附接到测试晶片; 将第二多个独立芯片附接到所述第一多个独立芯片以形成多个芯片堆叠结构; 封装所述多个芯片堆叠结构; 以及分离所述多个芯片堆叠结构以形成单独的芯片堆叠封装。

公开(公告)号：US20090124072A1

公开(公告)日：2009-05-14

申请号：US12270386

申请日：2008-11-13

Applicant: Ki-Tae PARK ,  Kang-Wook LEE ,  Hyun-Kyoung KIM

Inventor： Ki-Tae PARK ,  Kang-Wook LEE ,  Hyun-Kyoung KIM

IPC: H01L21/44

CPC classification number: H01L23/5384 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/05 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate, and a through electrode passing through the substrate. The semiconductor device has a pad region and a through electrode region. A pad covers the pad region, extends into the through electrode region, and delimits an opening in the through electrode region. A through electrode extends through the semiconductor substrate below the hole in the pad in the through region.

Abstract translation: 半导体器件包括衬底和穿过衬底的通孔。 半导体器件具有焊盘区域和贯通电极区域。 焊盘覆盖焊盘区域，延伸到通孔电极区域中，并限定通孔电极区域中的开口。 穿通电极通过穿通区域中的垫中的孔下方的半导体衬底延伸。

公开(公告)号：US20080169545A1

公开(公告)日：2008-07-17

申请号：US11790173

申请日：2007-04-24

Applicant: Yong-Chai Kwon ,  Dong-Ho Lee ,  Myung-Kee Chung ,  Kang-Wook Lee ,  Sun-Won Kang ,  Keum-Hee Ma

Inventor： Yong-Chai Kwon ,  Dong-Ho Lee ,  Myung-Kee Chung ,  Kang-Wook Lee ,  Sun-Won Kang ,  Keum-Hee Ma

IPC: H01L23/02 ,  H01L21/00

CPC classification number: H01L25/0657 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/12 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/90 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/83856 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

Abstract: A stacked structure of semiconductor devices may include a plurality of stacked semiconductor devices, each having an upper surface and a lower surface and one or more via electrodes protruding from the upper surface to the lower surface. The via-electrodes may have upper parts (heads) protruding from the upper surface and lower parts (ends) protruding from the lower surface. The stacked semiconductor devices may be electrically connected to each other through the via-electrodes. A first adhesive film (e.g., patternable material) and a second adhesive film (e.g. puncturable material) may be formed between the stacked semiconductor devices. The stacked structure of semiconductor devices may be mounted on the upper surface of a printed circuit board (PCB) having a mount-specific adhesive film to form a semiconductor device package. The mounted stacked structure and the upper surface of the PCB may be further covered with a molding material.

Abstract translation: 半导体器件的层叠结构可以包括多个层叠的半导体器件，每个具有上表面和下表面以及从上表面到下表面突出的一个或多个通孔电极。 通孔电极可以具有从上表面突出的上部（头）和从下表面突出的下部（端部）。 层叠的半导体器件可以通过通孔电极彼此电连接。 可以在层叠的半导体器件之间形成第一粘合膜（例如，可图案化材料）和第二粘合膜（例如可刺穿材料）。 半导体器件的堆叠结构可以安装在具有安装专用粘合剂膜的印刷电路板（PCB）的上表面上以形成半导体器件封装。 安装的堆叠结构和PCB的上表面可以进一步被模制材料覆盖。

公开(公告)号：US07371614B2

公开(公告)日：2008-05-13

申请号：US11342799

申请日：2006-01-31

Applicant: Yong-Chai Kwon ,  Suk-Chae Kang ,  Kang-Wook Lee ,  Gu-Sung Kim ,  Jong-Woo Kim ,  Seong-Il Han ,  Sun-Wook Heo ,  Jung-Hang Yi ,  Keum-Hee Ma

Inventor： Yong-Chai Kwon ,  Suk-Chae Kang ,  Kang-Wook Lee ,  Gu-Sung Kim ,  Jong-Woo Kim ,  Seong-Il Han ,  Sun-Wook Heo ,  Jung-Hang Yi ,  Keum-Hee Ma

IPC: H01L21/50 ,  H01L21/48 ,  H01L21/44

CPC classification number: H04N5/2253 ,  H01L27/14618 ,  H01L27/14632 ,  H01L27/14687 ,  H01L2224/48095 ,  H01L2924/16235 ,  H01L2924/00014

Abstract: An image sensor device and methods thereof. In an example method, a protective layer may be formed over at least one microlens. An adhesive layer may be formed over the protective layer. The adhesive layer may be removed so as to expose the protective layer. The protective layer may be removed so as to expose the at least one microlens, the exposed at least one microlens not including residue from the adhesive layer. The at least one microlens may have an improved functionality due at least in part to the lack of residue from the adhesive layer. In an example, the at least one microlens may be included in an image sensor module.

Abstract translation: 一种图像传感器装置及其方法。 在示例性方法中，可以在至少一个微透镜上形成保护层。 可以在保护层上形成粘合剂层。 可以去除粘合剂层以暴露保护层。 可以去除保护层，以便露出至少一个微透镜，暴露的至少一个微透镜不包括来自粘合剂层的残留物。 由于至少部分地由于粘合剂层缺乏残留物而使至少一个微透镜具有改进的功能。 在一个示例中，至少一个微透镜可以包括在图像传感器模块中。

公开(公告)号：US07262475B2

公开(公告)日：2007-08-28

申请号：US11177335

申请日：2005-07-11

Applicant: Yong-Chai Kwon ,  Kang-Wook Lee ,  Gu-Sung Kim ,  Seong-Il Han ,  Keum-Hee Ma ,  Suk-Chae Kang ,  Dong-Hyeon Jang

Inventor： Yong-Chai Kwon ,  Kang-Wook Lee ,  Gu-Sung Kim ,  Seong-Il Han ,  Keum-Hee Ma ,  Suk-Chae Kang ,  Dong-Hyeon Jang

IPC: H01L31/0203 ,  H01L23/495

CPC classification number: H01L27/14618 ,  H01L27/1464 ,  H01L27/14685 ,  H01L2224/48091 ,  H04N5/2257 ,  H01L2924/00014

Abstract: An image sensor device including a protective plate may be manufactured from an image sensor chip having an active surface and a back surface opposite to the active surface. The image sensor chip may include chip pads formed in a peripheral region of the active surface, a microlens formed in a central region of the active surface and an intermediate region between the peripheral and central regions. A protective plate may be attached to the intermediate region of the active surface of the image sensor chip using an adhesive pattern that is sized and configured to maintain a separation distance between the protective plate and the microlens formed on the image sensor chip. Conductive plugs, formed before, during or after the manufacture of the image sensor chip circuitry may provide electrical connection between the chip pads and external connectors.

Abstract translation: 包括保护板的图像传感器装置可以由具有与活性表面相对的活性表面和背面的图像传感器芯片制造。 图像传感器芯片可以包括形成在有源表面的周边区域中的芯片焊盘，形成在有源表面的中心区域中的微透镜和在周边区域和中心区域之间的中间区域。 可以使用粘合剂图案将保护板附接到图像传感器芯片的有效表面的中间区域，该粘合剂图案的尺寸和构造用于保持保护板和形成在图像传感器芯片上的微透镜之间的间隔距离。 在图像传感器芯片电路制造之前，期间或之后形成的导电插塞可以提供芯片焊盘和外部连接器之间的电连接。

公开(公告)号：US20060278991A1

公开(公告)日：2006-12-14

申请号：US11311349

申请日：2005-12-20

Applicant: Yong-Chai Kwon ,  Kang-Wook Lee ,  Keum-Hee Ma ,  Seong-II Han

Inventor： Yong-Chai Kwon ,  Kang-Wook Lee ,  Keum-Hee Ma ,  Seong-II Han

IPC: H01L23/52

CPC classification number: H01L21/563 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/6834 ,  H01L2221/68354 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/29011 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/83856 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01052 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A stack circuit member may include a first circuit member and a second circuit member. The first and the second circuit members may be electrically and mechanically connected together using a thermocompression bonding method. A photosensitive polymer layer may be interposed between the first circuit member and the second circuit member. A gap fill process and an electrical connection process may be performed at the same time.

Abstract translation: 堆叠电路构件可以包括第一电路构件和第二电路构件。 第一和第二电路构件可以使用热压接法将电气和机械连接在一起。 感光性聚合物层可以设置在第一电路部件和第二电路部件之间。 间隙填充处理和电连接处理可​​以同时进行。

公开(公告)号：US07132358B2

公开(公告)日：2006-11-07

申请号：US10922172

申请日：2004-08-20

Applicant: Se-Young Jeong ,  Jin-Hak Choi ,  Nam-Seog Kim ,  Kang-Wook Lee

Inventor： Se-Young Jeong ,  Jin-Hak Choi ,  Nam-Seog Kim ,  Kang-Wook Lee

IPC: H01L21/44

CPC classification number: H01L24/11 ,  H01L24/02 ,  H01L24/12 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  Y10S438/951 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A method of forming a solder bump may involve forming a first photoresist pattern on a wafer having a pad. The first photoresist pattern may have an opening that exposes a portion of the pad. A first under bump metallurgy (UBM) layer may be formed on the pad, and a second UBM layer may be formed on the first photoresist pattern. A second photoresist pattern may be formed that exposes the first UBM layer and covers the second UBM layer. A solder bump may be formed in the opening. The second photoresist pattern and the first photoresist pattern may be removed using a stripper, thereby removing the second UBM layer by a lift-off method.

Abstract translation: 形成焊料凸点的方法可以包括在具有焊盘的晶片上形成第一光致抗蚀剂图案。 第一光致抗蚀剂图案可以具有露出垫的一部分的开口。 可以在焊盘上形成第一凸点下冶金（UBM）层，并且可以在第一光致抗蚀剂图案上形成第二UBM层。 可以形成第二光致抗蚀剂图案，其暴露第一UBM层并覆盖第二UBM层。 可以在开口中形成焊料凸块。 可以使用剥离剂除去第二光致抗蚀剂图案和第一光致抗蚀剂图案，从而通过剥离方法去除第二UBM层。