公开(公告)号：US20060089002A1

公开(公告)日：2006-04-27

申请号：US11292449

申请日：2005-12-02

申请人： Gurtej Sandhu

发明人： Gurtej Sandhu

IPC分类号： H01L21/311

CPC分类号： H01L21/02271 ,  H01L21/02126 ,  H01L21/02129 ,  H01L21/02131 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02321 ,  H01L21/3105 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/3115 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/31695 ,  H01L21/76819 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76837 ,  H01L21/76895 ,  H01L21/76897 ,  H01L27/10855 ,  H01L27/10858 ,  H01L27/10873

摘要： In a DRAM fabrication process, a first oxide is provided over a transistor gate and over a substrate extending from under the gate. The deposition is non-conformal in that the oxide is thicker over the gate and over the substrate than it is on the side of the gate. A second non-conformal oxide is provided over the first non-conformal oxide. The second oxide is annealed in a boron-containing atmosphere, and the first oxide prevents boron diffusion from the second oxide into the gate and substrate. The second oxide may then serve as an etch stop, a CMP stop, or both.

公开(公告)号：US20060081911A1

公开(公告)日：2006-04-20

申请号：US11296385

申请日：2005-12-08

申请人： Shubneesh Batra ,  Gurtej Sandhu

发明人： Shubneesh Batra ,  Gurtej Sandhu

IPC分类号： H01L29/788

CPC分类号： H01L21/28185 ,  B82Y10/00 ,  G11C16/0416 ,  G11C2216/06 ,  H01L21/28194 ,  H01L29/40114 ,  H01L29/42332 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66825 ,  H01L29/7883 ,  Y10S977/943

摘要： The invention provides a method of forming an electron memory storage device and the resulting device. The device comprises a gate structure which, in form, comprises a first gate insulating layer formed over a semiconductor substrate, a self-forming electron trapping layer of noble metal nano-crystals formed over the first gate insulating layer, a second gate insulating layer formed over the electron trapping layer, a gate electrode formed over the second gate insulating layer, and source and drain regions formed on opposite sides of the gate structure.

公开(公告)号：US20060065368A1

公开(公告)日：2006-03-30

申请号：US11281657

申请日：2005-11-17

申请人： Gurtej Sandhu

发明人： Gurtej Sandhu

IPC分类号： H01L21/306 ,  C23F1/00

CPC分类号： C23C16/4558 ,  C23C16/045 ,  C23C16/45563 ,  C23C16/45589 ,  C23C16/52

摘要： A gas delivery device useful in material deposition processes executed during semiconductor device fabrication in a reaction chamber, including the gas delivery device of the present invention and a method for carrying out a material deposition process, including introducing process gas into a reaction chamber using the gas delivery device of the present invention. In each embodiment, the gas delivery device of the present invention includes a plurality of active diffusers and a plurality of gas delivery nozzles, which extend into the reaction chamber. Before entering the reaction chamber through one of the plurality of gas delivery nozzles, process gas must first pass through one of the plurality active diffusers. Each of the active diffusers is centrally controllable such that the rate at which process gas flows through each active diffuser is exactly controlled at all times throughout a given deposition process.

摘要翻译： 一种气体输送装置，其用于在包括本发明的气体输送装置的反应室中的半导体器件制造期间执行的材料沉积工艺中的材料沉积工艺以及用于执行材料沉积工艺的方法，包括使用气体将工艺气体引入反应室 输送装置。 在每个实施例中，本发明的气体输送装置包括多个活性扩散器和延伸到反应室中的多个气体输送喷嘴。 在通过多个气体输送喷嘴之一进入反应室之前，处理气体必须首先通过多个活性扩散器中的一个。 每个活性扩散器都是可中央控制的，使得在给定的沉积过程中，工艺气体流过每个有源扩散器的速率在任何时候被精确地控制。

公开(公告)号：US20060046440A1

公开(公告)日：2006-03-02

申请号：US10932151

申请日：2004-09-01

申请人： Nirmal Ramaswamy ,  Gurtej Sandhu ,  Chris Carlson ,  F. Gealy

发明人： Nirmal Ramaswamy ,  Gurtej Sandhu ,  Chris Carlson ,  F. Gealy

IPC分类号： H01L21/20

CPC分类号： H01L29/66787 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02658

摘要： The invention includes methods of forming layers comprising epitaxial silicon. In one implementation, an opening is formed within a first material received over a monocrystalline material. Opposing sidewalls of the opening are lined with a second material, with monocrystalline material being exposed at a base of the second material-lined opening. A silicon-comprising layer is epitaxially grown from the exposed monocrystalline material within the second material-lined opening. At least a portion of the second material lining is in situ removed. Other aspects and implementations are contemplated.

公开(公告)号：US20060046419A1

公开(公告)日：2006-03-02

申请号：US11021639

申请日：2004-12-22

申请人： Gurtej Sandhu ,  Kevin Shea ,  Chris Hill ,  Kevin Torek

发明人： Gurtej Sandhu ,  Kevin Shea ,  Chris Hill ,  Kevin Torek

IPC分类号： H01L21/20

CPC分类号： H01L28/91 ,  H01L27/10852

摘要： Double-sided container capacitors are formed using sacrificial layers. A sacrificial layer is formed within a recess in a structural layer. A lower electrode is formed within the recess. The sacrificial layer is removed to create a space to allow access to the sides of the structural layer. The structural layer is removed, creating an isolated lower electrode. The lower electrode can be covered with a capacitor dielectric and upper electrode to form a double-sided container capacitor.

摘要翻译： 使用牺牲层形成双面容器电容器。 在结构层的凹部内形成牺牲层。 下部电极形成在凹部内。 去除牺牲层以产生允许接近结构层的侧面的空间。 去除结构层，形成隔离的下电极。 下电极可以用电容器电介质和上电极覆盖以形成双面容器电容器。

公开(公告)号：US20060046200A1

公开(公告)日：2006-03-02

申请号：US10932993

申请日：2004-09-01

申请人： Mirzafer Abatchev ,  Gurtej Sandhu

发明人： Mirzafer Abatchev ,  Gurtej Sandhu

IPC分类号： G03F7/00

CPC分类号： H01L21/308 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139

摘要： The dimensions of mask patterns, such as pitch-multiplied spacers, are controlled by controlled growth of features in the patterns after they are formed. To form a pattern of pitch-multiplied spacers, a pattern of mandrels is first formed overlying a semiconductor substrate. Spacers are then formed on sidewalls of the mandrels by depositing a blanket layer of material over the mandrels and preferentially removing spacer material from horizontal surfaces. The mandrels are then selectively removed, leaving behind a pattern of freestanding spacers. The spacers comprise a material, such as polysilicon and amorphous silicon, known to increase in size upon being oxidized. The spacers are oxidized to grow them to a desired width. After reaching the desired width, the spacers can be used as a mask to pattern underlying layers and the substrate. Advantageously, because the spacers are grown by oxidation, thinner blanket layers can be deposited over the mandrels, thereby allowing the deposition of more conformal blanket layers and widening the process window for spacer formation.

公开(公告)号：US20060040056A1

公开(公告)日：2006-02-23

申请号：US11257946

申请日：2005-10-24

申请人： Gurtej Sandhu

发明人： Gurtej Sandhu

IPC分类号： C23C16/00

CPC分类号： H01L21/02181 ,  C23C16/0236 ,  C23C16/45531 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/0228 ,  H01L21/28194 ,  H01L21/3141 ,  H01L21/31645 ,  H01L29/517

摘要： The invention includes methods of forming material on a substrate and methods of forming a field effect transistor gate oxide. In one implementation, a first species monolayer is chemisorbed onto a substrate within a chamber from a gaseous first precursor. The first species monolayer is discontinuously formed over the substrate. The substrate having the discontinuous first species monolayer is exposed to a gaseous second precursor different from the first precursor effective to react with the first species to form a second species monolayer, and effective to form a reaction product of the second precursor with substrate material not covered by the first species monolayer. The substrate having the second species monolayer and the reaction product is exposed to a third gaseous substance different from the first and second precursors effective to selectively remove the reaction product from the substrate relative to the second species monolayer. Other implementations are contemplated.

公开(公告)号：US20060029745A1

公开(公告)日：2006-02-09

申请号：US10470618

申请日：2003-01-02

申请人： Gurtej Sandhu

发明人： Gurtej Sandhu

IPC分类号： H05H1/24 ,  B44C1/22 ,  C23C16/00

CPC分类号： H01L21/02274 ,  C23C16/045 ,  C23C16/401 ,  C23C16/402 ,  C23C16/505 ,  H01J37/321 ,  H01J2237/3327 ,  H01L21/02164 ,  H01L21/31612 ,  H01L21/31629 ,  H01L21/76224

摘要： A method for filling gaps in high aspect ratio patterned features on an integrated circuit using plasma CVD processes. A plasma is generated by an inert gas and process gases including silicon and oxygen components. The plasma causes the product gases to react and deposit onto the substrate and concurrently etch the deposited film. During an initial stage, the net deposition rate is kept low to improve filling of the high aspect ratio features, while during one or more later stages the net deposition rate is increased to provide a more conformal film at a higher throughput.

摘要翻译： 一种使用等离子体CVD工艺在集成电路上填充高纵横比图案特征的间隙的方法。 通过惰性气体和包括硅和氧组分的工艺气体产生等离子体。 等离子体使产物气体反应并沉积到基底上并同时蚀刻沉积的膜。 在初始阶段期间，净沉积速率保持较低以改善高纵横比特征的填充，而在一个或多个后续阶段期间，净沉积速率增加以提供更高生产量的更保形膜。

公开(公告)号：US20060014386A1

公开(公告)日：2006-01-19

申请号：US11230773

申请日：2005-09-20

申请人： Wing-Cheong Lai ,  Gurtej Sandhu

发明人： Wing-Cheong Lai ,  Gurtej Sandhu

IPC分类号： H01L21/44

CPC分类号： H01L21/76876 ,  H01L21/28556 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76877

摘要： A first layer of titanium nitride (TiN) is formed on a semiconductor structure, such as an interconnect via. Then, a second layer of TiN is formed on the first layer of TiN. The first layer of TiN is amorphous. The second layer of TiN is polycrystalline, having a mixed grain orientation. Finally, an aluminum film is formed on the second layer of titanium nitride. Optionally, a titanium silicide layer is formed on the semiconductor structure prior to the step of forming the first layer of titanium nitride. Interconnects formed according to the invention have polycrystalline aluminum films with grain sizes of approximately less than 0.25 microns.

公开(公告)号：US20060001019A1

公开(公告)日：2006-01-05

申请号：US11216415

申请日：2005-08-30

申请人： Gurtej Sandhu ,  Pierre Fazan

发明人： Gurtej Sandhu ,  Pierre Fazan

IPC分类号： H01L29/06 ,  H01L29/08

CPC分类号： H01L21/7687 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76895 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75

摘要： A storage cell capacitor and a method for forming the storage cell capacitor having a storage node electrode including a barrier layer interposed between a conductive plug and an oxidation resistant layer. A layer of titanium silicide is fabricated to lie between the conductive plug and the oxidation resistant layer. An insulative layer protects the sidewalls of the barrier layer during the deposition and anneal of a dielectric layer having a high dielectric constant.