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61.发明授权公开(公告)号：US10008536B2
公开(公告)日：2018-06-26
申请号：US15403830
申请日：2017-01-11
CPC分类号： H01L27/222 , G11C11/161 , H01L43/02 , H01L43/08 , H01L43/10 , H01L43/12
摘要： Methods and devices are provided to construct magnetic devices, such as magnetic random access memory devices, having MTJ (magnetic tunnel junction) structures encapsulated in organic photopatternable dielectric material. For example, a method includes forming an MTJ structure on a semiconductor substrate, encapsulating the MTJ structure in a layer of organic photopatternable dielectric material, patterning the layer of organic photopatternable dielectric material to form a contact opening in the layer of organic photopatternable dielectric material to the MTJ structure, and filling the contact opening with metallic material.
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公开(公告)号：US09917247B2
公开(公告)日：2018-03-13
申请号：US15347327
申请日：2016-11-09
IPC分类号： H01L43/02 , H01L43/08 , H01L43/12 , H01L27/22 , G11C14/00 , G11C11/56 , H01L29/82 , G11C11/16 , G01R33/06 , H01L43/10
CPC分类号： H01L43/02 , G01R33/066 , G11C11/161 , G11C11/1673 , G11C11/1675 , G11C11/5607 , G11C14/0036 , G11C14/0081 , H01L27/222 , H01L27/226 , H01L27/228 , H01L29/82 , H01L43/08 , H01L43/10 , H01L43/12
摘要： A mechanism is provided for fabricating a thermally assisted magnetoresistive random access memory device. A bottom thermal barrier is formed on a bottom contact. A magnetic tunnel junction is formed on the bottom thermal barrier. The magnetic tunnel junction includes a top ferromagnetic layer formed on a tunnel barrier. The tunnel barrier is formed on a bottom ferromagnetic layer. A top thermal barrier is formed on the top ferromagnetic layer. A top contact is formed on the top thermal barrier. The top contact is reduced to a first diameter. The tunnel barrier and the bottom ferromagnetic layer each have a second diameter. The first diameter of the top contact is smaller than the second diameter.
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公开(公告)号：US20180069174A1
公开(公告)日：2018-03-08
申请号：US15258265
申请日：2016-09-07
CPC分类号： H01L43/12 , H01F10/132 , H01L43/08
摘要： Methods for forming magnetic tunnel junctions and structures thereof include cryogenic etching the layers defining the magnetic tunnel junction without lateral diffusion of reactive species.
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公开(公告)号：US09853210B2
公开(公告)日：2017-12-26
申请号：US14943247
申请日：2015-11-17
IPC分类号： H01L43/12
CPC分类号： H01L43/12
摘要： A method of making a magnetic random access memory (MRAM) device includes forming a magnetic tunnel junction (MTJ) on an electrode, the MTJ including a reference layer positioned in contact with the electrode, a free layer, and a tunnel barrier layer arranged between the reference layer and the free layer; and depositing an encapsulating layer on and along sidewalls of the MTJ by physical sputtering or ablation of a target material onto the MTJ.
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公开(公告)号：US09853205B1
公开(公告)日：2017-12-26
申请号：US15283329
申请日：2016-10-01
CPC分类号： H01L43/02 , G11C11/161 , G11C11/1675 , H01L43/08 , H01L43/10
摘要： A spin-transfer torque magnetic tunnel junction includes a layer stack with a pinned magnetic layer and a free magnetic layer, and an insulating barrier layer there-between. Each of the magnetic layers has an out-of-plane magnetization orientation. The junction is configured so as to allow a spin-polarized current flow generated from one of the two magnetic layers to the other to initiate an asymmetrical switching of the magnetization orientation of the free layer. The switching is off-centered toward an edge of the stack. The junction may allow a spin-polarized current flow that is off-centered toward an edge of the stack, from one of the two magnetic layers to the other, to initiate the asymmetrical switching. Related devices and methods of operation are also provided.
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公开(公告)号：US20170317270A1
公开(公告)日：2017-11-02
申请号：US15652482
申请日：2017-07-18
CPC分类号： H01L43/02 , G11C11/161 , G11C11/1673 , G11C11/1675 , G11C11/1677 , G11C11/5607 , H01L43/08 , H01L43/12
摘要： A mechanism is provided for a thermally assisted magnetoresistive random access memory device (TAS-MRAM). A storage layer has an anisotropic axis, in which the storage layer is configured to store a state in off axis positions and on axis positions. The off axis positions are not aligned with the anisotropic axis. A tunnel barrier is disposed on top of the storage layer. A ferromagnetic sense layer is disposed on top of the tunnel barrier.
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公开(公告)号：US09728733B2
公开(公告)日：2017-08-08
申请号：US15235161
申请日：2016-08-12
IPC分类号： H01L21/441 , H01L51/05 , H01L29/786 , H01L29/16 , H01L29/06 , H01L21/02 , H01L21/283 , H01L29/20 , H01L29/24 , H01L21/04 , H01L51/00 , H01L29/66 , H01L29/778 , G01N27/414 , H01L43/08 , H01L49/02 , H01L23/532 , H01L21/768
CPC分类号： H01L51/0541 , G01N27/414 , G01N27/4141 , G01N27/4146 , H01L21/02527 , H01L21/0254 , H01L21/02568 , H01L21/02606 , H01L21/043 , H01L21/283 , H01L21/441 , H01L21/7682 , H01L23/53276 , H01L28/60 , H01L29/0665 , H01L29/0673 , H01L29/1606 , H01L29/2003 , H01L29/24 , H01L29/66045 , H01L29/66969 , H01L29/778 , H01L29/78684 , H01L29/78696 , H01L43/08 , H01L51/0048 , H01L51/0558 , H01L2221/1094
摘要： Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A substrate is provided. A plurality of metal portions are formed on the substrate, wherein the plurality of metal portions are arranged such that areas of the substrate remain exposed. A thin film layer is deposited on the plurality of metal portions and the exposed areas of the substrate. A dielectric layer is deposited, wherein the dielectric layer is in contact with portions of the thin film layer on the plurality of metal portions, and wherein the dielectric layer is not in contact with portions of the thin film layer on the exposed areas of the substrate such that one or more enclosed spaces are present between the thin film layer on the exposed areas of the substrate and the dielectric layer.
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公开(公告)号：US09728714B2
公开(公告)日：2017-08-08
申请号：US15222585
申请日：2016-07-28
摘要： A magnetoresistive memory cell includes a magnetoresistive tunnel junction stack and a dielectric encapsulation layer covering sidewall portions of the stack and being opened over a top of the stack. A conductor is formed in contact with a top portion of the stack and covering the encapsulation layer. A magnetic liner encapsulates the conductor and is gapped apart from the encapsulating layer covering the sidewall portions of the stack.
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公开(公告)号：US20170222130A1
公开(公告)日：2017-08-03
申请号：US15487964
申请日：2017-04-14
CPC分类号： H01L43/12 , G11C11/161 , H01L27/222 , H01L27/224 , H01L43/02 , H01L43/08
摘要： A magnetic memory device includes a magnetic memory stack including a bottom electrode and having a hard mask formed thereon. An encapsulation layer is formed over sides of the magnetic memory stack and has a thickness adjacent to the sides formed on the bottom electrode. A dielectric material is formed over the encapsulation layer and is removed from over the hard mask and gapped apart from the encapsulation layer on the sides of the magnetic memory stack to form trenches between the dielectric material and the encapsulation layer at the sides of the magnetic memory stack. A top electrode is formed over the hard mask and in the trenches such that the top electrode is spaced apart from the bottom electrode by at least the thickness.
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公开(公告)号：US20170179380A1
公开(公告)日：2017-06-22
申请号：US15231168
申请日：2016-08-08
CPC分类号： H01L43/12 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C17/165 , H01L23/5252 , H01L27/228 , H01L43/02 , H01L43/08
摘要： Magnetic tunnel junction antifuse devices are protected from degradation caused by programming voltage drop across the gates of unselected magnetic tunnel junction antifuses by connecting said magnetic tunnel junctions serially with a first field effect transistor and a second field effect transistor, the first field effect transistor having its gate connected to a positive supply voltage while the gate of the second field effect transistor is switchably connected to a programming voltage, such that when the second field effect transistor of a selected magnetic tunnel junction is switched to direct the programming voltage to program the selected magnetic tunnel junction an unswitched magnetic tunnel junction and the second field effect transistor do not experience a voltage drop across the gates thereof sufficient to degrade.
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