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176 条记录 (耗时 0.027 秒)

    Integrated sensor with frame memory and programmable resolution for light adaptive imaging
    62.
    发明授权
    Integrated sensor with frame memory and programmable resolution for light adaptive imaging 失效
    具有帧存储器和可编程分辨率的集成传感器，用于光自适应成像

    公开(公告)号：US5909026A

    公开(公告)日：1999-06-01

    申请号：US867835

    申请日：1997-06-03

    申请人： Zhimin Zhou ,  Eric R. Fossum ,  Bedabrata Pain

    发明人： Zhimin Zhou ,  Eric R. Fossum ,  Bedabrata Pain

    IPC分类号： G11C27/04 ,  H04N5/347 ,  H04N5/365 ,  H04N5/369 ,  H04N5/374 ,  H01J40/14

    CPC分类号： H04N5/347 ,  G11C27/04 ,  H04N5/3743

    摘要： An image sensor operable to vary the output spatial resolution according to a received light level while maintaining a desired signal-to-noise ratio. Signals from neighboring pixels in a pixel patch with an adjustable size are added to increase both the image brightness and signal-to-noise ratio. One embodiment comprises a sensor array for receiving input signals, a frame memory array for temporarily storing a full frame, and an array of self-calibration column integrators for uniform column-parallel signal summation. The column integrators are capable of substantially canceling fixed pattern noise.

    摘要翻译： 一种图像传感器，其可操作以根据接收的光电平改变输出空间分辨率，同时保持期望的信噪比。 添加具有可调整尺寸的像素补丁中的相邻像素的信号以增加图像亮度和信噪比。 一个实施例包括用于接收输入信号的传感器阵列，用于临时存储全帧的帧存储器阵列，以及用于统一的列并行信号求和的自校准列积分器的阵列。 列积分器能够基本上消除固定模式噪声。

    Capacitively coupled successive approximation ultra low power analog-to-digital converter
    63.
    发明授权
    Capacitively coupled successive approximation ultra low power analog-to-digital converter 失效
    电容耦合逐次逼近超低功耗模数转换器

    公开(公告)号：US5880691A

    公开(公告)日：1999-03-09

    申请号：US744957

    申请日：1996-11-07

    申请人： Eric R. Fossum ,  Zhimin Zhou ,  Bedabrata Pain

    发明人： Eric R. Fossum ,  Zhimin Zhou ,  Bedabrata Pain

    IPC分类号： H03M1/06 ,  H03M1/46 ,  H03M1/80 ,  H03M1/38

    CPC分类号： H03M1/0682 ,  H03M1/466 ,  H03M1/804

    摘要： A capacitively-coupled successive approximation analog-to-digital converter utilizes a capacitively coupled multiplying digital to analog converter to generate a succession of voltages which are compared to the input voltage to be digitized. The capacitively coupled multiplying digital to analog converter generates the required succession of analog voltage levels utilizing very low power in response to digital signals. A double-sided version of the invention processes differential inputs with improved common-non-ideality mode rejection.

    摘要翻译： 电容耦合逐次逼近模数转换器利用电容耦合的乘法数模转换器来产生与待数字化的输入电压相比较的一系列电压。 电容耦合乘法数模转换器利用响应于数字信号的非常低的功率产生所需的连续的模拟电压电平。 本发明的双面版本处理具有改进的共非理想模式拒绝的差分输入。

    Solid-state image sensor with focal-plane digital photon-counting pixel array
    65.
    发明授权
    Solid-state image sensor with focal-plane digital photon-counting pixel array 失效
    具有焦平面数字光子计数像素阵列的固态图像传感器

    公开(公告)号：US5665959A

    公开(公告)日：1997-09-09

    申请号：US673014

    申请日：1996-07-01

    申请人： Eric R. Fossum ,  Bedabrata Pain

    发明人： Eric R. Fossum ,  Bedabrata Pain

    IPC分类号： H01L27/146 ,  H01J40/14

    CPC分类号： H01L27/14658 ,  H01L27/14609 ,  H01L27/14634

    摘要： A solid-state focal-plane imaging system comprises an N.times.N array of high gain, low-noise unit cells, each unit cell being connected to a different one of photovoltaic detector diodes, one for each unit cell, interspersed in the array for ultralow level image detection and a plurality of digital counters coupled to the outputs of the unit cell by a multiplexer (either a separate counter for each unit cell or a row of N of counters time shared with N rows of digital counters). Each unit cell includes two self-biasing cascode amplifiers in cascade for a high charge-to-voltage conversion gain (>1 mV/e.sup.-) and an electronic switch to reset input capacitance to a reference potential in order to be able to discriminate detection of an incident photon by the photoelectron (e.sup.-) generated in the detector diode at the input of the first cascode amplifier in order to count incident photons individually in a digital counter connected to the output of the second cascode amplifier. Reseting the input capacitance and initiating self-biasing of the amplifiers occurs every clock cycle of an integratng period to enable ultralow light level image detection by the array of photovoltaic detector diodes under such ultralow light level conditions that the photon flux will statistically provide only a single photon at a time incident on any one detector diode during any clock cycle.

    摘要翻译： 固态焦平面成像系统包括高增益低噪声单元的NxN阵列，每个单元电池连接到不同的一个光伏检测器二极管，每个单元电池一个，散布在阵列中用于超低电平 图像检测和多个数字计数器，其通过多路复用器（每个单位单元的单独计数器或与N行数字计数器共享的计数器时间的N行）耦合到单元单元的输出。 每个单元单元包括两个级联级联的自偏压共源共栅放大器，用于高电荷到电压转换增益（> 1 mV / e-）和电子开关，以将输入电容复位为参考电位，以便能够区分检测 通过在第一共源共栅放大器的输入端处的检测器二极管中产生的光电子（e-）来入射光子，以便在与第二共源共栅放大器的输出连接的数字计数器中单独计数入射光子。 放大输入电容和启动放大器的自偏置在整个周期的每个时钟周期发生，以便在这样的超低光级条件下通过光电探测器二极管阵列实现超低光级图像检测，光子通量将统计上仅提供一个 光子在任何时钟周期内一次入射到任何一个检测器二极管上。

    Monolithic in-based III-V compound semiconductor focal plane array cell with single stage CCD output
    67.
    发明授权
    Monolithic in-based III-V compound semiconductor focal plane array cell with single stage CCD output 失效
    具有单级CCD输出的单片In-III-V化合物半导体焦平面阵列单元

    公开(公告)号：US5386128A

    公开(公告)日：1995-01-31

    申请号：US186185

    申请日：1994-01-21

    申请人： Eric R. Fossum ,  Thomas J. Cunningham ,  Timothy N. Krabach ,  Craig O. Staller

    发明人： Eric R. Fossum ,  Thomas J. Cunningham ,  Timothy N. Krabach ,  Craig O. Staller

    IPC分类号： H01L27/148 ,  H01L29/765 ,  H01L29/78 ,  H01L27/14 ,  H01L31/00

    CPC分类号： H01L27/14875 ,  H01L27/14831 ,  H01L29/765

    摘要： A monolithic semiconductor imager includes an indium-based III-V compound semiconductor monolithic active layer of a first conductivity type, an array of plural focal plane cells on the active layer, each of the focal plane cells including a photogate over a top surface of the active layer, a readout circuit dedicated to the focal plane cell including plural transistors formed monolithically with the monolithic active layer and a single-stage charge coupled device formed monolithically with the active layer between the photogate and the readout circuit for transferring photo-generated charge accumulated beneath the photogate during an integration period to the readout circuit. The photogate includes thin epitaxial semiconductor layer of a second conductivity type overlying the active layer and an aperture electrode overlying a peripheral portion of the thin epitaxial semiconductor layer, the aperture electrode being connectable to a photogate bias voltage.

    摘要翻译： 单片半导体成像器包括第一导电类型的铟基III-V化合物半导体单片有源层，有源层上的多个焦平面单元的阵列，每个焦平面单元包括位于该顶面上的光栅 有源层，专用于包括与单片有源层单片形成的多个晶体管的焦平面单元的读出电路和与光栅和读出电路之间的有源层一体形成的单级电荷耦合器件，用于传输累积的光电荷的电荷 在积分期间到读出电路的下方。 光栅包括覆盖有源层的第二导电类型的薄外延半导体层和覆盖薄外延半导体层的外围部分的孔径电极，孔径电极可连接到光栅偏置电压。

    Methods of Operating a Three-Dimensional Image Sensor Including a Plurality of Depth Pixels
    69.
    发明申请
    Methods of Operating a Three-Dimensional Image Sensor Including a Plurality of Depth Pixels 审中-公开
    包含多个深度像素的三维图像传感器的操作方法

    公开(公告)号：US20120236121A1

    公开(公告)日：2012-09-20

    申请号：US13420862

    申请日：2012-03-15

    申请人： Yoon-Dong Park ,  Eric R. Fossum

    发明人： Yoon-Dong Park ,  Eric R. Fossum

    IPC分类号： H04N13/02

    CPC分类号： H04N13/271 ,  H04N13/254

    摘要： In a method of operating a three-dimensional image sensor according to example embodiments, modulated light is emitted to an object of interest, the modulated light that is reflected from the object of interest is detected using a plurality of depth pixels, and a plurality of pixel group outputs respectively corresponding to a plurality of pixel groups are generated based on the detected modulated light by grouping the plurality of depth pixels into the plurality of pixel groups including a first pixel group and a second pixel group that have different sizes from each other.

    摘要翻译： 在根据示例性实施例的操作三维图像传感器的方法中，调制光被发射到感兴趣的对象，使用多个深度像素来检测从感兴趣对象反射的调制光，并且多个 通过将多个深度像素分组为包括彼此不同大小的第一像素组和第二像素组的多个像素组，基于检测到的调制光来生成分别对应于多个像素组的像素组输出。

    Interpolator for a CMOS image sensor using a digital register
    70.
    发明授权
    Interpolator for a CMOS image sensor using a digital register 有权
    内置CMOS图像传感器的数字寄存器

    公开(公告)号：US07916193B2

    公开(公告)日：2011-03-29

    申请号：US10774603

    申请日：2004-02-10

    申请人： Eric R. Fossum

    发明人： Eric R. Fossum

    IPC分类号： H04N3/14 ,  H04N5/335 ,  H04N9/04

    CPC分类号： H04N5/374 ,  H04N9/045 ,  H04N2209/046

    摘要： An imager has first and second photosensitive sites and an interpolator located in a semiconductor substrate. The first photosensitive site is configured to receive light having a spectral component, and the second photosensitive site is configured to measure the level of the spectral component in light received by the second photosensitive site. The interpolator is configured to estimate the level of the spectral component in the light received by the first photosensitive site based on the measurement by the second photosensitive site.

    摘要翻译： 成像器具有位于半导体衬底中的第一和第二光敏部位和内插器。 第一感光部位被配置为接收具有光谱分量的光，并且第二感光部位被配置为测量由第二光敏部位接收的光中的光谱分量的水平。 插值器被配置为基于第二感光部位的测量来估计由第一感光部位接收的光中的光谱分量的水平。