公开(公告)号：US20070048945A1

公开(公告)日：2007-03-01

申请号：US11495927

申请日：2006-07-28

申请人： Wolodymyr Czubatyj ,  Tyler Lowrey ,  Sergey Kostylev

发明人： Wolodymyr Czubatyj ,  Tyler Lowrey ,  Sergey Kostylev

IPC分类号： H01L21/336

CPC分类号： G11C11/5678 ,  G11C11/56 ,  G11C13/0004 ,  H01L45/06 ,  H01L45/122 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148

摘要： A radial memory device includes a phase-change material, a first electrode in electrical communication with the phase-change material, the first electrode having a substantially planar first area of electrical communication with the phase-change material. The radial memory device also includes a second electrode in electrical communication with the phase-change material, the second electrode having a second area of electrical communication with the phase-change material, the second area being laterally spacedly disposed from the first area and substantially circumscribing the first area. Further, a method of making a memory device is disclosed. The steps include depositing a first electrode, depositing a first insulator, configuring the first insulator to define a first opening. The first opening provides for a generally planar first contact of the first electrode. The method further including the steps of depositing a phase-change material, depositing a second insulator, configuring the second insulator, depositing a second electrode having a second contact laterally displaced from said first contact, and configuring said second electrode.

摘要翻译： 径向存储器件包括相变材料，与相变材料电连通的第一电极，第一电极具有与相变材料电连通的基本平坦的第一区域。 所述径向存储装置还包括与所述相变材料电连通的第二电极，所述第二电极具有与所述相变材料电连通的第二区域，所述第二区域与所述第一区域横向间隔设置并且基本上限定 第一个区域。 此外，公开了一种制造存储器件的方法。 这些步骤包括沉积第一电极，沉积第一绝缘体，构成第一绝缘体以限定第一开口。 第一开口提供第一电极的大致平面的第一接触。 该方法还包括以下步骤：沉积相变材料，沉积第二绝缘体，构成第二绝缘体，沉积具有从所述第一触点横向移位的第二触点的第二电极，以及配置所述第二电极。

公开(公告)号：US20060233019A1

公开(公告)日：2006-10-19

申请号：US11105829

申请日：2005-04-14

申请人： Sergey Kostylev ,  Tyler Lowrey ,  Wolodymyr Czubatyj ,  Ward Parkinson

发明人： Sergey Kostylev ,  Tyler Lowrey ,  Wolodymyr Czubatyj ,  Ward Parkinson

IPC分类号： G11C11/00

CPC分类号： G11C13/004 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0033 ,  G11C2013/0054

摘要： A phase change memory may be read so as to reduce the likelihood of a read disturb. A read disturb may occur, for example, when a reset device is raised to a voltage, which causes its threshold device to trigger. The triggering of the threshold device produces a displacement current which may convert a reset device to a set device. By ensuring that the reset cell never reaches a voltage that would result in triggering of the threshold device, read disturbs may be reduced.

摘要翻译： 可以读取相变存储器，以便减少读取干扰的可能性。 例如，当复位装置升高到电压时，可能会发生读取干扰，导致其阈值装置触发。 阈值装置的触发产生位移电流，其可以将复位装置转换成集装置。 通过确保复位单元不会达到会导致阈值器件触发的电压，可能会降低读取干扰。

公开(公告)号：US20060151849A1

公开(公告)日：2006-07-13

申请号：US11032345

申请日：2005-01-10

申请人： Wolodymyr Czubatyj

发明人： Wolodymyr Czubatyj

IPC分类号： H01L29/12 ,  H01L21/00

CPC分类号： H01L45/065 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/1233 ,  H01L45/144

摘要： A phase change memory may transition between two crystalline states. In one embodiment, the phase change material is a chalcogenide which transitions between face centered cubic and hexagonal states. Because these states are more stable, they are less prone to drift than the amorphous state conventionally utilized in phase change memories.

摘要翻译： 相变存储器可以在两个结晶态之间转变。 在一个实施方案中，相变材料是在面心立方和六边形状态之间转变的硫族化物。 因为这些状态更稳定，所以它们比相变存储器中常规使用的非晶状态更不容易漂移。

公开(公告)号：US6087674A

公开(公告)日：2000-07-11

申请号：US63174

申请日：1998-04-20

申请人： Standford R. Ovshinsky ,  Wolodymyr Czubatyj ,  David A. Strand ,  Patrick J. Klersy ,  Sergey Kostylev ,  Boil Pashmakov

发明人： Standford R. Ovshinsky ,  Wolodymyr Czubatyj ,  David A. Strand ,  Patrick J. Klersy ,  Sergey Kostylev ,  Boil Pashmakov

IPC分类号： H01L27/10 ,  G11C16/02 ,  H01L27/105 ,  H01L45/00 ,  H01L47/00

CPC分类号： G11C13/0004 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1273 ,  H01L45/144 ,  G11C2213/35 ,  G11C2213/51 ,  G11C2213/52 ,  G11C2213/72

摘要： An electrically operated, single cell memory element comprising: a volume of memory material defining a single-cell memory element, the memory material comprising a heterogeneous mixture of a phase-change material and a dielectric material; and means for delivering an electrical signal to at least a portion of the volume of memory material. An electrically operated, single-cell memory element comprising: a volume of memory material defining the single-cell memory element, the memory material comprising a phase-change material and a dielectric material where the phase-change material has a plurality of detectable resistivity values and can be set directly to one of the resistivity values without the need to be set to a specific starting or erased resistivity value, regardless of the previous resistivity value of the material, in response to an electrical signal; and means for delivering the electrical signal to at least a portion of the volume of memory material.

摘要翻译： 一种电操作的单个单元存储器元件，包括：一定量单个存储单元的存储器材料的体积，所述存储器材料包括相变材料和电介质材料的不均匀混合物; 以及用于将电信号传送到所述存储器材料的体积的至少一部分的装置。 一种电操作的单电池存储元件，包括：限定单个单元存储元件的存储器材料的量，所述存储器材料包括相变材料和介电材料，其中所述相变材料具有多个可检测的电阻率值 并且可以直接设置为电阻率值之一，而不需要根据材料的电阻率值将电阻值设定为特定的起始或擦除电阻率值; 以及用于将电信号传送到存储材料体积的至少一部分的装置。

公开(公告)号：US5757446A

公开(公告)日：1998-05-26

申请号：US549893

申请日：1995-10-30

申请人： Stanford R. Ovshinsky ,  Wolodymyr Czubatyj ,  Rosa Young ,  Guy C. Wicker

发明人： Stanford R. Ovshinsky ,  Wolodymyr Czubatyj ,  Rosa Young ,  Guy C. Wicker

IPC分类号： G02F1/136 ,  C03C3/32 ,  G02F1/1365 ,  G02F1/1368 ,  G09G3/36 ,  H01L45/00 ,  G02F1/135

CPC分类号： G09G3/367 ,  C03C3/321 ,  G02F1/1365 ,  H01L45/04 ,  H01L45/141 ,  H01L45/144

摘要： An acute matrix liquid crystal display panel including 1) a plurality of liquid crystal display elements distributed in a matrix of rows and columns; 2) means for supplying video signals and display element selection signals, including row and column conductors; and 3) a plurality of paired Ovonic threshold switches and resistive elements each serially coupled between the corresponding row or column conductor and the liquid crystal display element, the Ovonic threshold switches acting as display element selection devices and current isolation devices in which the Ovonic threshold switches having an off state resistance of at least 1.times.10.sup.9 ohms.

摘要翻译： 一种急性矩阵液晶显示面板，包括：1）以行和列为矩阵分布的多个液晶显示元件; 2）用于提供视频信号和显示元件选择信号的装置，包括行和列导体; 和3）多个成对的Ovonic阈值开关和电阻元件，每个配对的Ovonic阈值开关和电阻元件串联连接在相应的行或列导体与液晶显示元件之间，Ovonic阈值开关充当显示元件选择器件和电流隔离器件，其中Ovonic阈值开关 具有至少1×10 9欧姆的截止电阻。

公开(公告)号：US5414271A

公开(公告)日：1995-05-09

申请号：US789234

申请日：1991-11-07

申请人： Stanford R. Ovshinsky ,  Stephen J. Hudgens ,  Wolodymyr Czubatyj ,  David A. Strand ,  Guy C. Wicker

发明人： Stanford R. Ovshinsky ,  Stephen J. Hudgens ,  Wolodymyr Czubatyj ,  David A. Strand ,  Guy C. Wicker

IPC分类号： G11C11/56 ,  G11C16/02 ,  H01L27/24 ,  H01L45/00

CPC分类号： G11C13/0004 ,  G11C11/56 ,  G11C11/5678 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/141 ,  H01L45/144 ,  H01L45/1625 ,  G11C13/04 ,  G11C2213/72

摘要： A solid state, directly overwritable, electronic, non-volatile, high density, low cost, low energy, high speed, readily manufacturable, multibit single cell memory or control array based upon the novel switching characteristics provided by said unique class of semiconductor materials characterized by a large dynamic range of reversible Fermi level positions. The memory or control elements from which the array is fabricated exhibit orders of magnitude higher switching speeds at remarkably reduced energy levels. The novel memory elements of the instant invention are in turn characterized, inter alia, by numerous stable and non-volatile detectable configurations of local atomic and/or electrode order, which configurations can be selectively and repeatably accessed by electric input signals of yawing energy level. The memory elements are further characterized by enhanced stability, which stability is achieved through the use of compositional modulation of the semiconductor material from which the memory elements are fabricated.

摘要翻译： 基于由所述独特类型的半导体材料提供的新颖的开关特性，固态，直接可重写的，电子的，非易失性的，高密度的，低成本的，低能量的，高速的，容易制造的多单元单元存储器或控制阵列 通过可逆的费米能级位置的大动态范围。 制造阵列的存储器或控制元件在显着降低的能量水平下显示出更高的开关速度的数量级。 本发明的新颖的记忆元件又特别包括局部原子和/或电极顺序的许多稳定和非易失性的可检测配置，这些配置可以通过偏转能级的电输入信号来选择性地和重复地访问 。 存储元件的特征还在于增强的稳定性，其通过使用制造存储元件的半导体材料的组成调制来实现稳定性。

公开(公告)号：US5341328A

公开(公告)日：1994-08-23

申请号：US898635

申请日：1992-06-15

申请人： Stanford R. Ovshinsky ,  Stephen J. Hudgens ,  Wolodymyr Czubatyj ,  David A. Strand ,  Guy C. Wicker

发明人： Stanford R. Ovshinsky ,  Stephen J. Hudgens ,  Wolodymyr Czubatyj ,  David A. Strand ,  Guy C. Wicker

IPC分类号： G11C11/56 ,  G11C16/02 ,  H01L27/24 ,  H01L45/00

CPC分类号： G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  H01L27/115 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/1625 ,  G11C13/04 ,  G11C2213/72

摘要： Disclosed herein is a solid state, directly overwritable, non-volatile, high density, low cost, low energy, high speed, readily manufacturable, single cell memory element having reduced switching current requirements and increased write/erase cycle life. The structurally modified memory element includes an electrical contact formed of amorphous silicon, either alone or in combination with a layer of amorphous carbon layer. The memory element exhibits orders of magnitude higher switching speeds at remarkably reduced switching energy levels. The novel memory elements of the instant invention are further characterized, inter alia, by at least two stable and non-volatile detectable configurations of local atomic and/or electronic order, which configurations can be selectively and repeatably accessed by electrical input signals of designated energies. The reduced switching current requirements and an increased write/erase cycle life are achieved by structurally modifying the electrical contact with the aforementioned layer of amorphous silicon.

摘要翻译： 本文公开了具有降低的开关电流要求和增加的写入/擦除循环寿命的固态，直接可重写，非易失性，高密度，低成本，低能量，高速度，容易制造的单电池存储元件。 结构改进的记忆元件包括由非晶硅形成的电接触，单独或与无定形碳层组合。 存储元件在显着降低的开关能量水平下显示出更高的开关速度的数量级。 本发明的新颖的记忆元件尤其通过局部原子和/或电子顺序的至少两个稳定和非易失性可检测配置来进一步表征，这些配置可以通过指定能量的电输入信号被选择性地和重复地访问 。 通过结构上改变与上述非晶硅层的电接触来实现降低的开关电流要求和增加的写入/擦除周期寿命。

公开(公告)号：US5296716A

公开(公告)日：1994-03-22

申请号：US747053

申请日：1991-08-19

申请人： Stanford R. Ovshinsky ,  Wolodymyr Czubatyj ,  Quiyi Ye ,  David A. Strand ,  Stephen J. Hudgens

发明人： Stanford R. Ovshinsky ,  Wolodymyr Czubatyj ,  Quiyi Ye ,  David A. Strand ,  Stephen J. Hudgens

IPC分类号： H01L27/10 ,  G11C11/56 ,  G11C16/02 ,  H01H45/00 ,  H01L21/8247 ,  H01L27/105 ,  H01L27/115 ,  H01L27/24 ,  H01L29/788 ,  H01L29/792 ,  H01L45/00

CPC分类号： G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  H01L27/115 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1675 ,  G11C13/04

摘要： A solid state, directly overwritable, electronic, non-volatile, high density, low cost, low energy, high speed, readily manufacturable, multibit single cell memory based upon phenomenologically novel electrical switching characteristics provided by a unique class of semiconductor materials in unique configurations, which memory exhibits orders of magnitude higher switching speeds at remarkably reduced energy levels. The novel memory of the instant invention is characterized, inter alia, by numerous stable and truly non-volatile detectable configurations of local atomic and/or electronic order, which can be selectively and repeatably accessed by electrical input signals of varying pulse voltage and duration.

摘要翻译： 基于由独特类型的半导体材料提供的独特配置提供的现象学新颖的电开关特性的固态，直接可重写，电子，非易失性，高密度，低成本，低能量，高速度，易于制造的多位单电池存储器 ，哪个存储器在显着降低的能量水平下显示出高数量级的开关速度。 特别地，本发明的新颖记忆特征在于由局部原子和/或电子顺序的许多稳定和真正的非易失性可检测配置，其可以通过变化的脉冲电压和持续时间的电输入信号来选择性地和重复地访问。

公开(公告)号：US5180690A

公开(公告)日：1993-01-19

申请号：US551684

申请日：1990-07-09

申请人： Wolodymyr Czubatyj ,  Stanford R. Ovshinsky ,  Guy C. Wicker ,  David Beglau ,  Ronald Himmler ,  David Jablonski ,  Subhendu Guha

发明人： Wolodymyr Czubatyj ,  Stanford R. Ovshinsky ,  Guy C. Wicker ,  David Beglau ,  Ronald Himmler ,  David Jablonski ,  Subhendu Guha

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L21/336 ,  H01L29/45 ,  H01L29/786

CPC分类号： H01L29/66757 ,  H01L21/02422 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/458 ,  H01L29/78618 ,  H01L29/78624 ,  H01L29/78675 ,  H01L29/78678 ,  H01L29/78681 ,  H01L29/78684 ,  Y10S148/122

摘要： A method for the low temperature fabrication of doped polycrystalline semiconductor alloy material. The method includes the steps of exposing a body of semiconductor alloy material to a reaction gas containing at least a source of the dopant element, and establishing an electrical potential sufficient to sputter etch the surface of said layer, while decomposing the reaction gas. This allows for the deposition of a layer of doped amorphous semiconductor alloy material upon the body of semiconductor alloy material. Thereafter, the doped layer of amorphous semiconductor alloy material is exposed to an annealing environment sufficient to at least partially crystallize said amorphous material, and activate the dopant element.

摘要翻译： 掺杂多晶半导体合金材料的低温制造方法。 该方法包括以下步骤：将半导体合金材料体暴露于至少含有掺杂剂元素的源的反应气体，并且在分解反应气体的同时建立足以溅射蚀刻所述层的表面的电势。 这允许在半导体合金材料体上沉积掺杂的非晶半导体合金材料层。 此后，非晶半导体合金材料的掺杂层暴露于足以至少部分地使所述非晶材料结晶的退火环境，并激活掺杂剂元素。

公开(公告)号：US4882295A

公开(公告)日：1989-11-21

申请号：US328666

申请日：1989-03-27

申请人： Wolodymyr Czubatyj ,  Michael G. Hack ,  Michael Shur

发明人： Wolodymyr Czubatyj ,  Michael G. Hack ,  Michael Shur

IPC分类号： H01L27/092 ,  H01L29/739 ,  H01L29/772 ,  H01L29/812 ,  H01L33/00 ,  H01L33/18 ,  H01S5/042 ,  H01S5/062 ,  H01S5/30

CPC分类号： H01L33/18 ,  H01L27/0928 ,  H01L29/739 ,  H01L29/7722 ,  H01L29/8122 ,  H01L33/0041 ,  H01S5/0422 ,  H01S5/30 ,  H01S5/06203 ,  Y10S148/105

摘要： Double injection field effect transistors, which may be horizontally or vertically arranged, each include a body of semiconductor material extending between two current-carrying electrodes and forming a current path therebetween. The semiconductor body of each may be substantially intrinsic or lightly doped. One or more control electrodes or gates located adjacent to each current path project a variable electric field over the ambipolar path, which modulates current by controlling the amount of charge carriers of both polarities injected into the semiconductor body. In most of the single gate embodiments, the electrodes extend across a portion, preferably a major portion such as 75% or 90%, or the length of the current path, but not the entire length of the current path. The embodiments having a plurality of gates typically have two insulated gates, one extending from the anode electrode and the other extending from the cathode electrode. The gates in a single device may overlap.Embodiments having electrodes with doped microcrystalline regions for improved carrier injection are disclosed. Methods for making planar double injection field effect transistors having a plurality of deposited noncrystalline semiconductor layers for clean interface formation between semiconductor layers are also disclosed.

摘要翻译： 可以水平或垂直布置的双注入场效应晶体管每个包括在两个载流电极之间延伸并在其间形成电流路径的半导体材料体。 每个半导体本体可以是基本上固有的或轻掺杂的。 位于每个电流路径附近的一个或多个控制电极或门在双极路径上投射可变电场，该双极路径通过控制注入到半导体主体中的两极性的电荷载流子的量来调制电流。 在大多数单栅极实施例中，电极延伸穿过一部分，优选地主要部分，例如75％或90％，或电流路径的长度，但不延伸到当前路径的整个长度。 具有多个栅极的实施例通常具有两个绝缘栅极，一个从阳极电极延伸，另一个从阴极延伸。 单个设备中的门可能重叠。 公开了具有用于改进载流子注入的具有掺杂微晶区域的电极的实施例。 还公开了用于制造具有用于半导体层之间的清洁界面形成的多个沉积的非晶半导体层的平面双注入场效应晶体管的方法。