公开(公告)号：US11883926B2

公开(公告)日：2024-01-30

申请号：US17319637

申请日：2021-05-13

Applicant: Kioxia Corporation

Inventor： Takahiko Kawasaki ,  Yukiteru Matsui ,  Akifumi Gawase

IPC: B24B37/26 ,  B24B37/24 ,  B24B53/017 ,  H01L21/768 ,  H01L21/321 ,  H01L21/3105 ,  H01L23/532

CPC classification number: B24B37/26 ,  B24B37/24 ,  B24B53/017 ,  H01L21/31055 ,  H01L21/3212 ,  H01L21/7684 ,  H01L21/76805 ,  H01L21/76819 ,  H01L21/76895 ,  H01L23/53257

Abstract: A polishing pad is described. The polishing pad includes a surface having plural recess portions, and a substrate is polished by the surface. In the pad, an average width of the recess portions at one area of the surface in a direction parallel to the surface is 20 μm or less, and an average density of the recess portions at one area of the surface is 1,300/mm2 or more.

公开(公告)号：US20240030040A1

公开(公告)日：2024-01-25

申请号：US18479871

申请日：2023-10-03

Applicant: Kioxia Corporation

Inventor： Takeshi SONEHARA ,  Takahiro HIRAI ,  Masaaki HIGUCHI ,  Takashi SHIMIZU

IPC: H01L21/321 ,  H10B43/27

CPC classification number: H01L21/32105 ,  H10B43/27

Abstract: According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded.

公开(公告)号：US11865664B2

公开(公告)日：2024-01-09

申请号：US17341285

申请日：2021-06-07

Applicant: Applied Materials, Inc.

Inventor： Kun Xu ,  Harry Q. Lee ,  Benjamin Cherian ,  David Maxwell Gage

IPC: B24B37/005 ,  H01L21/321 ,  B24B37/013 ,  B24B49/10

CPC classification number: B24B37/005 ,  B24B37/013 ,  B24B49/105 ,  H01L21/3212

Abstract: During polishing of a stack of adjacent layers, a plurality of instances of a profile control algorithm are executed on a controller with different instances having different values for a control parameter. A first instance receives a sequence of characterizing values from an in-situ monitoring system during an initial time period to control a polishing parameter, and a second instance receives the sequence of characterizing values during the initial time period and a subsequent time period to control the polishing parameter. Exposure of the underlying layer is detected based on the sequence of characterizing values from the in-situ monitoring system.

公开(公告)号：US20240006204A1

公开(公告)日：2024-01-04

申请号：US18034350

申请日：2021-07-20

Applicant: EBARA CORPORATION

Inventor： Makoto KASHIWAGI

IPC: H01L21/67 ,  B24B37/32 ,  H01L21/321 ,  H01L21/304

CPC classification number: H01L21/67219 ,  B24B37/32 ,  H01L21/3212 ,  H01L21/304

Abstract: Provided is a structure that reduces a risk of affecting a mounting mechanism of a retainer member when a substrate collides with the retainer member.
According to one embodiment, a head for holding a polygonal substrate is provided. The head includes a substrate support surface, a retainer member, and a retainer guide. The substrate support surface has a shape corresponding to a shape of the polygonal substrate. The retainer member is disposed outside each side of the substrate support surface. The retainer guide is configured to support the retainer member. The retainer member has an engaging surface extending in a direction perpendicular to the substrate support surface, and the engaging surface of the retainer member engages with the retainer guide.

公开(公告)号：US20230402502A1

公开(公告)日：2023-12-14

申请号：US17836579

申请日：2022-06-09

Applicant: Nanya Technology Corporation

Inventor： DA-ZEN CHUANG

IPC: H01L49/02 ,  H01L27/108 ,  H01L21/3105 ,  H01L21/321

CPC classification number: H01L28/91 ,  H01L27/108 ,  H01L21/31053 ,  H01L21/3212

Abstract: This invention provides a capacitor structure includes a U-shaped bottom electrode having a cap dielectric provided at its open end, a top electrode and a capacitor dielectric layer interposed between the bottom electrode and the top electrode to constitute an outer capacitor around a cylinder type solid inner capacitor, and the outer capacitor and the inner capacitor are divided by the cap dielectric. The cylinder type solid inner capacitor and the outer capacitor are fabricated separately so that the cylinder type solid inner capacitor may support its own weight to prevent its structure from being damaged during the fabrication of the capacitor.

公开(公告)号：US20230395393A1

公开(公告)日：2023-12-07

申请号：US17830124

申请日：2022-06-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chao-Chun Wang

IPC: H01L21/321 ,  H01L21/02 ,  H01L21/768 ,  H01L29/06 ,  H01L29/66 ,  H01L29/786 ,  H01L23/528

CPC classification number: H01L21/3212 ,  H01L21/02052 ,  H01L21/76897 ,  H01L29/0665 ,  H01L29/66742 ,  H01L29/78618 ,  H01L23/5283

Abstract: A method of forming a semiconductor device includes forming an electronic component over a substrate; forming a first insulating layer over the electronic component; forming a contact plug extending through the first insulating layer to the electronic component, wherein the contact plug includes a first portion formed of a conductive material and a second portion formed of an oxide of the conductive material disposed over the first portion; performing a treatment to expose the contact plug and the first insulating layer to a gas mixture of N2 and NH3; after performing the treatment, forming a second insulating layer over the contact plug and the first insulating layer; and forming an interconnect in the second insulating layer and in contact with the contact plug.

公开(公告)号：US20230395392A1

公开(公告)日：2023-12-07

申请号：US17832969

申请日：2022-06-06

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Pei-Yu CHOU ,  Yen-Yu CHEN ,  Meng-Ku CHEN ,  Shiang-Bau WANG ,  Tze-Liang LEE

IPC: H01L21/321 ,  H01L21/463

CPC classification number: H01L21/32115 ,  H01L21/463

Abstract: A method for manufacturing a semiconductor structure includes: forming a semiconductor device on a main region of the device substrate, the device substrate having a peripheral region surrounding the main region; forming a first filling layer on the peripheral region of the device substrate; forming a second filling layer over the first filling layer and the semiconductor device after forming the first filling layer, the second filling layer having a polishing rate different from that of the first filling layer; performing a planarization process over the second filling layer to remove a portion of the second filling layer so that a remaining portion of the second filling layer has a planarized surface opposite to the device substrate; and bonding the device substrate to a carrier substrate through the first filling layer and the remaining portion of the second filling layer.

公开(公告)号：US20230387186A1

公开(公告)日：2023-11-30

申请号：US18363217

申请日：2023-08-01

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Chun-Chieh LU ,  Mauricio MANFRINI ,  Marcus Johannes Hendricus VAN DAL ,  Chih-Yu CHANG ,  Sai-Hooi YEONG ,  Yu-Ming LIN ,  Georgios VALLIANITIS

IPC: H01G4/33 ,  H01L21/3213 ,  H01L21/321

CPC classification number: H01L28/40 ,  H01L21/32136 ,  H01L21/3212

Abstract: Embodiments include structures and methods for fabricating an MFM capacitor having a plurality of metal contacts. An embodiment may include a first metal strip, disposed on a substrate and extending in a first direction, a ferroelectric blanket layer, disposed on the first metal strip, a second metal strip, disposed on the ferroelectric blanket layer and extending in a second direction different from the first direction, and a plurality of metal contacts disposed between the first metal strip and the second metal strip and located within an intersection region of the first metal strip and the second metal strip.

公开(公告)号：US20230380129A1

公开(公告)日：2023-11-23

申请号：US18362786

申请日：2023-07-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hidehiro FUJIWARA ,  Wei-Min CHAN ,  Chih-Yu LIN ,  Yen-Huei CHEN ,  Hung-Jen LIAO

IPC: H10B10/00 ,  H01L27/02 ,  H01L21/321 ,  H01L21/768 ,  H01L23/528

CPC classification number: H10B10/12 ,  H01L27/0207 ,  H01L21/321 ,  H01L21/76838 ,  H01L23/5283

Abstract: A device includes first and second gate electrodes, a word line and a first metal island. The first gate electrode corresponds to transistors of a memory cell. The second gate electrode is separated from the first gate electrode and corresponds to the transistors. The word line is coupled to the memory cell and located between the first and the second gate electrodes. The first metal island is configured to couple a first power supply to the memory cell. A first boundary of the first metal island is located between first and second boundaries of the first gate electrode and is located between first and second boundaries of the word line, and each of the first boundary of the first gate electrode and the first boundary of the word line is located between first and second boundaries of the first metal island.

公开(公告)号：US20230364734A1

公开(公告)日：2023-11-16

申请号：US18359180

申请日：2023-07-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pin-Chuan Su ,  Jeng-Chi Lin ,  Guan-Yi Lee ,  Hui-Chi Huang ,  Kei-Wei Chen

IPC: B24B37/20 ,  H01L21/306 ,  H01L21/321

CPC classification number: B24B37/20 ,  H01L21/30625 ,  H01L21/3212

Abstract: An embodiment is a polishing pad including a top pad and a sub pad that is below and contacting the top pad. The top pad includes top grooves along a top surface and microchannels extending from the top grooves to a bottom surface of the top pad. The sub pad includes sub grooves along a top surface of the sub pad.