Abstract:
A method for forming a compressive stress carbon-doped silicon nitride layer is provided. The method includes forming an initiation layer and a bulk layer thereon, wherein the bulk layer has a compressive stress of between about −0.1 GPa and about −10 GPa. The initiation layer is deposited from a gas mixture that includes a silicon and carbon-containing precursor and optionally a nitrogen and/or source but does not include hydrogen gas. The bulk layer is deposited from a gas mixture that includes a silicon and carbon-containing precursor, a nitrogen source, and hydrogen gas. The initiation layer is a thin layer that allows good transfer of the compressive stress of the bulk layer therethrough to an underlying layer, such as a channel of a transistor.
Abstract:
An article having a protective coating for use in semiconductor applications and methods for making the same are provided. In certain embodiments, a method of coating an aluminum surface of an article utilized in a semiconductor processing chamber is provided. The method comprises providing a processing chamber; placing the article into the processing chamber; flowing a first gas comprising a carbon source into the processing chamber; flowing a second gas comprising a nitrogen source into the processing chamber; forming a plasma in the chamber; and depositing a coating material on the aluminum surface. In certain embodiments, the coating material comprises an amorphous carbon nitrogen containing layer. In certain embodiments, the article comprises a showerhead configured to deliver a gas to the processing chamber.
Abstract:
Methods are provided for processing a substrate comprising a bilayer barrier film thereon. In one aspect, a method comprises depositing a first barrier layer, depositing a second barrier layer on the first barrier layer, depositing a dielectric layer on the bilayer barrier film formed by the first barrier layer and the second barrier layer, and ultraviolet curing the dielectric layer. In another aspect, a method comprises depositing a first barrier layer, depositing a second barrier layer on the first barrier layer, depositing a dielectric layer on the bilayer barrier film formed by the first barrier layer and the second barrier layer, and curing the dielectric layer with an electron beam treatment.
Abstract:
Methods for cleaning semiconductor processing chambers used to process carbon-containing films, such as amorphous carbon films, barrier films comprising silicon and carbon, and low dielectric constant films including silicon, oxygen, and carbon are provided. The methods include using a remote plasma source to generate reactive species that clean interior surfaces of a processing chamber in the absence of RF power in the chamber. The reactive species are generated from an oxygen-containing gas, such as O2, and/or a halogen-containing gas, such as NF3. An oxygen-based ashing process may also be used to remove carbon deposits from the interior surfaces of the chamber before the chamber is exposed to the reactive species from the remote plasma source.
Abstract:
The Grunn equation: Depth = 0.046 ( V acc ) n ρ is modified to accurately predict depth of electron beam penetration into a target material. A two-layer stack is formed comprising a thickness of the target material overlying a detection material exhibiting greater sensitivity to the electron beam than the target material. The target material is exposed to electron beam radiation of different energies, with the threshold energy resulting in a changed physical property of the detection material below a predetermined value marking a penetration depth corresponding to the target material thickness. Utilizing the threshold energy (Vacc), the target material thickness (Depth), and the known target material density (ρ), the numerical power “n” of the Grunn equation is calculated to fit experimental results. So modified, the Grunn equation accurately predicts the depth of penetration of electron beams of varying energies into the target material.
Abstract:
Methods and systems of diagnosing an arcing problem in a semiconductor wafer processing chamber are described. The methods may include coupling a voltage probe to a process-gas distribution faceplate in the processing chamber, and activating an RF power source to generate a plasma between the faceplate and a substrate wafer. The methods may also include measuring the DC bias voltage of the faceplate as a function of time during the activation of the RF power source, where a spike in the measured voltage at the faceplate indicates an arcing event has occurred in the processing chamber. Methods and systems to reduce arcing in a semiconductor wafer processing chamber are also described.
Abstract:
High tensile stress in a deposited layer such as silicon nitride, may be achieved utilizing one or more techniques, employed alone or in combination. High tensile stress may be achieved by forming a silicon-containing layer on a surface by exposing the surface to a silicon-containing precursor gas in the absence of a plasma, forming silicon nitride by exposing said silicon-containing layer to a nitrogen-containing plasma, and then repeating these steps to increase a thickness of the silicon nitride created thereby. High tensile stress may also be achieved by exposing a surface to a silicon-containing precursor gas in a first nitrogen-containing plasma, treating the material with a second nitrogen-containing plasma, and then repeating these steps to increase a thickness of the silicon nitride formed thereby. In another embodiment, tensile film stress is enhanced by deposition with porogens that are liberated upon subsequent exposure to UV radiation or plasma treatment.
Abstract:
An ultraviolet (UV) cure chamber enables curing a dielectric material disposed on a substrate and in situ cleaning thereof. A tandem process chamber provides two separate and adjacent process regions defined by a body covered with a lid having windows aligned respectively above each process region. One or more UV bulbs per process region that are covered by housings coupled to the lid emit UV light directed through the windows onto substrates located within the process regions. The UV bulbs can be an array of light emitting diodes or bulbs utilizing a source such as microwave or radio frequency. The UV light can be pulsed during a cure process. Using oxygen radical/ozone generated remotely and/or in-situ accomplishes cleaning of the chamber. Use of lamp arrays, relative motion of the substrate and lamp head, and real-time modification of lamp reflector shape and/or position can enhance uniformity of substrate illumination.
Abstract:
Embodiments of the present invention provide a highly uniform low cost production worthy solution for manufacturing low propagation loss optical waveguides on a substrate. In one embodiment, the present invention provides a method of forming a PSG optical waveguide on an undercladding layer of a substrate that includes forming at least one silicate glass optical core on said undercladding layer using a plasma enhanced chemical vapor deposition process including a silicon source gas, an oxygen source gas, and a phosphorus source gas, wherein the oxygen source gas and silicon source gas have a ratio of oxygen atoms to silicon atoms greater than 20:1.
Abstract:
Embodiments of the present invention provide a highly uniform low cost production worthy solution for manufacturing low propagation loss optical waveguides on a substrate. In one embodiment, the present invention provides a method of forming a PSG optical waveguide on an undercladding layer of a substrate that includes forming at least one silicate glass optical core on said undercladding layer using a plasma enhanced chemical vapor deposition process including a silicon source gas, an oxygen source gas, and a phosphorus source gas, wherein the oxygen source gas and silicon source gas have a ratio of oxygen atoms to silicon atoms greater than 20:1.