公开(公告)号：US07940637B2

公开(公告)日：2011-05-10

申请号：US12260509

申请日：2008-10-29

Applicant: Wook Yeon Hwang ,  Jooho Kim ,  Jung-Hyeon Kim ,  Taek Sung Lee ,  Byung Ki Cheong ,  Hyun Seok Lee ,  Suyoun Lee ,  Won Mok Kim ,  Jeung-hyun Jeong

Inventor： Wook Yeon Hwang ,  Jooho Kim ,  Jung-Hyeon Kim ,  Taek Sung Lee ,  Byung Ki Cheong ,  Hyun Seok Lee ,  Suyoun Lee ,  Won Mok Kim ,  Jeung-hyun Jeong

IPC: G11B7/24

CPC classification number: G11B7/252 ,  G11B7/24065 ,  G11B7/2531 ,  G11B7/2533 ,  G11B7/259 ,  G11B7/266 ,  G11B2007/24304 ,  G11B2007/24306 ,  G11B2007/2432

Abstract: A super-resolution optical recording medium includes a reflective layer formed on a substrate, a recording layer for recording information thereon, a super-resolution layer made of a chalcogenide semiconductor material, and a first and a second dielectric layers laminated on upper and lower surfaces of the super-resolution layer. The recording layer is made of a material that has a decomposition temperature higher than an information reproduction temperature and does not form bubble recording marks during recording, and the super-resolution layer contains one or more elements selected from the group consisting of nitrogen, oxygen, carbon, and boron.

Abstract translation: 超分辨率光记录介质包括形成在基板上的反射层，用于在其上记录信息的记录层，由硫族化物半导体材料制成的超分辨率层，以及层叠在上表面和下表面上的第一和第二介电层 的超分辨率层。 记录层由分解温度高于信息再现温度的材料制成，并且在记录期间不形成气泡记录标记，并且超分辨率层含有一种或多种选自氮，氧， 碳和硼。

公开(公告)号：US20110102968A1

公开(公告)日：2011-05-05

申请号：US12838296

申请日：2010-07-16

Applicant: Jae-Hyoung CHOI ,  Youn-Soo Kim ,  Jung-Hyeon Kim ,  Wan-Don Kim ,  Jae-Soon Lim ,  Sang-Yeol Kang

Inventor： Jae-Hyoung CHOI ,  Youn-Soo Kim ,  Jung-Hyeon Kim ,  Wan-Don Kim ,  Jae-Soon Lim ,  Sang-Yeol Kang

IPC: H01G4/008 ,  B32B9/04 ,  B05D5/12 ,  C23C14/34

CPC classification number: H01L23/5223 ,  H01L23/53261 ,  H01L28/56 ,  H01L28/91 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/518 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a multilayer structure and a method of forming the same, a conductive layer including a metal nitride and a dielectric layer positioned on a surface of the conductive layer and having a high dielectric constant. The metal nitride comprises one of niobium, vanadium and compositions thereof. Thus, the EOT and leakage current of the multilayer structure may be sufficiently improved.

Abstract translation: 在多层结构及其形成方法中，包括位于导电层表面上并具有高介电常数的金属氮化物和电介质层的导电层。 金属氮化物包括铌，钒及其组合物中的一种。 因此，可以充分提高多层结构的EOT和漏电流。

公开(公告)号：US20110081762A1

公开(公告)日：2011-04-07

申请号：US12880721

申请日：2010-09-13

Applicant: Suk-hun Choi ,  In-gyu Baek ,  Jun-young Lee ,  Jung-hyeon Kim ,  Chang-ki Hong ,  Yoon-ho Son

Inventor： Suk-hun Choi ,  In-gyu Baek ,  Jun-young Lee ,  Jung-hyeon Kim ,  Chang-ki Hong ,  Yoon-ho Son

IPC: H01L21/02

CPC classification number: H01L45/04 ,  H01L27/2409 ,  H01L27/2481 ,  H01L28/20 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1683

Abstract: A semiconductor memory device includes a first conductive line on a semiconductor substrate, an interlayer insulating layer on the first conductive line, a second conductive line on the interlayer insulating layer, and a memory cell in an hole through the interlayer insulating layer wherein the first and second conductive lines cross, the memory cell including a discrete resistive memory material region disposed in the hole and electrically connected between the first and second conductive lines. The resistive memory material region may be substantially contained within the hole. In some embodiments, contact between the resistive memory material region and the interlayer insulating layer is substantially limited to sidewalls of the interlayer insulating layer in the hole.

Abstract translation: 半导体存储器件包括半导体衬底上的第一导电线，第一导线上的层间绝缘层，层间绝缘层上的第二导线，以及穿过层间绝缘层的孔中的存储单元，其中， 第二导线交叉，存储单元包括设置在孔中并电连接在第一和第二导线之间的分立的电阻性存储器材料区域。 电阻性存储器材料区域可以基本上包含在孔内。 在一些实施例中，电阻性存储器材料区域和层间绝缘层之间的接触基本上限于孔中的层间绝缘层的侧壁。

公开(公告)号：US07878564B2

公开(公告)日：2011-02-01

申请号：US11987482

申请日：2007-11-30

Applicant: Jin-won Kang ,  Jun-young Lee ,  Jung-hyeon Kim

Inventor： Jin-won Kang ,  Jun-young Lee ,  Jung-hyeon Kim

IPC: B25J15/06

CPC classification number: H01L21/6838

Abstract: A vacuum type pickup apparatus may include an absorption pad having an absorption inlet for contacting and/or picking up an object. A pad holder may be connected to the absorption pad. The pad holder may also have a vacuum line. A separator may be provided in the pad holder for forcibly releasing the object from the absorption inlet of the absorption pad. During the forcible release of the object, the air around the absorption pad may be drawn into the pad holder, thus reducing or preventing the potential contamination by impurities of the object as well as the equipment around the object. Also, an additional vacuum extinguisher may not be required, thus simplifying the structure of the vacuum type pickup apparatus and reducing installation costs. Furthermore, the object may be picked up and released in a relatively expedient, safe, and accurate manner, despite the suction force of the vacuum that may be maintained in the pad holder.

Abstract translation: 真空型拾取装置可以包括具有用于接触和/或拾取物体的吸收入口的吸收垫。 吸垫保持器可以连接到吸收垫。 垫座也可以具有真空管线。 可以在衬垫保持器中设置分离器，以从吸收垫的吸收入口强制地释放物体。 在物体的强制释放期间，吸收垫周围的空气可以被吸入到垫保持器中，从而减少或防止物体的杂质以及物体周围的设备的潜在污染。 此外，可以不需要附加的真空灭火器，因此简化了真空型拾取装置的结构并降低了安装成本。 此外，尽管可以在垫保持器中保持真空的吸力，但是物体可以以相对便利，安全和准确的方式被拾取和释放。

公开(公告)号：US07877865B2

公开(公告)日：2011-02-01

申请号：US12387299

申请日：2009-04-29

Applicant: Sun-Woo Lee ,  Seong-Ho Moon ,  Dong-Woo Kim ,  Jung-Hyeon Kim ,  Hong-Sik Yoon

Inventor： Sun-Woo Lee ,  Seong-Ho Moon ,  Dong-Woo Kim ,  Jung-Hyeon Kim ,  Hong-Sik Yoon

IPC: H01R43/00 ,  H01L21/44

CPC classification number: H01L21/76879 ,  H01L21/76849 ,  H01L23/5252 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2924/00

Abstract: In a method of forming a wiring having a carbon nanotube, a lower wiring is formed on a substrate, and a catalyst layer is formed on the lower wiring. An insulating interlayer is formed on the substrate to cover the catalyst layer, and an opening is formed through the insulating interlayer to expose an upper face of the catalyst layer. A carbon nanotube wiring is formed in the opening, and an upper wiring is formed on the carbon nanotube wiring and the insulating interlayer to be electrically connected to the carbon nanotube wiring. A thermal stress is generated between the carbon nanotube wiring and the upper wiring to produce a dielectric breakdown of a native oxide layer formed on a surface of the carbon nanotube wiring. A wiring having a reduced electrical resistance between the carbon nanotube wiring and the upper wiring may be obtained.

Abstract translation: 在形成具有碳纳米管的布线的方法中，在基板上形成下布线，并且在下布线上形成催化剂层。 在衬底上形成绝缘中间层以覆盖催化剂层，并且通过绝缘中间层形成开口以暴露催化剂层的上表面。 在开口部形成有碳纳米管布线，在碳纳米管布线和绝缘中间层上形成上部配线，与碳纳米管配线电连接。 在碳纳米管布线和上布线之间产生热应力，以产生形成在碳纳米管布线表面上的天然氧化物层的电介质击穿。 可以获得碳纳米管布线和上布线之间的电阻降低的布线。

公开(公告)号：US07850360B2

公开(公告)日：2010-12-14

申请号：US11931553

申请日：2007-10-31

Applicant: Se Ki Park ,  Moon Hwan Chang ,  Gi Cherl Kim ,  Joo Woan Cho ,  Jung Hyeon Kim

Inventor： Se Ki Park ,  Moon Hwan Chang ,  Gi Cherl Kim ,  Joo Woan Cho ,  Jung Hyeon Kim

IPC: F21V7/04

CPC classification number: G02B6/0085 ,  G02B6/0083 ,  G02F1/133603 ,  G02F1/133608 ,  G02F2001/133628

Abstract: The present invention relates to a backlight assembly and a liquid crystal display (“LCD”) having the same. The backlight assembly includes a light source unit including a printed circuit board (“PCB”) and a plurality of light emitting diodes (“LEDs”) mounted on a side of the PCB, a receiving member including a base plate and a plurality of walls that extend from the base plate at an angle and receive the light source unit, and a plurality of through holes or uneven patterns formed in a region of the receiving member where at least the light source unit is disposed.

Abstract translation: 本发明涉及背光组件和具有该背光组件的液晶显示器（“LCD”）。 该背光组件包括一个光源单元，它包括印刷电路板（“PCB”）和安装在PCB一侧的多个发光二极管（“LED”），一个接收构件，包括一个基板和多个壁 从基板以一定角度延伸并容纳光源单元，以及形成在至少设置有光源单元的接收构件的区域中的多个通孔或不均匀图案。

公开(公告)号：US20100259963A1

公开(公告)日：2010-10-14

申请号：US12659883

申请日：2010-03-24

Applicant: Jong-Hak Won ,  Hyang-Ja Yang ,  Choong-Sun Shin ,  Hak-Soo Yu ,  Young-Soo An ,  Jung-Hyeon Kim

Inventor： Jong-Hak Won ,  Hyang-Ja Yang ,  Choong-Sun Shin ,  Hak-Soo Yu ,  Young-Soo An ,  Jung-Hyeon Kim

IPC: G11C5/06

CPC classification number: G11C5/06 ,  G11C11/4097

Abstract: A data line layout includes column selection lines arranged in a first direction at a layer on a memory cell array region, and data lines arranged in the first direction at the layer, the data lines being connected between I/O sense amplifiers and I/O pads.

Abstract translation: 数据线布局包括在存储单元阵列区域上的层上沿着第一方向布置的列选择线以及沿着该层的第一方向布置的数据线，数据线连接在I / O读出放大器和I / O之间 垫

公开(公告)号：US20100232124A1

公开(公告)日：2010-09-16

申请号：US12713282

申请日：2010-02-26

Applicant: Hyo-Jae BANG ,  Jung-Hyeon KIM

Inventor： Hyo-Jae BANG ,  Jung-Hyeon KIM

IPC: H05K5/02

CPC classification number: H05K1/18 ,  H01G9/08 ,  H01G9/155 ,  H01L2224/16227 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/19106 ,  H05K3/325 ,  H05K3/403 ,  H05K5/0091 ,  H05K2201/09181 ,  H05K2201/10015 ,  H05K2201/10515 ,  H01L2224/0401

Abstract: A casing to support a solid state device SSD therein and super capacitors therein to be electronically connected together.

Abstract translation: 用于支撑其中的固态器件SSD的壳体和其中的超级电容器以电子方式连接在一起。

公开(公告)号：US07786721B2

公开(公告)日：2010-08-31

申请号：US12006543

申请日：2008-01-03

Applicant: Min-Gu Kim ,  Young-Soo An ,  Ho-Jeong Choi ,  Jung-Hyeon Kim

Inventor： Min-Gu Kim ,  Young-Soo An ,  Ho-Jeong Choi ,  Jung-Hyeon Kim

IPC: G01R31/28 ,  G01R31/26

CPC classification number: G01R31/2851 ,  G01R1/04 ,  H05K1/144 ,  H05K1/148 ,  H05K2201/042 ,  H05K2201/09972 ,  H05K2201/10371

Abstract: There is provided a multilayer type test board assembly for high-precision inspection. The multilayer test board assembly comprises: a plurality of test boards separated from each other according to their functions, having input/output signal terminals, and including at least one test board each having a first section where first mounting devices sensitive to an influence of electrical signals are mounted and a second section where second mounting devices insensitive to an influence of electrical signals are mounted; spacers that arrange the test boards in parallel by spacing apart the test boards by predetermined intervals; connection cables connected to the input/output signal terminals of the test boards; and a signal shielding fence formed on each of the at least one test board so as to protect the first mounting devices from electrical signals generated by the second mounting devices.

Abstract translation: 提供了一种用于高精度检测的多层型测试板组件。 多层测试板组件包括：根据功能彼此分离的多个测试板，具有输入/输出信号端子，并且包括至少一个测试板，每个测试板具有第一部分，其中第一安装装置对电气的影响敏感 信号被安装，并且第二部分安装对电信号的影响不敏感的第二安装装置; 间隔件通过以预定的间隔隔开测试板来平行布置测试板; 连接电缆连接到测试板的输入/输出信号端子; 以及形成在所述至少一个测试板中的每一个上的信号屏蔽栅栏，以便保护所述第一安装装置免受由所述第二安装装置产生的电信号。

公开(公告)号：US20100147582A1

公开(公告)日：2010-06-17

申请号：US12573787

申请日：2009-10-05

Applicant: Jin-Soo SHIN ,  Jin-Yong Park ,  Jun-Hee Son ,  Jung-Hyeon Kim ,  Se-Ki Park

Inventor： Jin-Soo SHIN ,  Jin-Yong Park ,  Jun-Hee Son ,  Jung-Hyeon Kim ,  Se-Ki Park

IPC: H05K7/14

CPC classification number: G02F1/133308 ,  G02F2001/133317

Abstract: A display device comprises: a display panel including a first insulating substrate and a second insulating substrate that is arranged so as to deviate from the first insulating substrate; and an intermediate frame, wherein the intermediate frame includes: side walls that are arranged so as to correspond to four side surface of the display panel; a mounting portion which protrudes from the side walls inward and on which the first insulating substrate is mounted; and a supporting protrusion that protrudes from the mounting portion to the second insulating substrate and is arranged below the second insulating substrate and on the side of the first insulating substrate.

Abstract translation: 显示装置包括：显示面板，包括第一绝缘基板和布置成偏离所述第一绝缘基板的第二绝缘基板; 和中间框架，其中所述中间框架包括：侧壁，其布置成对应于所述显示面板的四个侧表面; 安装部，其从所述侧壁向内突出，并且所述第一绝缘基板安装在所述安装部上; 以及从所述安装部向所述第二绝缘基板突出并配置在所述第二绝缘基板的下方并且位于所述第一绝缘基板的一侧的支撑突起。