公开(公告)号：US09142530B2

公开(公告)日：2015-09-22

申请号：US14214765

申请日：2014-03-15

申请人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Sung Soo Kim ,  Asri Yusof ,  In Sang Yoon

发明人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Sung Soo Kim ,  Asri Yusof ,  In Sang Yoon

IPC分类号： H01L23/29 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L25/065 ,  H01L23/31

CPC分类号： H01L24/81 ,  H01L21/4846 ,  H01L21/486 ,  H01L21/561 ,  H01L21/683 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2732 ,  H01L2224/27334 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81411 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/8385 ,  H01L2224/85444 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A system and method for manufacturing an integrated circuit packaging system includes: forming a base substrate including: providing a sacrificial carrier: mounting a metallic sheet on the sacrificial carrier, applying a top trace to the metallic sheet, forming a conductive stud on the top trace, forming a base encapsulation over the metallic sheet, the top trace, and the conductive stud, the top trace exposed from a top surface of the base encapsulation, and removing the sacrificial carrier and the metallic sheet; mounting an integrated circuit device on the base substrate; and encapsulating the integrated circuit device and the base substrate with a top encapsulation.

摘要翻译： 一种用于制造集成电路封装系统的系统和方法，包括：形成基底基底，包括：提供牺牲载体：将金属片安装在牺牲载体上，向金属片施加顶部迹线，在顶部迹线上形成导电柱 在所述金属片，所述顶部迹线和所述导电柱上形成基底封装，所述顶部迹线从所述基底封装的顶部表面露出，以及移除所述牺牲载体和所述金属片; 在基底基板上安装集成电路器件; 并用顶部封装封装集成电路器件和基底衬底。

公开(公告)号：US20150179555A1

公开(公告)日：2015-06-25

申请号：US14136513

申请日：2013-12-20

申请人： Sung Soo Kim ,  Byung Tai Do ,  Arnel Senosa Trasporto

发明人： Sung Soo Kim ,  Byung Tai Do ,  Arnel Senosa Trasporto

IPC分类号： H01L23/495 ,  H01L21/48

CPC分类号： H01L21/4857 ,  H01L21/486 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014

摘要： A system and method of manufacture of an integrated circuit packaging system includes: a trace layer; a stud directly on a portion of the trace layer for forming a metal-to-metal connection with the trace layer; a dielectric layer directly on the trace layer and the stud for forming a vialess substrate exposing the trace layer and the dielectric layer; an active device on the trace layer, the trace layer exposed from the vialess substrate; a die interconnect coupled between the active device to the trace layer for providing electrical connectivity; and an external interconnect connected to the stud for electrically coupling the active device, the trace layer, the studs, and the external interconnect.

摘要翻译： 集成电路封装系统的制造和制造方法包括：迹线层; 直径在轨迹层的一部分上的螺柱，用于与迹线层形成金属对金属的连接; 直接在迹线层上的电介质层和用于形成暴露痕量层和电介质层的无小心衬底的螺柱; 痕量层上的有源器件，从无小孔衬底露出的迹线层; 耦合在有源器件与迹线层之间以提供电连接的芯片互连; 以及连接到螺柱的外部互连件，用于电耦合有源器件，迹线层，螺柱和外部互连。

公开(公告)号：US08963320B2

公开(公告)日：2015-02-24

申请号：US13528051

申请日：2012-06-20

申请人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua ,  Wei Chun Ang

发明人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua ,  Wei Chun Ang

IPC分类号： H01L23/10 ,  H01L23/34 ,  H01L23/495 ,  H01L23/48 ,  H01L21/00 ,  H01L23/36 ,  H01L23/367 ,  H01L23/498 ,  H01L23/433 ,  H01L23/00

CPC分类号： H01L23/36 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/12042 ,  H01L2924/00

摘要： A method of manufacture of an integrated circuit packaging system includes: forming a thermal attach cluster includes: forming a heat collector having a heat dissipation surface, forming a cluster bridge, having a thermal surface, connected to the heat collector, forming a cluster pad, having an attachment surface, connected to the end of the cluster bridge opposite the heat collector; connecting an integrated circuit to the thermal attach cluster; and forming an encapsulation over the thermal attach cluster with the heat dissipation surface, the thermal surface, and the attachment surface exposed from and coplanar with the encapsulation.

摘要翻译： 一种集成电路封装系统的制造方法，其特征在于，包括：形成热连接群，包括：形成具有散热面的集热体，形成具有与所述集热体连接的热表面的簇桥，形成簇垫， 具有附接表面，连接到与集热器相对的簇桥的端部; 将集成电路连接到热连接集群; 并且在散热表面，热表面和附着表面上形成一个封装，散热表面和附着表面暴露并与封装共面。

公开(公告)号：US08957509B2

公开(公告)日：2015-02-17

申请号：US13166809

申请日：2011-06-23

申请人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua

发明人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua

IPC分类号： H01L23/495 ,  H01L23/48 ,  H01L23/50 ,  H01L21/00 ,  H01L21/48 ,  H01L25/065 ,  H01L23/31

CPC分类号： H01L23/49582 ,  H01L21/4832 ,  H01L23/3107 ,  H01L23/49575 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00012

摘要： A method of manufacture of an integrated circuit packaging system includes: forming a lead array having an innermost space with an innermost lead having an inner lead profile different around an inner non-horizontal side of the innermost lead; forming a middle lead having a middle lead profile the same around a lead side of the middle lead; placing an integrated circuit in the innermost space adjacent to the innermost lead; and forming a package encapsulation over the integrated circuit, the innermost lead, and the middle lead.

摘要翻译： 一种集成电路封装系统的制造方法，包括：形成具有最内部空间的引线阵列，其中最内引线具有在最内引线的内非水平侧周围不同的内引线轮廓; 在中间引线的引线侧形成具有中间引线轮廓的中间引线; 将集成电路放置在与最内层导线相邻的最内层空间中; 以及在集成电路，最内部引线和中间引线上形成封装封装。

公开(公告)号：US08841173B2

公开(公告)日：2014-09-23

申请号：US13427598

申请日：2012-03-22

申请人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua

发明人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua

IPC分类号： H01L21/50 ,  H01L21/56 ,  H01L23/495 ,  H01L21/48

CPC分类号： H01L21/568 ,  H01L21/4832 ,  H01L23/49548 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/73 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  Y10T29/4921 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a leadframe with a grid lead and a support pad; connecting a redistribution layer to the grid lead, the redistribution layer over the support pad; mounting an integrated circuit over the redistribution layer; applying an encapsulation on the redistribution layer, the redistribution layer in an interior area of the leadframe and the interior area under the integrated circuit; forming a support pad residue on the bottom surface of the redistribution layer by removing the support pad under the encapsulation and the interior redistribution layer; and forming an insulation layer on the support pad residue and the grid lead.

摘要翻译： 一种制造集成电路封装系统的方法包括：提供具有栅格引线和支撑垫的引线框架; 将重新分配层连接到网格引线，重新分布层在支撑垫上; 在再分配层上安装集成电路; 在再分配层上施加封装，在引线框的内部区域和集成电路下的内部区域中的再分配层; 通过在封装和内部再分布层下移除支撑垫，在再分布层的底表面上形成支撑垫残留物; 以及在所述支撑垫残留物和所述栅格引线上形成绝缘层。

公开(公告)号：US20140165389A1

公开(公告)日：2014-06-19

申请号：US13714815

申请日：2012-12-14

申请人： Byung Tai DO ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua ,  Sung Soo Kim

发明人： Byung Tai DO ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua ,  Sung Soo Kim

IPC分类号： H01L21/48

CPC分类号： H01L21/4825 ,  H01L23/3128 ,  H01L23/49548 ,  H01L23/49582 ,  H01L23/49861 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/10175 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/1624 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/81395 ,  H01L2224/814 ,  H01L2224/81439 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/3511 ,  Y10T29/49117 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2924/01047 ,  H01L2924/00012

摘要： System and method of manufacturing an integrated circuit packaging system using routable grid array lead frame. Method includes providing a lead frame having top metal connector and bottom contact, and treating the top metal connector with an additive, or the bottom contact with an additive, or both. Concomitant to the treatment process, insulation cover or bottom encapsulation can be formed about the top metal connector or the bottom contact with respective openings. Upon coupling the interconnects to the lead frame the interconnects do not exceed the metal contacts by more than about 60% due to the treatment process.

摘要翻译： 使用可布线网格阵列引线框架制造集成电路封装系统的系统和方法。 方法包括提供具有顶部金属连接器和底部接触的引线框架，以及用添加剂处理顶部金属连接器，或者与添加剂的底部接触或两者。 伴随处理过程，可以围绕顶部金属连接器或与相应开口的底部接触形成绝缘盖或底部封装。 在将互连件耦合到引线框架时，由于处理过程，互连不超过约60％的金属触点。

公开(公告)号：US20140008774A1

公开(公告)日：2014-01-09

申请号：US13542120

申请日：2012-07-05

申请人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua

发明人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua

IPC分类号： H01L23/495 ,  H01L21/56 ,  H01L21/60

CPC分类号： H01L23/4952 ,  H01L21/4832 ,  H01L23/3128 ,  H01L23/49582 ,  H01L24/16 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2924/00

摘要： A method of manufacture of an integrated circuit packaging system includes providing a lead-frame having an inner portion and a bottom cover directly on a bottom surface of the inner portion; forming an insulation cover directly on the lead-frame with the insulation cover having a connection opening; connecting an integrated circuit die to the lead-frame through the connection opening with the integrated circuit die over the insulation cover; forming a top encapsulation directly on the insulation cover; forming a routing layer having a conductive land directly on the bottom cover by shaping the lead-frame; and forming a bottom encapsulation directly on the conductive land with the bottom cover exposed from the bottom encapsulation.

摘要翻译： 一种集成电路封装系统的制造方法，其特征在于，在所述内部部分的底面上设置有具有内部部分和底部盖子的引线框架， 在所述引线框架上直接形成绝缘盖，所述绝缘盖具有连接开口; 通过连接开口将集成电路管芯与引线框架连接在集成电路管芯上，绝缘盖上; 在绝缘盖上直接形成顶部封装; 通过使所述引线框架成形来形成具有直接在所述底盖上的导电焊盘的布线层; 并且在底部封装暴露的底盖上直接在导电焊盘上形成底部封装。

公开(公告)号：US20130249118A1

公开(公告)日：2013-09-26

申请号：US13428251

申请日：2012-03-23

申请人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua

发明人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua

IPC分类号： H01L23/485 ,  H01L21/60

CPC分类号： H01L23/49816 ,  H01L21/4828 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49861 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/96 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48177 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/8385 ,  H01L2224/96 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacture of an integrated circuit packaging system includes: forming a conductive trace having a terminal end and a circuit end; forming a terminal on the terminal end; connecting an integrated circuit die directly on the circuit end of the conductive trace, the integrated circuit die laterally offset from the terminal, the active side of the integrated circuit die facing the circuit end; and forming an insulation layer on the terminal and the integrated circuit die, the integrated circuit die covered by the insulation layer.

摘要翻译： 一种集成电路封装系统的制造方法，包括：形成具有终端和电路端的导电迹线; 在终端上形成终端; 将集成电路芯片直接连接在导电迹线的电路端，集成电路芯片从端子侧向偏移，集成电路芯片的有源侧面向电路端; 并在端子和集成电路管芯上形成绝缘层，由绝缘层覆盖集成电路管芯。

公开(公告)号：US20130154072A1

公开(公告)日：2013-06-20

申请号：US13326173

申请日：2011-12-14

申请人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua

发明人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L23/49548 ,  H01L21/4832 ,  H01L23/3121 ,  H01L23/49541 ,  H01L23/49558 ,  H01L23/49582 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/05554 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/29099 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacture of an integrated circuit packaging system includes: forming a peripheral lead having a peripheral lead bottom side, a peripheral lead top side, a peripheral lead non-horizontal side, and a peripheral lead horizontal ridge protruding from the peripheral lead non-horizontal side; forming a first top distribution layer on the peripheral lead top side; connecting an integrated circuit to the first top distribution layer; and applying an insulation layer directly on a distribution layer bottom extent of the first top distribution layer and a peripheral lead ridge lower side of the peripheral lead horizontal ridge with a cavity in the portion of the insulation layer directly below the integrated circuit.

摘要翻译： 一种集成电路封装系统的制造方法，其特征在于，具备：外周引线底面，外周引线顶面，外周引线非水平侧，外周引线水平脊突出的周边引线， 水平面 在外围引线顶侧形成第一顶部分布层; 将集成电路连接到第一顶部分布层; 并且绝缘层直接施加在第一顶部分布层的分布层底部范围和周边引线水平脊的周围引线脊下侧，并且在绝缘层的直接在集成电路下面的部分具有空腔。

公开(公告)号：US20120280407A1

公开(公告)日：2012-11-08

申请号：US13102047

申请日：2011-05-05

申请人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua

发明人： Byung Tai Do ,  Arnel Senosa Trasporto ,  Linda Pei Ee Chua

IPC分类号： H01L23/48 ,  H01L21/56

CPC分类号： H01L23/49811 ,  H01L21/4832 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacture of an integrated circuit packaging system includes: forming an isolated contact having a contact protrusion, the contact protrusion having a lower protrusion surface, an upper protrusion surface, and a protrusion sidewall; forming a die paddle, adjacent to the isolated contact, having a die paddle protrusion, the die paddle protrusion having a lower die protrusion surface, an upper die protrusion surface, and a die protrusion sidewall; depositing a contact pad on the contact protrusion; depositing a die paddle pad on the die paddle protrusion; coupling an integrated circuit die to the contact protrusion; and molding an encapsulation on the integrated circuit die.

摘要翻译： 一种集成电路封装系统的制造方法，包括：形成具有接触突起的隔离触点，所述接触突起具有下突出表面，上突出表面和突出侧壁; 形成与所述隔离接触件相邻的管芯焊盘，具有管芯焊盘突出部，所述焊盘突起部具有下模具突出表面，上模具突出表面和模具突出侧壁; 将接触垫沉积在接触突起上; 将管芯焊盘沉积在管芯焊盘突起上; 将集成电路管芯耦合到所述接触突起; 以及在所述集成电路管芯上模制封装。