公开(公告)号：US20080191310A1

公开(公告)日：2008-08-14

申请号：US11705614

申请日：2007-02-12

申请人： Weng-Jin Wu ,  Wen-Chih Chiou ,  Chen-Hua Yu

发明人： Weng-Jin Wu ,  Wen-Chih Chiou ,  Chen-Hua Yu

IPC分类号： H01L29/00 ,  H01L21/762

CPC分类号： H01L21/8221 ,  H01L21/2007 ,  H01L27/0688

摘要： A three-dimensional (3D) integrated circuit structure includes a first wafer and a second wafer, each comprising a substrate having devices formed thereon and an interconnect structure over the substrate; a composite layer comprising a first dielectric layer bonded to a second dielectric layer, wherein the composite layer is bonded to the first and the second wafers; a first plurality of openings extending from an interface of the first and the second dielectric layers into the first dielectric layer, wherein each opening of the first plurality of openings is in scribe lines of the first wafer; and vias connecting devices in the first and the second wafers.

摘要翻译： 三维（3D）集成电路结构包括第一晶片和第二晶片，每个晶片包括其上形成有器件的衬底和在衬底上的互连结构; 复合层，其包括结合到第二介电层的第一介电层，其中所述复合层结合到所述第一和第二晶片; 第一多个开口，从第一和第二介电层的界面延伸到第一介电层中，其中第一多个开口的每个开口处于第一晶片的划线中; 以及连接第一和第二晶片中的器件的通孔。

公开(公告)号：US20080083959A1

公开(公告)日：2008-04-10

申请号：US11539481

申请日：2006-10-06

申请人： Weng-Jin Wu ,  Wen-Chih Chiou ,  Chen-Hua Yu

发明人： Weng-Jin Wu ,  Wen-Chih Chiou ,  Chen-Hua Yu

IPC分类号： H01L29/84

CPC分类号： H01L21/78 ,  H01L23/585 ,  H01L25/0657 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2924/0002 ,  H01L2924/00

摘要： A stacked structure includes a first die bonded over a second die. The first die has a first die area defined over a first surface. At least one first protective structure is formed over the first surface, around the first die area. At least one side of the first protective structure has at least one first extrusion part extending across a first scribe line around the protective structure. The second die has a second die area defined over a second surface. At least one second protective structure is formed over the second surface, around the second die area. At least one side of the second protective structure has at least one second extrusion part extending across a second scribe line around the protective structure, wherein the first extrusion part is connected with the second extrusion part.

摘要翻译： 层叠结构包括在第二管芯上结合的第一管芯。 第一管芯具有限定在第一表面上的第一管芯区域。 在第一表面，围绕第一模具区域形成至少一个第一保护结构。 第一保护结构的至少一侧具有至少一个在保护结构周围延伸穿过第一划线的第一挤压部分。 第二模具具有限定在第二表面上的第二模具区域。 在第二表面上围绕第二管芯区域形成至少一个第二保护结构。 第二保护结构的至少一侧具有至少一个在保护结构周围延伸穿过第二划线的第二挤压部分，其中第一挤压部分与第二挤压部分连接。

公开(公告)号：US08704375B2

公开(公告)日：2014-04-22

申请号：US12613417

申请日：2009-11-05

申请人： Max Liu ,  Chao-Shun Hsu ,  Ya-Wen Tseng ,  Wen-Chih Chiou ,  Weng-Jin Wu

发明人： Max Liu ,  Chao-Shun Hsu ,  Ya-Wen Tseng ,  Wen-Chih Chiou ,  Weng-Jin Wu

IPC分类号： H01L23/48 ,  H01L29/417 ,  H01L23/498 ,  H01L21/768

CPC分类号： H01L29/4175 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49822 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/32 ,  H01L2223/6622 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/0557 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043

摘要： Through substrate via barrier structures and methods are disclosed. In one embodiment, a semiconductor device includes a first substrate including an active device region disposed within isolation regions. A through substrate via is disposed adjacent to the active device region and within the first substrate. A buffer layer is disposed around at least a portion of the through substrate via, wherein the buffer layer is disposed between the isolation regions and the through substrate via.

摘要翻译： 公开了通过基板通过阻挡结构和方法。 在一个实施例中，半导体器件包括包括设置在隔离区域内的有源器件区域的第一衬底。 贯穿衬底通孔邻近有源器件区域并在第一衬底内设置。 缓冲层设置在穿过基底通孔的至少一部分周围，其中缓冲层设置在隔离区域和穿通基底通孔之间。

公开(公告)号：US08252665B2

公开(公告)日：2012-08-28

申请号：US12769725

申请日：2010-04-29

申请人： Wen-Chih Chiou ,  Weng-Jin Wu ,  Shau-Lin Shue

发明人： Wen-Chih Chiou ,  Weng-Jin Wu ,  Shau-Lin Shue

IPC分类号： H01L21/30 ,  H01L21/46

CPC分类号： H01L23/49811 ,  H01L21/561 ,  H01L21/6836 ,  H01L21/76898 ,  H01L24/81 ,  H01L24/94 ,  H01L25/50 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/81001 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00

摘要： A wafer is attached to a carrier by using an adhesive layer, and a portion of the adhesive layer is exposed adjacent to an edge of the wafer. After thinning the wafer, a protection layer is provided to cover the exposed portion of the adhesive layer. A plurality of dies is bonded onto the thinned wafer, and then the thinned wafer and the dies are encapsulated with a molding compound.

摘要翻译： 通过使用粘合剂层将晶片附接到载体，并且粘合剂层的一部分暴露于晶片的边缘附近。 在使晶片变薄之后，提供保护层以覆盖粘合剂层的暴露部分。 将多个模具结合到薄的晶片上，然后用模塑料封装薄化的晶片和模具。

公开(公告)号：US20100193954A1

公开(公告)日：2010-08-05

申请号：US12613417

申请日：2009-11-05

申请人： Max Liu ,  Chao-Shun Hsu ,  Ya-Wen Tseng ,  Wen-Chih Chiou ,  Weng-Jin Wu

发明人： Max Liu ,  Chao-Shun Hsu ,  Ya-Wen Tseng ,  Wen-Chih Chiou ,  Weng-Jin Wu

IPC分类号： H01L23/48 ,  H01L21/768 ,  H01L21/762

CPC分类号： H01L29/4175 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49822 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/32 ,  H01L2223/6622 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/0557 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043

摘要： Through substrate via barrier structures and methods are disclosed. In one embodiment, a semiconductor device includes a first substrate including an active device region disposed within isolation regions. A through substrate via is disposed adjacent to the active device region and within the first substrate. A buffer layer is disposed around at least a portion of the through substrate via, wherein the buffer layer is disposed between the isolation regions and the through substrate via.

摘要翻译： 公开了通过基板通过阻挡结构和方法。 在一个实施例中，半导体器件包括包括设置在隔离区域内的有源器件区域的第一衬底。 贯穿衬底通孔邻近有源器件区域并在第一衬底内设置。 缓冲层设置在穿过基底通孔的至少一部分周围，其中缓冲层设置在隔离区域和穿通基底通孔之间。

公开(公告)号：US20070296073A1

公开(公告)日：2007-12-27

申请号：US11426734

申请日：2006-06-27

申请人： Weng-Jin Wu ,  Wen-Chih Chiou

发明人： Weng-Jin Wu ,  Wen-Chih Chiou

IPC分类号： H01L23/02 ,  H01L21/00

CPC分类号： H01L21/6835 ,  H01L21/8221 ,  H01L23/481 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0688 ,  H01L2221/6835 ,  H01L2221/68363 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/81894 ,  H01L2224/83894 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15747 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2224/83

摘要： A three dimensional integrated circuit structure includes at least first and second devices, each device comprising a substrate and a device layer formed over the substrate, the first and second devices being bonded together in a stack, wherein the bond between the first and second devices comprises a metal-to-metal bond and a non-metal-to-non-metal bond.

摘要翻译： 三维集成电路结构包括至少第一和第二器件，每个器件包括衬底和形成在衬底上的器件层，第一和第二器件以堆叠结合在一起，其中第一和第二器件之间的结合包括 金属对金属键和非金属对非金属键。

公开(公告)号：US09153462B2

公开(公告)日：2015-10-06

申请号：US12964097

申请日：2010-12-09

申请人： Yu-Liang Lin ,  Weng-Jin Wu ,  Jing-Cheng Lin ,  Wen-Chih Chiou

发明人： Yu-Liang Lin ,  Weng-Jin Wu ,  Jing-Cheng Lin ,  Wen-Chih Chiou

IPC分类号： H01L21/687 ,  H01L21/67

CPC分类号： H01L21/67051 ,  H01L21/68728

摘要： A device and system for thin wafer cleaning is disclosed. A preferred embodiment comprises a spin chuck having at least three holding clamps. A thin wafer with a wafer frame is mounted on the spin chuck through a tape layer. When the holding clamps are unlocked, there is no interference with the removal and placement of the wafer frame. On the other hand, when the holding clamps are locked, the holding clamps are brought into contact with the outer edge of the wafer frame so as to prevent the wafer frame from moving laterally. Furthermore, the shape of the holding clamps in a locked position is capable of preventing the wafer frame from moving vertically.

摘要翻译： 公开了用于薄晶片清洁的装置和系统。 优选实施例包括具有至少三个保持夹具的旋转卡盘。 具有晶片框架的薄晶片通过带层安装在旋转卡盘上。 当保持夹具解锁时，不会干扰晶片框架的移除和放置。 另一方面，当保持夹具被锁定时，保持夹具与晶片框架的外边缘接触，以防止晶片框架横向移动。 此外，保持夹具处于锁定位置的形状能够防止晶片框架垂直移动。

公开(公告)号：US08432038B2

公开(公告)日：2013-04-30

申请号：US12783973

申请日：2010-05-20

申请人： Weng-Jin Wu ,  Yung-Chi Lin ,  Wen-Chih Chiou

发明人： Weng-Jin Wu ,  Yung-Chi Lin ,  Wen-Chih Chiou

IPC分类号： H01L23/48

CPC分类号： H01L21/76843 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/525 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01025 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A through-silicon via (TSV) structure and process for forming the same are disclosed. A semiconductor substrate has a front surface and a back surface, and a TSV structure is formed to extend through the semiconductor substrate. The TSV structure includes a metal layer, a metal seed layer surrounding the metal layer, a barrier layer surrounding the metal seed layer, and a metal silicide layer formed in a portion sandwiched between the metal layer and the metal seed layer.

摘要翻译： 公开了一种贯穿硅通孔（TSV）结构及其形成方法。 半导体衬底具有前表面和后表面，并且形成TSV结构以延伸穿过半导体衬底。 TSV结构包括金属层，围绕金属层的金属籽晶层，围绕金属籽晶层的阻挡层和形成在夹在金属层和金属籽晶层之间的部分中的金属硅化物层。

公开(公告)号：US20100164109A1

公开(公告)日：2010-07-01

申请号：US12345239

申请日：2008-12-29

申请人： Wen-Chih Chiou ,  Weng-Jin Wu

发明人： Wen-Chih Chiou ,  Weng-Jin Wu

IPC分类号： H01L23/538

CPC分类号： H01L24/05 ,  H01L21/6835 ,  H01L23/481 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L2221/6834 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05599 ,  H01L2224/13025 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/13644 ,  H01L2224/81001 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2224/13099 ,  H01L2224/05552

摘要： An integrated circuit structure includes a semiconductor substrate having a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate. The TSV has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is over the backside of the semiconductor substrate and connected to the back end of the TSV. A silicide layer is over and contacting the RDL.

摘要翻译： 集成电路结构包括具有正面和背面的半导体衬底。 穿透硅通孔（TSV）穿透半导体衬底。 TSV具有延伸到半导体衬底背面的后端。 再分配线（RDL）位于半导体衬底的背面，并连接到TSV的后端。 硅化物层已经结束并与RDL接触。

公开(公告)号：US08647925B2

公开(公告)日：2014-02-11

申请号：US12792975

申请日：2010-06-03

申请人： Wen-Chih Chiou ,  Shau-Lin Shue ,  Weng-Jin Wu ,  Ju-Pin Hung

发明人： Wen-Chih Chiou ,  Shau-Lin Shue ,  Weng-Jin Wu ,  Ju-Pin Hung

IPC分类号： H01L21/00

CPC分类号： H01L21/76898 ,  H01L21/6836 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L24/94 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/14181 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/00

摘要： A wafer is provided with a through via extending a portion of a substrate, an interconnect structure electrically connecting the through via, and a polyimide layer formed on the interconnect structure. Surface modification of the polyimide layer is the formation of a thin dielectric film on the polyimide layer by coating, plasma treatment, chemical treatment, or deposition methods. The thin dielectric film is adhered strongly to the polyimide layer, which can reduce the adhesion between the wafer surface and an adhesive layer formed in subsequent carrier attaching process.

摘要翻译： 晶片设置有延伸基板的一部分的通孔，连接通孔的互连结构和形成在互连结构上的聚酰亚胺层。 聚酰亚胺层的表面改性是通过涂覆，等离子体处理，化学处理或沉积方法在聚酰亚胺层上形成薄的电介质膜。 薄的电介质膜牢固地粘附到聚酰亚胺层，这可以降低晶片表面和随后的载体附接过程中形成的粘合剂层之间的粘合性。