公开(公告)号：US07221257B1

公开(公告)日：2007-05-22

申请号：US09524804

申请日：2000-03-14

申请人： Mark E. Tuttle

发明人： Mark E. Tuttle

IPC分类号： H04Q5/22

CPC分类号： G06K19/06046 ,  G06K19/077

摘要： Cards communication devices, and methods of forming the same and encoding visibly perceptible information on communication devices are provided. A remote intelligent communication device includes: a card-thin housing including: an upper surface; a lower surface; and at least one side extending between the upper surface and the lower surface forming the card-thin housing, the side having visibly perceptible information thereon; and communication circuitry within the housing configured to at least one of communicate and receive electronic signals. A method of forming a card includes: providing a substrate having: an upper surface; a lower surface, and the upper and lower surfaces individually having a length and a width; and a plurality of sides individually having a thickness less than the lengths and the widths of the surfaces; and encoding visibly perceptible information on at least one of the sides.

摘要翻译： 提供了卡通信设备及其形成方法以及在通信设备上编码可察觉的可见信息。 远程智能通信设备包括：卡片薄壳体，包括：上表面; 下表面 以及在上表面和下表面之间延伸形成卡片薄壳体的至少一个侧面，其上具有可见的可见信息; 以及壳体内的通信电路，被配置为通信和接收电子信号中的至少一个。 一种形成卡的方法包括：提供具有：上表面的基板; 下表面，上表面和下表面各自具有长度和宽度; 以及单独地具有小于所述表面的长度和宽度的厚度的多个侧面; 并在至少一个侧面上编码可见的可见信息。

公开(公告)号：US07012504B2

公开(公告)日：2006-03-14

申请号：US10759976

申请日：2004-01-15

申请人： Mark E. Tuttle

发明人： Mark E. Tuttle

IPC分类号： H04Q1/00

CPC分类号： G06K19/0716 ,  G06K19/0723 ,  G06K19/07345 ,  G06K19/07749 ,  H01H2231/05 ,  H01Q7/00 ,  H01Q9/16 ,  H01Q21/28 ,  Y10T29/49004 ,  Y10T29/49016 ,  Y10T29/49018 ,  Y10T29/49117

摘要： A wireless identification device including a housing; circuitry in the housing configured to provide a signal to identify the device in response to an interrogation signal; and a selectively actuated switch supported by the housing and controlling whether the circuitry identifies the device. A method of manufacturing a wireless identification device, the method comprising configuring circuitry to provide a signal to identify the device in response to an interrogation signal; coupling the circuitry to a push-on/push-off switch supported by the housing and controlling whether the circuitry provides the signal to identify the device; and encasing the circuitry in a housing such that the switch is actable from outside the housing by touching a portion of the housing.

摘要翻译： 一种无线识别装置，包括壳体; 外壳中的电路被配置为响应于询问信号提供信号以识别设备; 以及由壳体支撑的选择性致动的开关，并且控制电路是否识别该装置。 一种制造无线识别装置的方法，所述方法包括配置电路以响应于询问信号提供信号以识别所述装置; 将电路耦合到由壳体支持的推/推开关开关，并控制电路是否提供信号以识别装置; 并且将电路封装在壳体中，使得开关可以通过触摸壳体的一部分从壳体的外部起作用。

公开(公告)号：US06806527B2

公开(公告)日：2004-10-19

申请号：US10315053

申请日：2002-12-10

申请人： Mark E. Tuttle

发明人： Mark E. Tuttle

IPC分类号： H01L27108

CPC分类号： G11C11/16 ,  H01L27/222 ,  H01L43/12

摘要： A method of forming self-aligned recessed MRAM structures is disclosed. Recessed pinned and sense magnetic layers of an MRAM stack are formed in recessed digit lines formed in an insulating layer.

摘要翻译： 公开了一种形成自对准凹陷MRAM结构的方法。 在绝缘层中形成的凹陷数字线形成MRAM堆叠的嵌入式和感测磁性层。

公开(公告)号：US06797628B2

公开(公告)日：2004-09-28

申请号：US10051678

申请日：2002-01-16

申请人： Li Li ,  Max F. Hineman ,  Mark E. Tuttle

发明人： Li Li ,  Max F. Hineman ,  Mark E. Tuttle

IPC分类号： H01L21302

CPC分类号： H01L21/76802 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/76829 ,  H01L43/12

摘要： A method of forming integrated circuitry includes chemical vapor depositing a silicon carbide comprising layer over a substrate at a temperature of no greater than 500° C. Plasma etching is conducted through at least a portion of the silicon carbide comprising layer using a gas chemistry comprising oxygen and hydrogen. Semiconductor processing methods include the above in fabrication of contact openings and in fabrication of MRAM circuitry. Semiconductor processing methods also include fabrication of contact openings using resist and removing silicon carbide comprising material and resist in a common plasma etching step.

摘要翻译： 一种形成集成电路的方法包括在不超过500℃的温度下将基于碳化硅的层化学气相沉积在衬底上。等离子体蚀刻通过使用包含氧气的气体化学物质的至少一部分碳化硅包含层进行 和氢气。 半导体处理方法包括以上制造接触开口和制造MRAM电路。 半导体处理方法还包括使用抗蚀剂制造接触开口，并在公共等离子体蚀刻步骤中除去包含材料和抗蚀剂的碳化硅。

公开(公告)号：US06417561B1

公开(公告)日：2002-07-09

申请号：US09916884

申请日：2001-07-27

申请人： Mark E. Tuttle

发明人： Mark E. Tuttle

IPC分类号： H01L23552

CPC分类号： H01L27/222 ,  B82Y10/00 ,  H01L43/12

摘要： A magnetic memory device, preferably a magnetic random access memory (MRAM) and method for forming same are described wherein a bit region sensitive to magnetic fields and preferably comprising a tunneling magnetoresistance (TMR) structure is located between a top electrode with a magnetic keeper and a bottom electrode with a magnetic keeper. The top electrode is preferably made of copper using a damascene process. The magnetic keeper of the top electrode includes at least a magnetic material layer (e.g., Co—Fe) but in the illustrated embodiments also includes one or more barrier layer (e.g., Ta). Various embodiments describe structures wherein the magnetic keeper stack is in contact with one, two or three surfaces of the top electrode, which face outward from the device.

摘要翻译： 描述了一种磁存储器件，优选磁性随机存取存储器（MRAM）及其形成方法，其中对磁场敏感并且优选地包括隧道磁阻（TMR）结构的位区位于具有磁力保持器的顶部电极之间， 具有磁力保持器的底部电极。 顶部电极优选使用镶嵌工艺由铜制成。 顶部电极的磁力保持器至少包括磁性材料层（例如Co-Fe），但是在所示实施例中还包括一个或多个阻挡层（例如Ta）。 各种实施例描述了其中磁力保持器堆叠与顶部电极的一个，两个或三个表面接触的结构，其面向设备的外部。

公开(公告)号：US06413788B1

公开(公告)日：2002-07-02

申请号：US09796326

申请日：2001-02-28

申请人： Mark E. Tuttle

发明人： Mark E. Tuttle

IPC分类号： H01L2100

CPC分类号： H01L27/222 ,  B82Y10/00 ,  H01L43/12

摘要： A magnetic memory device, preferably a magnetic random access memory (MRAM) and method for forming same are described wherein a bit region sensitive to magnetic fields and preferably comprising a tunneling magnetoresistance (TMR) structure is located between a top electrode with a magnetic keeper and a bottom electrode with a magnetic keeper. The top electrode is preferably made of copper using a damascene process. The magnetic keeper of the top electrode includes at least a magnetic laterial layer (e.g., Co—Fe) but in the illustrated embodiments also includes one or more barrier layer (e.g., Ta). Various embodiments describe structures wherein the magnetic keeper stack is in contact with one, two or three surfaces of the top electrode, which face outward from the device.

摘要翻译： 描述了一种磁存储器件，优选磁性随机存取存储器（MRAM）及其形成方法，其中对磁场敏感并且优选地包括隧道磁阻（TMR）结构的位区位于具有磁力保持器的顶部电极之间， 具有磁力保持器的底部电极。 顶部电极优选使用镶嵌工艺由铜制成。 顶部电极的磁力保持器至少包括磁性材料层（例如Co-Fe），但是在所示实施例中还包括一个或多个阻挡层（例如Ta）。 各种实施例描述了其中磁力保持器堆叠与顶部电极的一个，两个或三个表面接触的结构，其面向设备的外部。

公开(公告)号：US06329213B1

公开(公告)日：2001-12-11

申请号：US08847123

申请日：1997-05-01

申请人： Mark E. Tuttle ,  Rickie C. Lake

发明人： Mark E. Tuttle ,  Rickie C. Lake

IPC分类号： H01L2100

CPC分类号： G06K19/0775 ,  G06K19/07749 ,  H01L2224/16225 ,  H01L2924/01078 ,  H01L2924/15153 ,  H01L2924/15165 ,  Y10T29/49155

摘要： The invention includes methods for forming integrated circuits within substrates, and embedded circuits. In one aspect, the invention includes a method of forming an integrated circuit within a substrate comprising: a) providing a recess in a substrate; b) printing an antenna within the recess; and c) providing an integrated circuit chip and a battery in electrical connection with the antenna. In another aspect, the invention includes a method of forming an integrated circuit within a substrate comprising: a) providing a substrate having a first recess and a second recess formed therein; b) printing a conductive film between the first and second recesses and within the first and second recesses, the conductive film forming electrical interconnects between and within the first and second recesses; c) providing a first electrical component within the first recess and in electrical connection with the electrical interconnects therein; d) providing a second electrical component within the second recess and in electrical connection with the electrical interconnects therein; and e) covering the first electrical component, the second electrical component and the conductive film with at least one protective cover. In another aspect, the invention includes an embedded circuit comprising: a) a substrate having a recess therein, the recess having a bottom surface and a sidewall surface joined to the bottom surface; b) interconnect circuitry formed on the bottom and sidewall surfaces; and c) an integrated circuit chip within the recess and operatively connected to the interconnect circuitry.

摘要翻译： 本发明包括在衬底内形成集成电路的方法和嵌入式电路。 一方面，本发明包括一种在衬底内形成集成电路的方法，包括：a）在衬底中设置凹陷; b）在凹槽内打印天线; 以及c）提供与天线电连接的集成电路芯片和电池。 在另一方面，本发明包括在衬底内形成集成电路的方法，包括：a）提供具有形成在其中的第一凹部和第二凹部的衬底; b）在第一和第二凹部之间以及在第一和第二凹槽内印刷导电膜，导电膜在第一和第二凹槽内部和内部形成电互连; c）在所述第一凹槽内提供第一电气部件并与其中的电互连电连接; d）在所述第二凹槽内提供第二电气部件并与其中的电互连电连接; 以及e）用至少一个保护盖覆盖所述第一电气部件，所述第二电气部件和所述导电膜。 在另一方面，本发明包括一种嵌入式电路，其包括：a）在其中具有凹部的衬底，所述凹部具有连接到所述底表面的底表面和侧壁表面; b）形成在底部和侧壁表面上的互连电路; 以及c）所述凹槽内的集成电路芯片并且可操作地连接到所述互连电路。

公开(公告)号：US06281799B1

公开(公告)日：2001-08-28

申请号：US09373892

申请日：1999-08-12

申请人： Rickie C. Lake ,  Mark E. Tuttle

发明人： Rickie C. Lake ,  Mark E. Tuttle

IPC分类号： G08B2300

CPC分类号： A01M1/2011 ,  A01M1/026 ,  A01M2200/011

摘要： In one aspect, the invention encompasses a device for sensing a change in an environment proximate the device. The device includes a planar circuit of conductive material extending along a first plane and comprising at least two sub-circuits which are in parallel electrical configuration relative to one another. The conductive material comprises two ends. The sub-circuits are configured to be broken upon the change in the environment. The device further includes a pair of prongs. A first of the pair of prongs extends from one of the two ends of the conductive material, and a second of the pair of prongs extends from an other of the two ends of the conductive material. The first and second prongs extend along the first plane. Additionally, the device includes a circuit support having circuitry supported thereby and a pair of orifices extending therethrough. The prongs extend through the orifices to electrically connect the circuitry supported by the circuit support to the planar circuit of conductive material. In another aspect, the invention includes a method for sensing termites.

摘要翻译： 在一个方面，本发明包括用于感测靠近设备的环境变化的设备。 该装置包括沿着第一平面延伸的导电材料的平面电路，并且包括相对于彼此并联电构造的至少两个子电路。 导电材料包括两端。 子电路被配置为在环境变化时被破坏。 该装置还包括一对插脚。 一对插脚中的第一个从导电材料的两端之一延伸，并且一对插脚中的第二个从导电材料的两个端部中的另一个延伸。 第一和第二分支沿第一平面延伸。 此外，该装置包括具有由其支撑的电路的电路支架和一对延伸穿过其中的孔。 插脚延伸穿过孔，以将由电路支撑件支撑的电路电连接到导电材料的平面电路。 另一方面，本发明包括用于感测白蚁的方法。

公开(公告)号：US06271597B1

公开(公告)日：2001-08-07

申请号：US09429884

申请日：1999-10-29

申请人： Curtis M. Medlen ,  Mark E. Tuttle

发明人： Curtis M. Medlen ,  Mark E. Tuttle

IPC分类号： H01L2348

CPC分类号： H01L24/12 ,  B23K20/02 ,  B23K20/16 ,  B23K2101/38 ,  B23K2101/42 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/13099 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/01005 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/30105 ,  H05K3/321 ,  H05K2201/0382 ,  H05K2201/10674 ,  H05K2201/10984 ,  H05K2201/10992 ,  H01L2924/00

摘要： Methods of forming electrically conductive interconnections and electrically interconnected substrates are described. In one implementation, a first substrate having an outer surface is provided and a layer of material is formed thereover. Openings are formed within the layer of material and conductive masses are formed within the openings. A second substrate having conductive interconnect surfaces is provided. The conductive interconnect surfaces are then contacted with the conductive masses and deformed thereby. In one aspect, the interconnect surfaces are deformed in part by portions of the layer of material proximate the conductive masses. In another aspect, the layer of material is removed and the interconnect surfaces are deformed by the conductive masses themselves.

摘要翻译： 描述形成导电互连和电互连基板的方法。 在一个实施方式中，提供具有外表面的第一基板，并且在其上形成一层材料。 开口形成在材料层内，导电块形成在开口内。 提供具有导电互连表面的第二基板。 然后导电互连表面与导电块接触并由此变形。 在一个方面，互连表面部分地靠近导电块的材料层的一部分变形。 另一方面，材料层被去除并且互连表面被导电块自身变形。

公开(公告)号：US06240625B1

公开(公告)日：2001-06-05

申请号：US09429736

申请日：1999-10-27

申请人： Mark E. Tuttle

发明人： Mark E. Tuttle

IPC分类号： H01M642

CPC分类号： H01M2/1066 ,  H01M2/1044 ,  H01M2/204 ,  H01M6/42 ,  H02J7/0024 ,  H04B1/3883 ,  H05K3/321 ,  H05K2201/10037 ,  H05K2201/10515 ,  H05K2201/10643 ,  Y10T29/49108 ,  Y10T29/49114

摘要： Thin-profile battery circuits and constructions, and in particular button-type battery circuits and constructions and methods of forming the same are described. In one implementation, a substrate is provided having an outer surface with a pair of spaced electrical contact pads thereon. At least two thin-profile batteries are conductively bonded together in a stack having a lowermost battery and an uppermost battery. The batteries include respective positive and negative terminals. The lowermost battery has one of its positive or negative terminals adhesively bonded to one of the pair of electrical contact pads while the uppermost battery has one of its positive or negative terminals electrically connected to the other of the pair of electrical contact pads. The batteries can be provided into parallel or series electrical connections.

摘要翻译： 描述了薄型电池电路和结构，特别是按钮式电池电路及其构成及其形成方法。 在一个实施方案中，提供了具有外表面的衬底，其上具有一对间隔的电接触焊盘。 至少两个薄型电池在具有最低电池和最上面的电池的堆叠中导电地结合在一起。 电池包括相应的正极和负极。 最下面的电池具有一个正极或负极端子，其粘合地粘合到一对电接触焊盘中的一个，而最上面的电池具有与该对电接触焊盘中的另一个电连接的正或负端子中的一个。 电池可以并联或串联电连接。