公开(公告)号：US08243462B2

公开(公告)日：2012-08-14

申请号：US12801834

申请日：2010-06-28

Applicant: Koujirou Shibuya

Inventor： Koujirou Shibuya

IPC: H05K7/00 ,  H01L23/48

CPC classification number: H05K1/0271 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2224/16225 ,  H05K1/113 ,  H05K1/114 ,  H05K2201/09227 ,  H05K2201/10719 ,  H05K2201/10734 ,  Y10T29/49155

Abstract: A printed wiring board includes a plurality of lands arranged in a mounting area allowing therein mounting of an electronic component; and an wiring respectively connected to a specific land which is at least one of the outermost lands arranged outermostly out of all lands, wherein a connection portion of the specific land and the wiring connected to the specific land is positioned inside a closed curve which collectively surrounds, by the shortest path, all of the outermost lands formed in the mounting area.

Abstract translation: 印刷电路板包括布置在允许其中安装电子部件的安装区域中的多个焊盘; 以及分别连接到特定焊盘的布线，其是最外侧设置在所有焊盘之外的最外侧焊盘中的至少一个，其中特定焊盘的连接部分和连接到特定焊盘的布线位于封闭曲线内部，该封闭曲线共同围绕 通过最短路径，形成在安装区域中的所有最外面的焊盘。

公开(公告)号：US08216001B2

公开(公告)日：2012-07-10

申请号：US12938965

申请日：2010-11-03

Applicant: Brian Peter Kirk

Inventor： Brian Peter Kirk

IPC: H01R24/00

CPC classification number: H05K1/0228 ,  H01R13/6469 ,  H01R13/6587 ,  H05K1/0245 ,  H05K2201/044 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/09263 ,  H05K2201/10189 ,  Y10T29/49117

Abstract: A connector for connecting a first printed circuit board with a second printed circuit board that comprises a first column of differential signal pair launches offset from a second column of differential signal pair launches on the first printed circuit board so that each differential signal pair in the first column is closest to a launch of a first polarity in a corresponding differential signal pair in the second column on the first circuit board, a first column of differential signal pair launches offset from a second column of differential signal pair launches on the second printed circuit board so that each differential signal pair in the first column is closest to a launch of a second polarity, opposite the first polarity, in a corresponding signal pair in the second column on the second circuit board, and a connector electrically connecting the first column of differential signal pair launches on the first printed circuit board to the first column of differential signal pair launches on the second printed circuit board and electrically connecting the second column of differential signal pair launches on the first printed circuit board to the second column of differential signal pair launches on the second printed circuit board.

Abstract translation: 一种用于将第一印刷电路板与第二印刷电路板连接的连接器，该第二印刷电路板包括第一列差分信号对，从第二列差分信号对发射偏移，在第一印刷电路板上启动，使得第一列中的每个差分信号对在第一 列最靠近第一电路板上的第二列中对应的差分信号对中的第一极性的发射，第一列差分信号对从第二印刷电路板上的差分信号对的第二列发射偏移 使得第一列中的每个差分信号对在第二电路板上的第二列中的相应信号对中最接近与第一极性相反的第二极性的发射，以及电连接第一列差分 信号对在第一印刷电路板上发射到差分信号对lau的第一列 在所述第二印刷电路板上进行钳位，并将所述第一印刷电路板上的第二列差分信号对发射电连接到所述第二印刷电路板上的所述差分信号对的第二列。

公开(公告)号：US08183466B2

公开(公告)日：2012-05-22

申请号：US12604529

申请日：2009-10-23

Applicant: Danny L. C. Morlion ,  Stefaan Sercu ,  Winnie Heyvaert ,  Jan DeGeest

Inventor： Danny L. C. Morlion ,  Stefaan Sercu ,  Winnie Heyvaert ,  Jan DeGeest

IPC: H05K1/11

CPC classification number: H05K1/114 ,  H05K1/0219 ,  H05K1/0237 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/10189 ,  H05K2201/10734

Abstract: Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component. The via arrangement may be also be altered to limit cross-talk among neighboring signal conductors. Thus, the via arrangement may be defined to balance the impedance, cross-talk, and routing density requirements of the system.

Abstract translation: 公开了用于在诸如印刷电路板的基板上定义匹配阻抗覆盖区的方法，例如适于接收具有端子引线布置的电气部件。 这种覆盖区可以包括导电焊盘的布置和导电通孔的布置。 通孔布置可以不同于衬垫布置。 通孔可以被布置成增加布线密度，同时限制串扰并且提供组件和基板之间的匹配阻抗。 可以改变通孔布置以在板的层上实现期望的布线密度。 增加布线密度可能会减少电路板层数，这往往会降低电容，从而增加阻抗。 接地通路和信号通孔可以以影响阻抗的方式相对于彼此布置。 因此，可以改变通孔布置以实现与部件的阻抗匹配的阻抗。 也可以改变通孔装置以限制相邻信号导体之间的串扰。 因此，可以定义通孔布置以平衡系统的阻抗，串扰和布线密度要求。

公开(公告)号：US08178392B2

公开(公告)日：2012-05-15

申请号：US11750715

申请日：2007-05-18

Applicant: Haengcheol Choi ,  Ki Youn Jang ,  Taewoo Kang ,  Il Kwon Shim

Inventor： Haengcheol Choi ,  Ki Youn Jang ,  Taewoo Kang ,  Il Kwon Shim

IPC: H01L21/00 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/06 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05555 ,  H01L2224/0603 ,  H01L2224/06142 ,  H01L2224/1403 ,  H01L2224/81143 ,  H01L2224/81801 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/09227 ,  H05K2201/10674 ,  Y02P70/611 ,  Y10T29/4913

Abstract: An electronic system is provided including forming a substrate having a radiating patterned pad, mounting an electrical device having an external interconnect over the radiating patterned pad with the external interconnect offset from the radiating patterned pad, and aligning the external interconnect with the radiating patterned pad.

Abstract translation: 提供了一种电子系统，包括形成具有辐射图案化垫的衬底，将具有外部互连的电气装置安装在辐射图案化焊盘上，其中外部互连偏离辐射图案化衬垫，并将外部互连与辐射图案化衬垫对准。

公开(公告)号：US08110434B2

公开(公告)日：2012-02-07

申请号：US12693096

申请日：2010-01-25

Applicant: Takashi Okada ,  Kiyokazu Okada ,  Akinori Ono ,  Taku Nishiyama

Inventor： Takashi Okada ,  Kiyokazu Okada ,  Akinori Ono ,  Taku Nishiyama

IPC: H01L21/44 ,  H01L21/50 ,  H01L21/48 ,  H01L21/82

CPC classification number: H05K1/0256 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2924/181 ,  H05K1/117 ,  H05K3/0052 ,  H05K3/284 ,  H05K2201/0761 ,  H05K2201/09145 ,  H05K2201/09227 ,  H05K2203/0228 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A circuit board has a curved portion provided in at least one side of an external shape thereof. An external connecting terminal is provided on a first main surface of the circuit board. A semiconductor element is mounted on a second main surface of the circuit board. A first wiring network is provided in a region except the terminal region on the first main surface. A second wiring network is provided on the second main surface. Distance from the side including the curved portion to the first wiring network is larger than distance from at least one of the other sides to the first wiring networks, and distance from the side including the curved portion to the second wiring network is larger than distance from at least one of the other sides to the second wiring networks.

Abstract translation: 电路板具有设置在其外部形状的至少一侧的弯曲部分。 外部连接端子设置在电路板的第一主表面上。 半导体元件安装在电路板的第二主表面上。 第一布线网络设置在除了第一主表面上的端子区域之外的区域中。 第二配线网络设置在第二主表面上。 从包括弯曲部分到第一布线网络的一侧的距离大于从另一侧至第一布线网络中的至少一个的距离，并且从包括弯曲部分到第二布线网络的一侧的距离大于距离 至少一个对方到第二布线网络。

公开(公告)号：US20120024562A1

公开(公告)日：2012-02-02

申请号：US13019527

申请日：2011-02-02

Applicant: Andrew E. Kalman

Inventor： Andrew E. Kalman

IPC: H05K5/06

CPC classification number: H05K5/061 ,  H05K1/115 ,  H05K5/069 ,  H05K2201/09227

Abstract: A method for establishing a communication path between connectors on opposite sides of a PCB mounted to a vacuum chamber with an O-ring seal includes the steps (a) providing a plurality of vias through the PCB in the form of a connector pin pattern within the O-ring seal area to enable surface mounting of the type connector to the vacuum side of the PCB, (b) providing a plurality of vias through the PCB in the form of a pin pattern compatible to the pin pattern of step (a) outside of the O-ring seal area to enable plug in of the type connector to the pin pattern on the non-vacuum side of the PCB, and (c) on the non-vacuum side of the PCB, providing a conductive trace leading from each of the exposed vias of step (a) across the face of the PCB to each of the exposed vias of step (b).

Abstract translation: 用于在安装到具有O形密封圈密封件的真空室中的PCB的相对侧上的连接器之间建立连接器之间的连通路径的方法包括以下步骤：（a）以连接器针脚图案形式在PCB内提供多个通孔， O型圈密封区域，以便能够将类型连接器表面安装到PCB的真空侧，（b）以与外部的步骤（a）的针脚图案兼容的针脚形式提供穿过PCB的多个通孔 的O型圈密封区域，以便能够将类型连接器插入到PCB的非真空侧上的针脚图案，以及（c）在PCB的非真空侧，提供从每个 步骤（a）的暴露的通孔穿过PCB的表面到步骤（b）的每个暴露的通孔。

公开(公告)号：US20120006584A1

公开(公告)日：2012-01-12

申请号：US12673440

申请日：2008-07-17

Applicant: Takashi Matsui ,  Motoji Shiota

Inventor： Takashi Matsui ,  Motoji Shiota

IPC: H05K1/09 ,  H05K1/16 ,  H05K1/11

CPC classification number: H05K1/117 ,  G02F1/1345 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/01019 ,  H01L2924/14 ,  H05K1/111 ,  H05K3/4644 ,  H05K2201/09227 ,  H05K2201/094 ,  H05K2201/09436 ,  H05K2201/09672 ,  H05K2201/09709 ,  Y02P70/611

Abstract: A wiring board of the present invention (1) is arranged so that: pads (30) arranged in a plurality of rows include: first-row pads (30a) connected to first metal wires (10a) among metal wires (10); and second-row pads (30b) connected to second metal wires (10b) among the metal wires (10), the first metal wires (10a) being longer than the second metal wires (10b); and that each of the first connecting lines (10a) is formed so as to be separated from a corresponding one of the second-row pads (30b) by at least an insulating layer, and so as to extend not through a region between the corresponding second-row pad (30b) and a second-row pad (30b) adjacent to the corresponding second-row pad (30b), but through a region below the corresponding second-row pad (30b).

Abstract translation: 本发明的布线基板（1）的布置方式为：排列成多行的焊盘（30）包括：与金属线（10）之间的第一金属线（10a）连接的第一排焊盘（30a） 和连接到金属线（10）中的第二金属线（10b）的第二排焊盘（30b），第一金属线（10a）比第二金属线（10b）长; 并且所述第一连接线（10a）中的每一个形成为与至少一个绝缘层与所述第二排焊盘（30b）中的相应一个焊盘相隔离，并且不延伸通过所述第二焊盘 第二排衬垫（30b）和与相应的第二排衬垫（30b）相邻的第二排衬垫（30b），但是通过相应的第二排衬垫（30b）下方的区域。

公开(公告)号：US20110310547A1

公开(公告)日：2011-12-22

申请号：US13195638

申请日：2011-08-01

Applicant: Cheng Siew TAY ,  Wendy Chet Ming NGOH ,  Choi Keng CHAN

Inventor： Cheng Siew TAY ,  Wendy Chet Ming NGOH ,  Choi Keng CHAN

IPC: G06F1/16 ,  H05K13/04 ,  H05K7/02

CPC classification number: H05K1/111 ,  H05K2201/09227 ,  H05K2201/09281 ,  H05K2201/09481 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10T29/49144 ,  Y10T29/5313

Abstract: A printed circuit board includes a group of pads suitable to be soldered to a respective group of solder-balls of a device. Each pad of the group has a crack initiation point on its perimeter at a location where cracks in a solder-ball are anticipated to start after that solder-ball is soldered to that pad. For a pad of that group having a microvia located therein, a center of that microvia is located farther than a center of that pad from its crack initiation point. For a pad of that group having a trace merging along a portion of its perimeter, that portion does not include a vicinity of that crack initiation point.

Abstract translation: 印刷电路板包括适合于焊接到装置的相应组焊球的一组焊盘。 该组的每个焊盘在其焊接球被焊接到该焊盘之后预期在焊球上的裂纹开始的位置处具有在其周边上的裂纹起始点。 对于具有位于其中的微孔的该组的垫，该微孔的中心位于比该垫的中心从其裂纹起始点更远的位置。 对于具有沿着其周边的一部分的轨迹合并的该组的焊盘，该部分不包括该裂纹起始点的附近。

公开(公告)号：US20110298484A1

公开(公告)日：2011-12-08

申请号：US13138421

申请日：2009-11-19

Applicant: Nobuyuki Kawase ,  Isao Ogasawara ,  Kazuhide Ikuta

Inventor： Nobuyuki Kawase ,  Isao Ogasawara ,  Kazuhide Ikuta

IPC: G01R31/3187

CPC classification number: G01R31/026 ,  H05K1/0268 ,  H05K1/18 ,  H05K2201/09227

Abstract: An electronic circuit of at least one embodiment of the present invention includes: a plurality of electronic parts, of the plurality of electronic parts, at least one electronic part being at least one main part and the other electronic parts being auxiliary parts, the at least one main part being necessary for determination of whether or not the electronic circuit operates normally, the auxiliary parts being unnecessary for determination of whether or not the electronic circuit operates normally, the auxiliary parts being connected to a line which is connected to the at least one main part so as to supply a signal necessary for operation of the at least one main part or output a signal obtained by the operation of the at least one main part. This provides an electronic circuit which is capable of properly detecting a circuit wiring disconnection and easily detecting faulty wiring between elements without the need of providing the electronic circuit with more components for detecting a circuit wiring disconnection.

Abstract translation: 本发明的至少一个实施例的电子电路包括：多个电子部件中的多个电子部件，至少一个电子部件是至少一个主要部件，而另一个电子部件是辅助部件，至少 确定电子电路是否正常工作所需的一个主要部分，辅助部件不需要用于确定电子电路是否正常工作，辅助部件连接到连接到至少一个电路的线路 主要部分，以提供对至少一个主要部分的操作所必需的信号，或者输出通过至少一个主要部分的操作而获得的信号。 这提供了一种电子电路，其能够适当地检测电路布线断开并且容易地检测元件之间的有缺陷的布线，而不需要为电子电路提供用于检测电路布线断开的更多部件。

公开(公告)号：US20110204912A1

公开(公告)日：2011-08-25

申请号：US13010234

申请日：2011-01-20

Applicant: Bryan J. Root ,  William A. Funk

Inventor： Bryan J. Root ,  William A. Funk

IPC: G01R31/20 ,  H05K3/36

CPC classification number: G01R31/2889 ,  G01R1/07378 ,  G01R3/00 ,  G01R31/2886 ,  H05K1/117 ,  H05K3/325 ,  H05K2201/09027 ,  H05K2201/09063 ,  H05K2201/09227 ,  H05K2203/167 ,  Y10T29/49126 ,  Y10T29/49128

Abstract: A probe core includes a frame, a wire guide connected to the frame, a probe tile, and a plurality of probe wires supported by the wire guide and probe tile. Each probe wire includes an end configured to probe a device, such as a semiconductor wafer. Each probe wire includes a signal transmitting portion and a guard portion. The probe core further includes a lock mechanism supported by the frame. The lock mechanism is configured to allow the probe core to be connected and disconnected to another test equipment or component, such as a circuit board. As one example, the probe core is configured to connect and disconnect from the test equipment or component in a rotatable lock and unlock operation or twist lock/unlock operation, where the frame is rotated relative to remainder of the core to lock/unlock the probe core.

Abstract translation: 探针芯包括框架，连接到框架的导线引导件，探针瓦片和由导线器和探针瓦片支撑的多个探针线。 每个探针线包括构造成探测诸如半导体晶片的器件的端部。 每个探针线包括信号传输部分和防护部分。 探针芯还包括由框架支撑的锁定机构。 锁定机构被配置为允许探针芯与诸如电路板的另一个测试设备或部件连接和断开。 作为一个示例，探针芯被配置为在可旋转的锁定和解锁操作或扭转锁定/解锁操作中连接和断开测试设备或组件，其中框架相对于芯的其余部分旋转以锁定/解锁探针 核心。