公开(公告)号：US10121585B2

公开(公告)日：2018-11-06

申请号：US14746854

申请日：2015-06-23

Applicant: CYNTEC CO., LTD.

Inventor： Hsieh-Shen Hsieh ,  Shih-Feng Chien ,  Yu-Lun Chang ,  Chih-Hung Wei

IPC: H01F41/02 ,  H01F27/24 ,  H01F27/245

Abstract: A method of manufacturing magnetic core elements includes preparing a plurality of magnetic green sheets and a plurality of non-magnetic green sheets; alternately laminating the plurality of magnetic green sheets and non-magnetic green sheets directly upon one another, thereby forming a green sheet laminate; cutting the green sheet laminate into individual bodies with desired dimension; and sintering the individual bodies, thereby forming a magnetic core element with discretely distributed gaps.

公开(公告)号：US20180269073A1

公开(公告)日：2018-09-20

申请号：US15972247

申请日：2018-05-07

Applicant: CYNTEC CO., LTD.

Inventor： Chia Pei Chou ,  Lang-Yi Chiang ,  Jih-Hsu Yeh ,  You Chang Tseng

IPC: H01L21/48 ,  H01L23/495 ,  H01L23/498

CPC classification number: H01L21/486 ,  H01L23/495 ,  H01L23/4952 ,  H01L23/49811 ,  H01L23/49827 ,  H01L2924/00 ,  H01L2924/0002 ,  Y10T29/49117

Abstract: A method to form an electrical component, the method comprising: providing a first lead and a second lead; forming a first conductive pillar and a second conductive pillar on a first portion of the top surface of the first lead and a first portion of the top surface of the second lead, respectively, wherein a second portion of the top surface of the first lead, a second portion of the top surface of the second lead, the first conductive pillar, and the second conductive pillar form a 3D space, wherein at least one device is disposed in said 3D space and electrically connected to the at least one device to the first conductive pillar and the second conductive pillar.

公开(公告)号：US20180254137A1

公开(公告)日：2018-09-06

申请号：US15972238

申请日：2018-05-07

Applicant: CYNTEC CO., LTD.

Inventor： Lan-Chin Hsieh ,  Cheng-Chang Lee ,  Chih-Hung Chang ,  Chih-Siang Chuang ,  Tsung-Chan Wu ,  Roger Hsieh

IPC: H01F27/24 ,  H01F27/28 ,  H01F38/02 ,  H01F3/14 ,  H01F17/04 ,  H01F3/10

CPC classification number: H01F27/24 ,  H01F3/14 ,  H01F17/04 ,  H01F27/2823 ,  H01F38/023 ,  H01F2003/106

Abstract: A variable coupled inductor comprises a first core having a first protrusion, a second protrusion, a third protrusion, a first conducting-wire groove and a second conducting-wire groove on the top surface of the first core, wherein the second protrusion is disposed between the first protrusion and the third protrusion, wherein a first conducting wire is disposed in the first conducting-wire groove, and a second conducting wire is disposed in the second conducting-wire groove, wherein a second core, disposed over the first core, wherein a magnetic structure is integrally formed with the second core and protruded on the bottom surface of the second core, wherein the bottom surface of the magnetic structure is located over the top surface of the second protrusion.

公开(公告)号：US20180240738A1

公开(公告)日：2018-08-23

申请号：US15438781

申请日：2017-02-22

Applicant: CYNTEC CO., LTD.

Inventor： Da-Jung Chen ,  Shih-Chang Huang

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/552 ,  H01L21/48 ,  H01L21/56 ,  H01L21/52

CPC classification number: H01L23/49541 ,  H01L21/52 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/49575 ,  H01L23/49589 ,  H01L23/552 ,  H01L2224/18 ,  H01L2924/3025

Abstract: An electronic package includes an electronic component, a leadframe surrounding at least one sidewall surface of the electronic component, a molding compound encapsulating the leadframe and the electronic component, and a metal shielding layer conformally covering the molding compound and being electrically connected with the leadframe. The leadframe includes at least one opening for accommodating the electronic component. A lower portion of the electronic component is situated in the opening and a bottom surface of the electronic component is exposed from the opening.

公开(公告)号：US20180211756A1

公开(公告)日：2018-07-26

申请号：US15825460

申请日：2017-11-29

Applicant: CYNTEC CO., LTD.

Inventor： Min-Lian Kuo ,  Dao-Chuang Zhang ,  QiQi Yang ,  I-Feng Lin ,  Chi-Hsiang Chuang ,  Chao-Hung Hsu

IPC: H01F17/04 ,  H01F17/00 ,  H01G4/005 ,  H01F27/02 ,  H01F27/28 ,  H01F27/29 ,  H01F27/32 ,  H01F41/066 ,  H01F41/12

CPC classification number: H01F17/045 ,  H01F17/0013 ,  H01F27/02 ,  H01F27/2823 ,  H01F27/2828 ,  H01F27/29 ,  H01F27/292 ,  H01F27/306 ,  H01F27/327 ,  H01F27/38 ,  H01F41/066 ,  H01F41/127 ,  H01F2017/0093 ,  H01G4/005

Abstract: A coil component includes a core member, a coil structure, at least one terminal electrode and a soldering member. The coil structure includes an insulating layer. A first portion of the coil structure is wound around the core member. The terminal electrode is mounted onto the core member. The terminal electrode includes a clamping portion and a supporting portion. The clamping portion includes a bent part for clamping a second portion of the coil structure. The supporting portion includes a protruding part. A conductive wire of a third portion of the coil structure is revealed. A soldering member covers the protruding part to connect the supporting portion to the conductive wire to form electrical connection between the coil structure and the terminal electrode.

公开(公告)号：US10034379B2

公开(公告)日：2018-07-24

申请号：US15297190

申请日：2016-10-19

Applicant: CYNTEC CO., LTD.

Inventor： Chi-Feng Huang ,  Bau-Ru Lu ,  Da-Jung Chen

IPC: H05K1/18 ,  H01F27/29 ,  H01F27/06

Abstract: A stacked electronic structure is provided. The stacked electronic structure includes: a magnetic device, electronic devices, and a substrate. The substrate is disposed under the magnetic device. First and second electronic devices are disposed between a bottom surface of the magnetic device and a top surface of the substrate. The first and second electronic devices comprise first and third terminals, disposed on first and second surfaces thereof, respectively, electrically connected to the magnetic device without using the substrate. The first and second electronic devices also comprise second and fourth terminals, disposed on second and fourth surfaces thereof, respectively, electrically connected to the substrate.

公开(公告)号：US09984996B2

公开(公告)日：2018-05-29

申请号：US14536699

申请日：2014-11-10

Applicant: CYNTEC CO., LTD.

Inventor： Bau-Ru Lu ,  Ming-Chia Wu ,  Shao Wei Lu

IPC: H01L23/538 ,  H01L23/31 ,  H01L25/065 ,  H01L25/00 ,  H01L23/552 ,  H05K5/02 ,  H05K5/06 ,  H05K1/11 ,  H05K3/42 ,  H05K7/02 ,  H05K7/20 ,  H01L23/13 ,  H01L23/36 ,  H01L23/373 ,  H01L23/40 ,  H01L23/498

CPC classification number: H01L25/0655 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/36 ,  H01L23/3735 ,  H01L23/4006 ,  H01L23/49811 ,  H01L23/5389 ,  H01L23/552 ,  H01L25/50 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/13055 ,  H05K1/115 ,  H05K3/42 ,  H05K5/0247 ,  H05K5/065 ,  H05K7/02 ,  H05K7/20509 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The present invention discloses a three-dimensional package structure which can achieve a relatively high utilization of an internal space thereof, so that a size of electronic package structure can be reduced. The three-dimensional package structure comprises a first electronic component, a plurality of second electronic components and a plurality of conductive patterns. The first electronic component has a top surface and a bottom surface. The plurality of second electronic components are disposed over the top surface of the first electronic component. The plurality of conductive patterns are disposed over the plurality of second electronic components to electrically connect the plurality of second electronic components and the first electronic component.

公开(公告)号：US20180082979A1

公开(公告)日：2018-03-22

申请号：US15823579

申请日：2017-11-28

Applicant: CYNTEC CO., LTD.

Inventor： BAU-RU LU ,  MING-CHIA WU ,  SHAO WEI LU

IPC: H01L25/065 ,  H05K5/02 ,  H01L23/552 ,  H01L25/00 ,  H05K5/06 ,  H05K1/11 ,  H05K3/42 ,  H05K7/02 ,  H05K7/20 ,  H01L23/538 ,  H01L23/498 ,  H01L23/40 ,  H01L23/373 ,  H01L23/36 ,  H01L23/13 ,  H01L23/31

CPC classification number: H01L25/0655 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/36 ,  H01L23/3735 ,  H01L23/4006 ,  H01L23/49811 ,  H01L23/5389 ,  H01L23/552 ,  H01L25/50 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/13055 ,  H05K1/115 ,  H05K3/42 ,  H05K5/0247 ,  H05K5/065 ,  H05K7/02 ,  H05K7/20509 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The present invention discloses a substrate where the lateral surface of the substrate is formed to expose at least one portion of a via(s) for circuit connection. The substrate comprises a plurality of insulating layers; and a plurality of conductive layers separated by the plurality of insulating layers. A first lateral surface of the substrate is formed by the plurality of conductive layers and the plurality of insulating layers. The first lateral surface of the substrate comprises at least one first portion of a first via filled with a first conductive material.

公开(公告)号：US20180053592A1

公开(公告)日：2018-02-22

申请号：US15796870

申请日：2017-10-30

Applicant: CYNTEC CO., LTD.

Inventor： CHI-HSUN LEE ,  HSIEH-SHEN HSIEH ,  SEN-HUEI CHEN

IPC: H01F17/04 ,  H01L23/00 ,  H01F27/29 ,  H01F27/02 ,  H01F3/10

CPC classification number: H01F17/045 ,  H01F3/10 ,  H01F27/022 ,  H01F27/292 ,  H01F2017/048 ,  H01L24/00 ,  H01L28/10

Abstract: An electrical component is disclosed, wherein the electrical component comprises: a body; a conductive element disposed in the body; a first metal layer, disposed on the body and electrically connected to a terminal of the conductive element; a conductive and adhesive layer, overlaying on the first metal layer; and a second metal layer, overlaying on the first metal layer and the conductive and adhesive layer, wherein a first conductive path is formed from the terminal of the conductive element to the second metal layer via the first metal layer and the conductive and adhesive layer, and a second conductive path is formed from the terminal of the conductive element to the second metal layer via the first metal layer without passing through the conductive and adhesive layer.

公开(公告)号：US09859250B2

公开(公告)日：2018-01-02

申请号：US14492088

申请日：2014-09-22

Applicant: CYNTEC CO., LTD.

Inventor： Bau-Ru Lu ,  Ming-Chia Wu ,  Shao Wei Lu

IPC: H01L31/062 ,  H01L23/48 ,  H01L25/065 ,  H01L25/00 ,  H01L23/552 ,  H05K5/02 ,  H05K5/06 ,  H05K1/11 ,  H05K3/42 ,  H05K7/02 ,  H05K7/20 ,  H01L23/13 ,  H01L23/36 ,  H01L23/373 ,  H01L23/40 ,  H01L23/498 ,  H01L23/538 ,  H01L23/31

CPC classification number: H01L25/0655 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/36 ,  H01L23/3735 ,  H01L23/4006 ,  H01L23/49811 ,  H01L23/5389 ,  H01L23/552 ,  H01L25/50 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/13055 ,  H05K1/115 ,  H05K3/42 ,  H05K5/0247 ,  H05K5/065 ,  H05K7/02 ,  H05K7/20509 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The present invention discloses a substrate where the lateral surface of the substrate is formed to expose at least one portion of a via(s) for circuit connection. The substrate comprises a plurality of insulating layers; and a plurality of conductive layers separated by the plurality of insulating layers. A first lateral surface of the substrate is formed by the plurality of conductive layers and the plurality of insulating layers. The first lateral surface of the substrate comprises at least one first portion of a first via filled with a first conductive material.