公开(公告)号：US20200225785A1

公开(公告)日：2020-07-16

申请号：US16830795

申请日：2020-03-26

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Hajime KIMURA ,  Masami JINTYOU ,  Yasuharu HOSAKA ,  Naoto GOTO ,  Takahiro IGUCHI ,  Daisuke KUROSAKI ,  Junichi KOEZUKA

IPC: G06F3/044 ,  H01L27/12 ,  H01L29/786 ,  H01L29/24 ,  H01L27/32 ,  G06F3/041 ,  H01L29/66

Abstract: A touch panel including an oxide semiconductor film having conductivity is provided. The touch panel includes a transistor, a second insulating film, and a touch sensor. The transistor includes a gate electrode; a gate insulating film; a first oxide semiconductor film; a source electrode and a drain electrode; a first insulating film; and a second oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is positioned between the first insulating film and the second insulating film. The touch sensor includes a first electrode and a second electrode. One of the first and second electrodes includes the second oxide semiconductor film.

公开(公告)号：US20200052100A1

公开(公告)日：2020-02-13

申请号：US16526389

申请日：2019-07-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Masataka NAKADA ,  Yasuharu HOSAKA

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/24

Abstract: A semiconductor layer containing a metal oxide is formed, a gate insulating layer containing an oxide is formed over the semiconductor layer, and a metal oxide layer is formed over the gate insulating layer. Heat treatment is performed after the metal oxide layer is formed, and the metal oxide layer is removed after the heat treatment is performed. After the metal oxide layer is removed, a gate electrode overlapping with part of the semiconductor layer is formed over the gate insulating layer. Then, a first element is supplied through the gate insulating layer to a region of the semiconductor layer that does not overlap with the gate electrode. Examples of the first element include phosphorus, boron, magnesium, aluminum, and silicon. The steps performed after the metal oxide layer is removed are each preferably performed at a temperature lower than or equal to the temperature of the heat treatment.

公开(公告)号：US20180151604A1

公开(公告)日：2018-05-31

申请号：US15865567

申请日：2018-01-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Yasuharu HOSAKA

IPC: H01L27/12

Abstract: An oxide semiconductor film with a low density of defect states is formed. In addition, an oxide semiconductor film with a low impurity concentration is formed. Electrical characteristics of a semiconductor device or the like using an oxide semiconductor film is improved. A semiconductor device including a capacitor, a resistor, or a transistor having a metal oxide film that includes a region; with a transmission electron diffraction measurement apparatus, a diffraction pattern with luminescent spots indicating alignment is observed in 70% or more and less than 100% of the region when an observation area is changed one-dimensionally within a range of 300 nm.

公开(公告)号：US20180025918A1

公开(公告)日：2018-01-25

申请号：US15654089

申请日：2017-07-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Takashi HAMOCHI ,  Yasuharu HOSAKA ,  Toshimitsu OBONAI

IPC: H01L21/3213 ,  H01L21/18 ,  H01L29/49 ,  H01L29/812 ,  H01L21/28

CPC classification number: H01L21/32137 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02326 ,  H01L21/0234 ,  H01L21/02488 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/18 ,  H01L21/28035 ,  H01L21/2807 ,  H01L21/28079 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696 ,  H01L29/812

Abstract: A transistor with high productivity and a method for manufacturing the transistor are provided. In the formation of a bottom-gate transistor using a metal oxide layer as a semiconductor layer where a channel is formed, a gate insulating layer including silicon nitride is formed, and then plasma treatment is successively performed in the same treatment chamber under an atmosphere containing oxygen. After that, the metal oxide layer is formed.

公开(公告)号：US20180012912A1

公开(公告)日：2018-01-11

申请号：US15697627

申请日：2017-09-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Yukinori SHIMA ,  Masami JINTYOU ,  Takashi HAMOCHI ,  Satoshi HIGANO ,  Yasuharu HOSAKA ,  Toshimitsu OBONAI

IPC: H01L27/12 ,  H01L49/02 ,  H01L29/45 ,  H01L29/786

CPC classification number: H01L27/1255 ,  H01L28/20 ,  H01L28/24 ,  H01L28/60 ,  H01L29/45 ,  H01L29/7869 ,  H01L29/78693

Abstract: A novel semiconductor device in which a metal film containing copper (Cu) is used for a wiring, a signal line, or the like in a transistor including an oxide semiconductor film is provided. The semiconductor device includes an oxide semiconductor film having conductivity on an insulating surface and a conductive film in contact with the oxide semiconductor film having conductivity. The conductive film includes a Cu—X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti).

公开(公告)号：US20170352540A1

公开(公告)日：2017-12-07

申请号：US15609148

申请日：2017-05-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masahiro WATANABE ,  Takuya HANDA ,  Yasuharu HOSAKA ,  Kenichi OKAZAKI ,  Shunpei YAMAZAKI

IPC: H01L21/02 ,  C23C14/34 ,  C23C14/08 ,  H01J37/34 ,  H01L29/786 ,  G02F1/1368 ,  H01L27/32 ,  H01L29/66 ,  G02F1/1343

CPC classification number: H01L21/02631 ,  C23C14/086 ,  C23C14/3407 ,  C23C14/3457 ,  C23C14/54 ,  C23C14/564 ,  C23C14/566 ,  G02F1/1303 ,  G02F1/134309 ,  G02F1/1368 ,  H01J37/3426 ,  H01L21/02565 ,  H01L21/67017 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67207 ,  H01L21/68764 ,  H01L27/3262 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/78648 ,  H01L29/7869

Abstract: To provide a sputtering apparatus capable of forming a semiconductor film in which impurities such as hydrogen or water are reduced. The sputtering apparatus is capable of forming a semiconductor film and includes a deposition chamber, a gas supply device connected to the deposition chamber, a gas refining device connected to the gas supply device, a vacuum pump for evacuating the deposition chamber, a target disposed in the deposition chamber, and a cathode disposed to face the target. The gas supply device is configured to supply at least one of an argon gas, an oxygen gas, and a nitrogen gas. The partial pressure of hydrogen molecules is lower than or equal to 0.01 Pa and the partial pressure of water molecules is lower than or equal to 0.0001 Pa in the deposition chamber.

公开(公告)号：US20170338107A1

公开(公告)日：2017-11-23

申请号：US15596414

申请日：2017-05-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yasuharu HOSAKA ,  Toshimitsu OBONAI ,  Kenichi OKAZAKI

IPC: H01L21/02 ,  H01L21/28 ,  H01L29/786 ,  H01L29/49 ,  H01L29/423 ,  H01L29/51

CPC classification number: H01L21/02266 ,  C23C14/08 ,  C23C14/086 ,  C23C14/3414 ,  C23C14/54 ,  C23C14/566 ,  C23C14/5806 ,  C23C16/345 ,  H01L21/02142 ,  H01L21/02164 ,  H01L21/02472 ,  H01L21/02483 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02601 ,  H01L21/02631 ,  H01L21/28211 ,  H01L29/4232 ,  H01L29/4908 ,  H01L29/517 ,  H01L29/786

Abstract: A method for manufacturing a novel semiconductor device is provided. The method includes a first step of forming a first oxide semiconductor film over a substrate, a second step of heating the first oxide semiconductor film, and a third step of forming a second oxide semiconductor film over the first oxide semiconductor film. The first to third steps are performed in an atmosphere in which water vapor partial pressure is lower than water vapor partial pressure in atmospheric air, and the first step, the second step, and the third step are successively performed in this order.

公开(公告)号：US20170236723A1

公开(公告)日：2017-08-17

申请号：US15584223

申请日：2017-05-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yasuharu HOSAKA ,  Toshimitsu OBONAI ,  Junichi KOEZUKA ,  Yukinori SHIMA ,  Masahiko HAYAKAWA ,  Takashi HAMOCHI ,  Suzunosuke HIRAISHI

IPC: H01L21/477 ,  H01L21/28 ,  H01L29/786 ,  H01L21/02

Abstract: To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and is in contact with a surface of the oxide semiconductor film, a protective film in contact with an opposite surface of the surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. In the gate insulating film or the protective film, the amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than the amount of nitrogen oxide released by heat treatment.

公开(公告)号：US20170104089A1

公开(公告)日：2017-04-13

申请号：US15286892

申请日：2016-10-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Masami JINTYOU ,  Yukinori SHIMA ,  Yasuharu HOSAKA ,  Yasutaka NAKAZAWA ,  Takashi HAMOCHI ,  Takahiro SATO ,  Shunpei YAMAZAKI

IPC: H01L29/66 ,  H01L29/786 ,  H01L21/02 ,  H01L21/383 ,  H01L23/31 ,  H01L23/29 ,  H01L29/40 ,  H01L29/49

CPC classification number: H01L29/66969 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/383 ,  H01L23/291 ,  H01L23/3171 ,  H01L29/24 ,  H01L29/408 ,  H01L29/4908 ,  H01L29/7781 ,  H01L29/7782 ,  H01L29/7786 ,  H01L29/7869 ,  H01L29/78696

Abstract: A change in electrical characteristics of a semiconductor device including an oxide semiconductor is prevented, and the reliability of the semiconductor device is improved. An oxide semiconductor is formed over a substrate; an insulator is formed over the oxide semiconductor; a metal oxide is formed over the insulator; a conductor is formed over the metal oxide; a portion of the oxide semiconductor is exposed by removing the conductor, the metal oxide, and the insulator over the oxide semiconductor; plasma treatment is performed on a surface of the exposed portion of the oxide semiconductor; and a nitride insulator is formed over the exposed portion of the oxide semiconductor and over the conductor. The plasma treatment is performed in a mixed atmosphere of an argon gas and a nitrogen gas.

公开(公告)号：US20170047435A1

公开(公告)日：2017-02-16

申请号：US15340031

申请日：2016-11-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Daisuke KUROSAKI ,  Yukinori SHIMA ,  Yasuharu HOSAKA

IPC: H01L29/66 ,  H01L21/02 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/02472 ,  H01L21/02483 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: The transistor includes a gate electrode, a gate insulating film over the gate electrode, an oxide semiconductor film over the gate insulating film, a source electrode and a drain electrode electrically connected to the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film on the gate electrode side and a second oxide semiconductor film over the first oxide semiconductor film. The first oxide semiconductor film includes a first region in which an atomic proportion of In is larger than that of M (M is Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf). The second oxide semiconductor film includes a second region in which an atomic proportion of In is smaller than that of the first oxide semiconductor film. The second region includes a portion thinner than the first region.

Abstract translation: 晶体管包括栅电极，栅电极上的栅极绝缘膜，栅极绝缘膜上的氧化物半导体膜，与氧化物半导体膜电连接的源电极和漏电极。 氧化物半导体膜包括栅电极侧的第一氧化物半导体膜和第一氧化物半导体膜上的第二氧化物半导体膜。 第一氧化物半导体膜包括其中In的原子比例大于M（M为Ti，Ga，Sn，Y，Zr，La，Ce，Nd或Hf）的原子比例的第一区域。 第二氧化物半导体膜包括其中In的原子比例小于第一氧化物半导体膜的原子比例的第二区域。 第二区域包括比第一区域薄的部分。