公开(公告)号：US20080251894A1

公开(公告)日：2008-10-16

申请号：US11911144

申请日：2006-02-21

申请人： Toshiyuki Kojima ,  Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Shingo Komatsu

发明人： Toshiyuki Kojima ,  Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Shingo Komatsu

IPC分类号： H01L23/544 ,  H01L21/58

CPC分类号： H01L24/81 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/17 ,  H01L24/24 ,  H01L24/25 ,  H01L24/45 ,  H01L24/48 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16105 ,  H01L2224/16106 ,  H01L2224/16238 ,  H01L2224/17051 ,  H01L2224/171 ,  H01L2224/24011 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/82001 ,  H01L2224/83385 ,  H01L2224/83886 ,  H01L2224/83888 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/20752 ,  H01L2924/00015 ,  H01L2224/81805 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A mounted body (100) of the present invention includes: a semiconductor element (10) having a surface (10a) on which element electrodes (12) are formed and a rear surface (10b) opposing the surface (10a); and a mounting board (30) on which wiring patterns (35) each having an electrode terminal (32) are formed. The rear surface (10b) of the semiconductor element (10) is in contact with the mounting board (30), and the element electrodes (12) of the semiconductor element (10) are connected electrically to the electrode terminals (32) of the wiring pattern (35) formed on the mounting board (30) via solder connectors (20) formed of solder particles assembled into a bridge shape. With this configuration, fine pitch connection between the element electrodes of the semiconductor element and the electrode terminals of the mounting board becomes possible.

摘要翻译： 本发明的安装体（100）包括：具有形成元件电极（12）的表面（10a）和与表面（10a）相对的后表面（10b）的半导体元件（10）。 以及安装板（30），在其上形成有各自具有电极端子（32）的布线图案（35）。 半导体元件（10）的后表面（10b）与安装板（30）接触，并且半导体元件（10）的元件电极（12）与电极端子（32）电连接 通过由组装成桥形的焊料颗粒形成的焊料连接器（20）形成在安装板（30）上的布线图案（35）。 利用这种结构，半导体元件的元件电极和安装板的电极端子之间的细间距连接成为可能。

公开(公告)号：US08435842B2

公开(公告)日：2013-05-07

申请号：US12681399

申请日：2009-07-30

申请人： Koichi Hirano ,  Seiichi Nakatani ,  Tatsuo Ogawa

发明人： Koichi Hirano ,  Seiichi Nakatani ,  Tatsuo Ogawa

IPC分类号： H01L21/00

CPC分类号： H01L51/0541 ,  H01L51/0004 ,  H01L51/0022 ,  H01L51/0097 ,  H01L51/107 ,  Y02E10/549 ,  Y02P70/521

摘要： A method for manufacturing a flexible semiconductor device comprises (i) forming an insulating film on the upper surface of a resin film, (ii) forming a pattern of extraction electrodes on the upper surface of the resin film, (iii) forming a semiconductor layer on the insulating film in such a manner that the semiconductor layer is in contact with the pattern of extraction electrodes, and (iv) forming a sealing resin layer on the upper surface of the resin film in such a manner that the sealing resin layer covers the semiconductor layer and the pattern of extraction electrodes, wherein at least one of the stepsof the above steps (i) to (iv) is carried out by a printing method. With this manufacturing method, various layers can be formed by a simple printing process without using a vacuum process, photolithography, or the like.

摘要翻译： 一种制造柔性半导体器件的方法包括：（i）在树脂膜的上表面上形成绝缘膜，（ii）在树脂膜的上表面上形成提取电极的图案，（iii）形成半导体层 以使得半导体层与提取电极的图案接触的方式在绝缘膜上，以及（iv）在树脂膜的上表面上形成密封树脂层，使得密封树脂层覆盖 半导体层和提取电极的图案，其中通过印刷方法进行上述步骤（i）至（iv）中的步骤中的至少一个。 利用该制造方法，可以通过简单的印刷工艺形成各种层，而不使用真空工艺，光刻等。

公开(公告)号：US08343822B2

公开(公告)日：2013-01-01

申请号：US12681445

申请日：2009-07-30

申请人： Koichi Hirano ,  Seiichi Nakatani ,  Tatsuo Ogawa ,  Takashi Ichiryu ,  Takeshi Suzuki

发明人： Koichi Hirano ,  Seiichi Nakatani ,  Tatsuo Ogawa ,  Takashi Ichiryu ,  Takeshi Suzuki

IPC分类号： H01L21/84 ,  H01L21/00

CPC分类号： H01L29/78651 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1266 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/78603 ,  H01L29/7869

摘要： A method for manufacturing a flexible semiconductor device includes (i) forming an insulating film on the upper surface of metal foil, (ii) forming an extraction electrode pattern on the upper surface of the metal foil, (iii) forming a semiconductor layer on the insulating film such that the semiconductor layer is in contact with the extraction electrode pattern, (iv) forming a sealing resin layer on the upper surface of the metal foil such that the sealing resin layer covers the semiconductor layer and the extraction electrode pattern, and (v) forming electrodes by etching the metal foil, the metal foil being used as a support for the insulating film, the extraction electrode pattern, the semiconductor layer, and the sealing resin layer formed in (i) to (iv) and used as a constituent material for the electrodes in (v). The metal foil need not be stripped, and a high-temperature process can be used.

摘要翻译： 一种制造柔性半导体器件的方法包括：（i）在金属箔的上表面上形成绝缘膜，（ii）在金属箔的上表面上形成引出电极图案，（iii）在金属箔的上表面上形成半导体层 绝缘膜，使得半导体层与引出电极图案接触，（iv）在金属箔的上表面上形成密封树脂层，使得密封树脂层覆盖半导体层和引出电极图案，和（ v）通过蚀刻金属箔形成电极，金属箔用作绝缘膜的支撑体，引出电极图案，半导体层和形成在（i）至（iv）中的密封树脂层，并用作 （v）中的电极的构成材料。 金属箔不需要剥离，可以使用高温工艺。

公开(公告)号：US08143617B2

公开(公告)日：2012-03-27

申请号：US12667297

申请日：2008-07-01

申请人： Yoshihisa Yamashita ,  Seiichi Nakatani

发明人： Yoshihisa Yamashita ,  Seiichi Nakatani

IPC分类号： H01L29/41 ,  H01L29/786 ,  H01L29/06 ,  H01L51/30 ,  H01L51/50 ,  H01L51/52

CPC分类号： H01L51/057 ,  B82Y10/00 ,  H01L27/3274 ,  H01L51/0004

摘要： A semiconductor device having semiconductor elements disposed with higher density and a method for manufacturing the same are provided. An image display device employing the semiconductor device is also provided. A semiconductor device comprises a resin film having a through hole; and a semiconductor element comprising a gate electrode disposed on the inner wall of the through hole, an insulating layer that covers the gate electrode within the through hole, an organic semiconductor disposed on the insulating layer within the through hole, and a source electrode and a drain electrode which are electrically connected to the organic semiconductor.

摘要翻译： 提供了具有以更高密度设置的半导体元件的半导体器件及其制造方法。 还提供了采用半导体器件的图像显示装置。 半导体器件包括具有通孔的树脂膜; 以及半导体元件，包括设置在通孔的内壁上的栅电极，覆盖通孔内的栅电极的绝缘层，设置在通孔内的绝缘层上的有机半导体，以及源电极和 电极与有机半导体电连接。

公开(公告)号：US07981528B2

公开(公告)日：2011-07-19

申请号：US11848407

申请日：2007-08-31

申请人： Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Ichiryu ,  Koichi Hirano

发明人： Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Ichiryu ,  Koichi Hirano

IPC分类号： B32B15/00

CPC分类号： G06K19/07749 ,  G06K19/07771 ,  Y10T428/24355 ,  Y10T428/32

摘要： A water-repelling layer is formed on a resin film, and a stripe pattern region is formed so as to be positioned within a surface region of the water-repelling layer and so as to be relatively hydrophilic with respect to water repellency of the water-repelling layer. A magnetic stripe pattern is formed of needle-shaped magnetic grains oriented and aggregated in the stripe pattern region. The needle-shaped magnetic grains are arranged in a desirable state in a predetermined stripe pattern, with a high magnetic permeability and a magnetic sheet with stripe-arranged magnetic grains that is thin and flexible is obtained.

摘要翻译： 在树脂膜上形成防水层，并且形成条纹图案区域，以便位于防水层的表面区域内，并且相对于水溶性防水层的防水性而相对亲水， 排斥层。 磁条图案由在条纹图案区域中定向和聚集的针状磁性颗粒形成。 针状磁性颗粒以预定的条纹图案被布置成期望的状态，具有高磁导率，并且获得薄且柔性的带状排列的磁性颗粒的磁性片。

公开(公告)号：US20110121298A1

公开(公告)日：2011-05-26

申请号：US13054049

申请日：2010-02-05

申请人： Takashi Ichiryu ,  Seiichi Nakatani ,  Koichi Hirano

发明人： Takashi Ichiryu ,  Seiichi Nakatani ,  Koichi Hirano

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/78603 ,  H01L27/1218 ,  H01L27/1266 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/78681 ,  H01L29/7869 ,  H01L2224/24195 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244 ,  H01L2924/3511 ,  H01L2924/3512

摘要： A method includes the steps of preparing a multilayer film 80 formed by sequentially stacking a first metal layer 10, an inorganic insulating layer 20, a semiconductor layer 30, and a second metal layer 40; forming a source electrode 42s and a drain electrode 42d comprised of the second metal layer 40 by etching the second metal layer 40; pressure-bonding a resin layer 50 onto a surface of the multilayer film 80 provided with the source electrode 42s and the drain electrode 42d to burry the source electrode 42s and the drain electrode 42d in the resin layer 50; and forming a gate electrode 10g comprised of the first metal layer 10 by etching the first metal layer 10. The inorganic insulating layer 20g functions as a gate insulating film. The semiconductor layer 30 functions as a channel.

摘要翻译： 一种方法包括制备通过顺序堆叠第一金属层10，无机绝缘层20，半导体层30和第二金属层40而形成的多层膜80的步骤; 通过蚀刻第二金属层40形成由第二金属层40构成的源电极42s和漏电极42d; 将树脂层50压接到设置有源电极42s和漏电极42d的多层膜80的表面，以将树脂层50中的源电极42s和漏电极42d嵌入; 以及通过蚀刻第一金属层10形成由第一金属层10构成的栅极电极10g。无机绝缘层20g用作栅极绝缘膜。 半导体层30用作沟道。

公开(公告)号：US07443021B2

公开(公告)日：2008-10-28

申请号：US11550677

申请日：2006-10-18

申请人： Seiichi Nakatani

发明人： Seiichi Nakatani

IPC分类号： H01L29/40

CPC分类号： H01L23/4985 ,  H01L23/49805 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2225/06551 ,  H01L2225/06558 ,  H01L2225/06568 ,  H01L2225/1011 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/19107 ,  H05K1/145 ,  H05K2201/10734 ,  Y10T156/1056 ,  H01L2924/00 ,  H01L2924/20752 ,  H01L2224/05005 ,  H01L2224/05541 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2924/00012

摘要： An electronic component packaging structure, includes: circuit boards each having a wiring at least on a surface thereof; and an electronic component package secured between the circuit boards. The electronic component package includes at least one electronic component embedded within an electrical insulating encapsulation resin molded member made of an inorganic filler and a resin, the at least one electronic component being selected from an active component and a passive component, protruding electrodes are arranged on both faces of the electrical insulating encapsulation resin molded member, and the electronic component is connected electrically with at least a part of the protruding electrodes. This configuration allows circuit boards to be connected with each other and a high-density and high-performance structure.

摘要翻译： 一种电子部件封装结构，包括：至少在其表面上具有布线的电路板; 以及固定在电路板之间的电子部件封装。 电子部件封装包括嵌入由无机填料和树脂制成的电绝缘密封树脂模制构件中的至少一个电子部件，所述至少一个电子部件选自有源部件和无源部件，突出电极设置在 电绝缘性封装树脂成型体的两面，电子部件与至少一部分突出电极电连接。 该配置允许电路板彼此连接和高密度和高性能的结构。

公开(公告)号：US20070262470A1

公开(公告)日：2007-11-15

申请号：US11577346

申请日：2005-09-20

申请人： Takashi Ichiryu ,  Yoshihisa Yamashita ,  Seiichi Nakatani

发明人： Takashi Ichiryu ,  Yoshihisa Yamashita ,  Seiichi Nakatani

IPC分类号： H01L23/48 ,  H01L21/00 ,  H01L25/00

CPC分类号： H01L21/56 ,  H01L21/563 ,  H01L23/3121 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/91 ,  H01L25/0657 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/83856 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06551 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10329 ,  H01L2924/181 ,  H05K1/186 ,  H05K3/4614 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2203/049 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： The present invention provides a module with a built-in semiconductor that can suppress a reduction in yield caused by a crack or failure of a semiconductor device in the process of mounting a thin semiconductor device on a wiring board and a method for manufacturing the module. In the module with a built-in semiconductor, a semiconductor device (107) is contained in an interlayer connection member (105) located between a first wiring board (101) and a second wiring board (103). The back side of the semiconductor device (107) is die-bonded to the first wiring board (101) via an adhesive (108), and the semiconductor device (107) is connected electrically to the second wiring pattern (104) via a protruding electrode (109).

摘要翻译： 本发明提供了一种具有内置半导体的模块，其能够抑制在将薄半导体器件安装在布线板上的过程中半导体器件的裂纹或故障引起的产量降低以及用于制造模块的方法。 在具有内置半导体的模块中，半导体器件（107）包含在位于第一布线板（101）和第二布线板（103）之间的层间连接部件（105）中。 半导体器件（107）的背面通过粘合剂（108）与第一布线板（101）进行裸片接合，半导体器件（107）经由突出部 电极（109）。

公开(公告)号：US07141874B2

公开(公告)日：2006-11-28

申请号：US10840583

申请日：2004-05-05

申请人： Seiichi Nakatani

发明人： Seiichi Nakatani

IPC分类号： H01L29/40

CPC分类号： H01L23/4985 ,  H01L23/49805 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2225/06551 ,  H01L2225/06558 ,  H01L2225/06568 ,  H01L2225/1011 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/19107 ,  H05K1/145 ,  H05K2201/10734 ,  Y10T156/1056 ,  H01L2924/00 ,  H01L2924/20752 ,  H01L2224/05005 ,  H01L2224/05541 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2924/00012

摘要： An electronic component packaging structure, includes: circuit boards each having a wiring at least on a surface thereof; and an electronic component package secured between the circuit boards. The electronic component package includes at least one electronic component embedded within an electrical insulating encapsulation resin molded member made of an inorganic filler and a resin, the at least one electronic component being selected from an active component and a passive component, protruding electrodes are arranged on both faces of the electrical insulating encapsulation resin molded member, and the electronic component is connected electrically with at least a part of the protruding electrodes. This configuration allows circuit boards to be connected with each other and a high-density and high-performance structure.

摘要翻译： 一种电子部件封装结构，包括：至少在其表面上具有布线的电路板; 以及固定在电路板之间的电子部件封装。 电子部件封装包括嵌入由无机填料和树脂制成的电绝缘密封树脂模制构件中的至少一个电子部件，所述至少一个电子部件选自有源部件和无源部件，突出电极设置在 电绝缘性封装树脂成型体的两面，电子部件与至少一部分突出电极电连接。 该配置允许电路板彼此连接和高密度和高性能的结构。

公开(公告)号：US07134198B2

公开(公告)日：2006-11-14

申请号：US10654343

申请日：2003-09-03

申请人： Seiichi Nakatani ,  Yoshihiro Bessho ,  Yasuhiro Sugaya ,  Keiji Onishi

发明人： Seiichi Nakatani ,  Yoshihiro Bessho ,  Yasuhiro Sugaya ,  Keiji Onishi

IPC分类号： H05K3/30

CPC分类号： H01L21/568 ,  H01L21/561 ,  H01L23/3107 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/45144 ,  H01L2224/81005 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15787 ,  H01L2924/16195 ,  H01L2924/16235 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K1/187 ,  H05K3/20 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4652 ,  H05K2201/10378 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49146 ,  Y10T29/53174 ,  Y10T29/53178 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05624 ,  H01L2924/00014

摘要： A method for manufacturing an electric element built-in module including flip-chip mounting at least one electric element such as a semiconductor chip or a surface acoustic wave device on a wiring pattern, sealing the electric element with a thermosetting resin composition, and grinding or abrading the thermosetting resin composition and electric element from a side of the electric element opposite that of the wiring pattern. The method provides upper surfaces of the electric element and the thermosetting resin composition that are substantially flush with each other. The method provides an electric element built-in module suitable for high-density packaging with a reduced thickness without damaging the electric element and while maintaining mechanical strength.

摘要翻译： 一种电气元件内置模块的制造方法，其包括在布线图案上安装诸如半导体芯片或表面声波装置的至少一个电气元件的倒装芯片，用热固性树脂组合物密封电气元件，以及研磨或 从电气元件的与布线图案相反的一侧研磨热固性树脂组合物和电气元件。 该方法提供电气元件和热固性树脂组合物的彼此基本齐平的上表面。 该方法提供一种电子元件内置模块，适用于厚度较小的高密度封装，而不会损坏电气元件，同时保持机械强度。