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    SILICON-CONTAINING HETEROJUNCTION PHOTOVOLTAIC ELEMENT AND DEVICE
    83.
    发明申请
    SILICON-CONTAINING HETEROJUNCTION PHOTOVOLTAIC ELEMENT AND DEVICE 审中-公开
    含硅的异质光电元件和器件

    公开(公告)号：US20120329206A1

    公开(公告)日：2012-12-27

    申请号：US13603932

    申请日：2012-09-05

    申请人： Bahman Hekmatshoar-Tabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    发明人： Bahman Hekmatshoar-Tabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    IPC分类号： H01L31/18

    CPC分类号： H01L31/0747 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

    摘要： In one embodiment, a method of forming a photovoltaic device is provided which includes providing an absorption layer comprising a silicon-containing semiconductor layer of a first conductivity type and having a top surface and a bottom surface that opposes the top surface. A front contact is formed on the top surface of the absorption layer, and a back contact is formed on the bottom surface of the absorption layer. The forming of the front contact and the back contact can occur in any order. The back contact that is formed comprises at least one back contact semiconductor material layer of the first conductivity type and having a lower band-offset than that of hydrogenated amorphous silicon with crystalline Si and/or a higher activated doping of the first conductivity type than that of the doped hydrogenated amorphous silicon layer.

    摘要翻译： 在一个实施例中，提供了一种形成光伏器件的方法，其包括提供包括第一导电类型的含硅半导体层并且具有与顶表面相对的顶表面和底表面的吸收层。 在吸收层的顶表面上形成前接触，并且在吸收层的底表面上形成背接触。 前接触和后接触的形成可以以任何顺序发生。 形成的背接触包括至少一个第一导电类型的背接触半导体材料层，并且具有比具有结晶Si的氢化非晶硅和/或第一导电类型的更高活性掺杂的带隙偏移低的带隙偏移 的掺杂氢化非晶硅层。

    Hybrid crystallographic surface orientation substrate having one or more SOI regions and/or bulk semiconductor regions
    85.
    发明授权
    Hybrid crystallographic surface orientation substrate having one or more SOI regions and/or bulk semiconductor regions 失效
    具有一个或多个SOI区域和/或体半导体区域的混合晶体表面取向衬底

    公开(公告)号：US07348633B2

    公开(公告)日：2008-03-25

    申请号：US11164345

    申请日：2005-11-18

    申请人： Junedong Lee ,  Devendra K. Sadana ,  Dominic J. Schepis ,  Ghavam G. Shahidi

    发明人： Junedong Lee ,  Devendra K. Sadana ,  Dominic J. Schepis ,  Ghavam G. Shahidi

    IPC分类号： H01L27/01 ,  H01L27/12

    CPC分类号： H01L21/84 ,  H01L21/76251 ,  H01L21/823807 ,  H01L21/823878 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/04

    摘要： A substrate for a semiconductor device is disclosed including, in one embodiment, a plurality of semiconductor-on-insulator (SOI) wafers bonded to one another in a single stack. A distal end of the stack includes a first SOI region with a first semiconductor layer having a thickness and a first surface orientation. A surface of the single stack may further include a non-SOI region and/or at least one second SOI region. The non-SOI region may include bulk silicon that extends through all of the insulator layers of the single stack and has a thickness different than that of the first silicon layer. Each second SOI region has a second semiconductor layer having a thickness different than that of the first semiconductor layer and/or a different surface orientation than the first surface orientation. The substrate thus allows formation of different devices on optimal substrate regions that may include different surface orientations and/or different thicknesses and/or different bulk or SOI structures.

    摘要翻译： 公开了一种用于半导体器件的衬底，在一个实施例中，包括在单个堆叠中彼此结合的多个绝缘体上半导体（SOI）晶片。 堆叠的远端包括具有厚度和第一表面取向的第一半导体层的第一SOI区域。 单个堆叠的表面可以进一步包括非SOI区域和/或至少一个第二SOI区域。 非SOI区域可以包括延伸穿过单个堆叠的所有绝缘体层并且具有与第一硅层的厚度不同的厚度的体硅。 每个第二SOI区域具有与第一半导体层的厚度不同的第二半导体层和/或与第一表面取向不同的表面取向。 因此，衬底允许在可以包括不同表面取向和/或不同厚度和/或不同的体或SOI结构的最佳衬底区域上形成不同的器件。

    Densely patterned silicon-on-insulator (SOI) region on a wafer
    87.
    发明授权
    Densely patterned silicon-on-insulator (SOI) region on a wafer 失效
    在晶片上的密集图案化的绝缘体上硅（SOI）区域

    公开(公告)号：US06429488B2

    公开(公告)日：2002-08-06

    申请号：US09791273

    申请日：2001-02-22

    申请人： Effendi Leobandung ,  Devendra K. Sadana ,  Dominic J. Schepis ,  Ghavam G. Shahidi

    发明人： Effendi Leobandung ,  Devendra K. Sadana ,  Dominic J. Schepis ,  Ghavam G. Shahidi

    IPC分类号： H01L2712

    CPC分类号： H01L21/76264 ,  H01L21/762 ,  H01L21/76267 ,  H01L21/76275 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1207

    摘要： A process for making a SOI region and a bulk region in a semiconductor device. The process includes providing a SOI structure. The SOI structure has a thin silicon layer, a buried insulating oxide layer underlying the thin silicon layer, and a silicon substrate underlying the buried insulating oxide layer. Next, a nitride layer is deposited on top of the SOI structure. The SOI structure is exposed by selectively etching portions of the nitride layer. The portion of the nitride layer which is not etched forms the SOI region. The silicon substrate is exposed by selectively etching the remaining portion of the exposed SOI structure. An epitaxial layer is grown on top of the exposed silicon substrate to form the bulk region. The nitride portion above the SOI structure is finally removed.

    摘要翻译： 一种在半导体器件中制造SOI区域和体区的工艺。 该方法包括提供SOI结构。 SOI结构具有薄的硅层，位于薄硅层下面的掩埋绝缘氧化物层和位于掩埋绝缘氧化物层下面的硅衬底。 接下来，在SOI结构的顶部上沉积氮化物层。 通过选择性地蚀刻氮化物层的部分来暴露SOI结构。 未蚀刻的氮化物层的部分形成SOI区域。 通过选择性蚀刻暴露的SOI结构的剩余部分来暴露硅衬底。 在暴露的硅衬底的顶部上生长外延层以形成体区。 最终去除SOI结构之上的氮化物部分。

    Photoreceptor with improved blocking layer
    88.
    发明授权
    Photoreceptor with improved blocking layer 有权
    光感受器具有改进的阻挡层

    公开(公告)号：US09123842B2

    公开(公告)日：2015-09-01

    申请号：US13554886

    申请日：2012-07-20

    申请人： Bahman Hekmatshoartabari ,  Jeehwan Kim ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    发明人： Bahman Hekmatshoartabari ,  Jeehwan Kim ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    IPC分类号： H01L21/00 ,  H01L31/0352 ,  H01L31/103 ,  B82Y20/00

    CPC分类号： H01L31/035236 ,  B82Y20/00 ,  H01L31/1037

    摘要： A photoreceptor includes a multilayer blocking structure to reduce dark discharge of the surface voltage of the photoreceptor resulting from electron injection from an electrically conductive substrate. The multilayer blocking structure includes wide band gap semiconductor layers in alternating sequence with one or more narrow band gap blocking layers. A fabrication method of the photoreceptor includes transfer-doping of the narrow band gap blocking layers, which are deposited in alternating sequence with wide band gap semiconductor layers to form a blocking structure. Suppression of hole or electron injection can be obtained using the method.

    摘要翻译： 感光体包括多层阻挡结构，以减少由导电基底电子注入的感光体的表面电压的暗放电。 多层阻挡结构包括与一个或多个窄带隙阻挡层交替顺序的宽带隙半导体层。 感光体的制造方法包括：以宽带隙半导体层交替排列形成阻挡结构的窄带隙阻挡层的转移掺杂。 使用该方法可以获得空穴或电子注入的抑制。