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139 条记录 (耗时 0.033 秒)

    Fabrication method of multi-chip stack structure
    84.
    发明授权
    Fabrication method of multi-chip stack structure 有权
    多芯片堆叠结构的制作方法

    公开(公告)号：US07981729B2

    公开(公告)日：2011-07-19

    申请号：US12818701

    申请日：2010-06-18

    申请人： Jung-Pin Huang ,  Chin-Huang Chang ,  Chien-Ping Huang ,  Chung-Lun Liu ,  Cheng-Hsu Hsiao

    发明人： Jung-Pin Huang ,  Chin-Huang Chang ,  Chien-Ping Huang ,  Chung-Lun Liu ,  Cheng-Hsu Hsiao

    IPC分类号： H01L21/60

    CPC分类号： H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48496 ,  H01L2224/49175 ,  H01L2224/78 ,  H01L2224/85001 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/00

    摘要： A multi-chip stack structure and a fabrication method thereof are proposed, including providing a leadframe having a die base and a plurality of leads and disposing a first and a second chips on the two surfaces of the die base respectively; disposing the leadframe on a heating block having a cavity in a wire bonding process with the second chip received in the cavity of the heating block; performing a first wire bonding process to electrically connect the first chip to the leads through a plurality of first bonding wires, and forming a bump on one side of the leads connected with the first bonding wires; disposing the leadframe in an upside down manner to the heating block via the bump with the first chip and the first bonding wires received in the cavity of the heating block; and performing a second wire bonding process to electrically connect the second chip to the leads through a plurality of second bonding wires. The bump is used for supporting the leads to a certain height so as to keep the bonding wires from contacting the heating block and eliminate the need of using a second heating block in the second wire bonding process of the prior art, thereby saving time and costs in a fabrication process. Also, as positions where the first and second bonding wires are bonded to the leads on opposite sides of the leadframe correspond with each other, the conventional problems of adversely affected electrical performance and electrical mismatch can be prevented.

    摘要翻译： 提出了一种多芯片堆叠结构及其制造方法，包括提供具有芯片基底和多个引线的引线框架，并分别在模具基座的两个表面上设置第一和第二芯片; 将引线框架布置在具有引线接合工艺中的空腔的加热块上，第二芯片容纳在加热块的空腔中; 执行第一引线接合工艺，以通过多个第一接合线将第一芯片电连接到引线，以及在与第一接合线连接的引线的一侧上形成凸块; 通过第一芯片和第一接合线容纳在加热块的空腔中，通过凸块将引线框倒置放置到加热块， 以及执行第二引线接合处理，以通过多个第二接合线将所述第二芯片电连接到所述引线。 凸块用于将引线支撑到一定高度，以便使接合线不会接触加热块，并且在现有技术的第二引线接合过程中不需要使用第二加热块，从而节省了时间和成本 在制造过程中。 此外，由于第一和第二接合线与引线框架的相对侧上的引线接合的位置彼此对应，可以防止电性能和电不匹配受到不利影响的常规问题。

    Fabrication method of semiconductor package having heat dissipation device
    85.
    发明授权
    Fabrication method of semiconductor package having heat dissipation device 有权
    具有散热装置的半导体封装的制造方法

    公开(公告)号：US07759170B2

    公开(公告)日：2010-07-20

    申请号：US12710450

    申请日：2010-02-23

    申请人： Han-Ping Pu ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    发明人： Han-Ping Pu ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L21/00 ,  H01L23/34 ,  H05K7/20

    CPC分类号： H01L23/473 ,  H01L21/563 ,  H01L23/3157 ,  H01L2224/16225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253

    摘要： A semiconductor package with a heat dissipating device and a fabrication method of the semiconductor package are provided. A chip is mounted on a substrate. The heat dissipating device is mounted on the chip, and includes an accommodating room, and a first opening and a second opening that communicate with the accommodating room. An encapsulant is formed between the heat dissipating device and the substrate to encapsulate the chip. A cutting process is performed to remove a non-electrical part of structure and expose the first and second openings from the encapsulant. A cooling fluid is received in the accommodating room to absorb and dissipate heat produced by the chip. The heat dissipating device covers the encapsulant and the chip to provide a maximum heat transfer area for the semiconductor package.

    摘要翻译： 提供了具有散热装置的半导体封装和半导体封装的制造方法。 芯片安装在基板上。 散热装置安装在芯片上，并且包括容纳室，以及与容纳室连通的第一开口和第二开口。 在散热装置和衬底之间形成密封剂以封装芯片。 执行切割处理以去除结构的非电气部分并且从密封剂暴露第一和第二开口。 冷却流体容纳在容纳室中以吸收和散发由芯片产生的热量。 散热装置覆盖密封剂和芯片，以为半导体封装提供最大的传热面积。

    Sensor semiconductor device and manufacturing method thereof
    87.
    发明申请
    Sensor semiconductor device and manufacturing method thereof 审中-公开
    传感器半导体器件及其制造方法

    公开(公告)号：US20080296716A1

    公开(公告)日：2008-12-04

    申请号：US12151570

    申请日：2008-05-07

    申请人： Chang-Yueh Chan ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao ,  Chun-Chi Ke

    发明人： Chang-Yueh Chan ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao ,  Chun-Chi Ke

    IPC分类号： H01L21/50 ,  H01L23/00

    CPC分类号： H01L21/56 ,  H01L23/3114 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

    摘要： A sensor semiconductor device and a manufacturing method thereof are disclosed. The method includes: providing a light-permeable carrier board with a plurality of metallic circuits; electrically connecting the metallic circuits to a plurality of sensor chips through conductive bumps formed on the bond pads of the sensor chips, wherein the sensor chips have been previously subjected to thinning and chip probing; filling a first dielectric layer between the sensor chips to cover the metallic circuits and peripheries of the sensor chips; forming a second dielectric layer on the sensor chips and the first dielectric layer; forming grooves between the sensor chips for exposing the metallic circuits such that a plurality of conductive traces electrically connected to the metallic circuits can be formed on the second dielectric layer; and singulating the sensor chips to form a plurality of sensor semiconductor devices. The present invention overcomes the drawbacks of breakage of trace connection due to a sharp angle formed at joints, poor electrical connection and chip damage due to an alignment error in cutting from the back of the wafer, as well as an increased cost due to multiple sputtering processes for forming traces.

    摘要翻译： 公开了一种传感器半导体器件及其制造方法。 该方法包括：提供具有多个金属电路的透光性载板; 通过形成在传感器芯片的接合焊盘上的导电凸块将金属电路电连接到多个传感器芯片，其中传感器芯片已经预先经受了薄化和芯片探测; 在传感器芯片之间填充第一电介质层以覆盖金属电路和传感器芯片的周边; 在所述传感器芯片和所述第一介电层上形成第二电介质层; 在所述传感器芯片之间形成用于暴露所述金属电路的槽，使得可以在所述第二介电层上形成电连接到所述金属电路的多个导电迹线; 并且分离传感器芯片以形成多个传感器半导体器件。 本发明克服了由于在接头处形成的尖角导致的迹线连接断裂的缺点，由于从晶片背面的切割中的对准误差导致的不良电连接和芯片损坏以及由于多次溅射而导致的成本增加 形成痕迹的过程。

    Sensor-type semiconductor device and manufacturing method thereof
    88.
    发明申请
    Sensor-type semiconductor device and manufacturing method thereof 审中-公开
    传感器型半导体器件及其制造方法

    公开(公告)号：US20080237767A1

    公开(公告)日：2008-10-02

    申请号：US12080002

    申请日：2008-03-31

    申请人： Chang-Yueh Chan ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

    发明人： Chang-Yueh Chan ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L31/0203 ,  H01L31/18

    CPC分类号： H01L27/14618 ,  B81C1/00888 ,  B81C2203/0118 ,  H01L23/3114 ,  H01L24/11 ,  H01L27/14683 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01023

    摘要： A sensor-type semiconductor device and manufacturing method thereof are disclosed. The method includes providing a wafer comprising a plurality of sensor chips; forming concave grooves between the solder pads formed on the active surface of adjacent sensor chips; filling a filling material into the concave grooves and forming first conductive circuits electrically connecting the solder pads of adjacent sensor chips; mounting a light permeable body on the active surface of the wafer and thinning the non-active surface of the wafer to expose the filling material; mounting the wafer on a carrier board with second conductive circuits formed thereon corresponding in position to the filling material; forming first openings by cutting the light permeable body and the wafer to a position at which the second conductive circuits are located; forming metallic layers in the first openings by electroplating, the metallic layers electrically connecting the first and second conductive circuits of adjacent sensor chips; forming second openings by cutting the metallic layers to break the first conductive circuit connections and the second conductive circuit connections of adjacent sensor chips and meanwhile keep the first and second conductive circuits of each sensor chip still electrically connected through the metallic layers; filling a dielectric material into the second openings and removing the carrier board; and separating each of the sensor chips to form a plurality of sensor-type semiconductor devices. The invention overcomes the drawbacks of the prior art such as slanting notches formed on the non-active surface of the wafer, displacement of the notches due to the difficulty in precise alignment, as well as broken joints caused by concentrated stress generated in the slanting notches and exposed circuits.

    摘要翻译： 公开了一种传感器型半导体器件及其制造方法。 该方法包括提供包括多个传感器芯片的晶片; 在形成在相邻传感器芯片的有效表面上的焊盘之间形成凹槽; 将填充材料填充到凹槽中并形成电连接相邻传感器芯片的焊盘的第一导电电路; 将透光体安装在晶片的活性表面上并使晶片的非活性表面变薄以暴露填充材料; 将晶片安装在载体板上，其上形成有对应于位于填充材料的第二导电电路; 通过将透光体和晶片切割到第二导电电路所在的位置来形成第一开口; 通过电镀在第一开口中形成金属层，金属层电连接相邻传感器芯片的第一和第二导电电路; 通过切割金属层来形成第二开口，以破坏相邻传感器芯片的第一导电电路连接和第二导电电路连接，同时保持每个传感器芯片的第一和第二导电电路通过金属层电连接; 将电介质材料填充到第二开口中并移除载体板; 并分离每个传感器芯片以形成多个传感器型半导体器件。 本发明克服了现有技术的缺点，例如在晶片的非活性表面上形成的倾斜凹口，由于难以精确对准而导致的凹口位移以及由倾斜凹口产生的集中应力引起的断裂接头 和暴露电路。