公开(公告)号：US20230317853A1

公开(公告)日：2023-10-05

申请号：US18328788

申请日：2023-06-05

申请人： Japan Display Inc.

发明人： Hajime WATAKABE ,  Tomoyuki ITO ,  Toshihide JINNAI ,  lsao SUZUMURA ,  Akihiro HANADA ,  Ryo ONODERA

IPC分类号： H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L29/423 ,  H01L29/49 ,  H01L21/02 ,  H01L21/426 ,  H01L21/4757 ,  H01L21/4763 ,  H01L29/66

CPC分类号： H01L29/78627 ,  H01L27/124 ,  H01L27/1251 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78633 ,  H01L29/78675 ,  H01L29/7869 ,  H01L27/127 ,  H01L21/02178 ,  H01L21/02565 ,  H01L21/426 ,  H01L21/47573 ,  H01L21/47635 ,  H01L29/66969 ,  H01L27/1225 ,  G02F1/1368

摘要： A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.

公开(公告)号：US20230178655A1

公开(公告)日：2023-06-08

申请号：US18074756

申请日：2022-12-05

申请人： Xiamen Tianma Display Technology Co., Ltd.

发明人： Jun TANAKA ,  Kazushige TAKECHI ,  Kenji SERA

IPC分类号： H01L29/786 ,  H01L21/426 ,  H01L29/66

CPC分类号： H01L29/7869 ,  H01L29/78648 ,  H01L29/78618 ,  H01L29/78696 ,  H01L21/426 ,  H01L29/66969 ,  H01L27/3262

摘要： An oxide semiconductor thin-film transistor device includes a gate electrode region, an oxide semiconductor region, a first source/drain electrode region, and a second source/drain electrode region. The oxide semiconductor region has a concentration distribution of an element capable of increasing resistance of an oxide semiconductor. The concentration distribution shows a first concentration at the centroid of a channel region overlapping the gate electrode region in a planar view. The concentration distribution shows a concentration higher than the first concentration in a vicinity of at least a part of a boundary defining an outer end of the channel region.

公开(公告)号：US20230148156A1

公开(公告)日：2023-05-11

申请号：US18095260

申请日：2023-01-10

申请人： Infineon Technologies AG

发明人： Andreas Peter Meiser ,  Caspar Leendertz ,  Anton Mauder

IPC分类号： H01L29/16 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/808 ,  H01L29/739 ,  H01L29/40 ,  H01L29/423 ,  H01L21/308 ,  H01L21/31 ,  H01L21/04 ,  H01L21/311 ,  H01L21/426 ,  H01L21/02 ,  H01L21/033

CPC分类号： H01L29/1608 ,  H01L29/66924 ,  H01L29/0615 ,  H01L29/66734 ,  H01L29/7813 ,  H01L29/8083 ,  H01L29/7397 ,  H01L29/0623 ,  H01L29/407 ,  H01L29/66348 ,  H01L29/4236 ,  H01L21/3083 ,  H01L21/31 ,  H01L21/0415 ,  H01L21/311 ,  H01L21/426 ,  H01L21/046 ,  H01L21/02019 ,  H01L21/0334

摘要： A semiconductor component includes: a SiC semiconductor body; a trench extending from a first surface of the SiC semiconductor body into the SiC semiconductor body, the trench having a conductive connection structure, a structure width at a bottom of the trench, and a dielectric layer covering sidewalls of the trench; a shielding region along the bottom and having a central section which has a lateral first width; and a contact formed between the conductive connection structure and the shielding region. The conductive connection structure is electrically connected to a source electrode. In at least one doping plane extending approximately parallel to the bottom, a dopant concentration in the central section deviates by not more than 10% from a maximum value of the dopant concentration in the shielding region in the doping plane. The first width is less than the structure width and is at least 30% of the structure width.

公开(公告)号：US11600701B2

公开(公告)日：2023-03-07

申请号：US17223645

申请日：2021-04-06

申请人： Infineon Technologies AG

发明人： Andreas Peter Meiser ,  Caspar Leendertz ,  Anton Mauder

IPC分类号： H01L29/16 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/808 ,  H01L29/739 ,  H01L29/40 ,  H01L29/423 ,  H01L21/308 ,  H01L21/31 ,  H01L21/04 ,  H01L21/311 ,  H01L21/426 ,  H01L21/02 ,  H01L21/033

摘要： A silicon carbide substrate has a trench extending from a main surface of the silicon carbide substrate into the silicon carbide substrate. The trench has a trench width at a trench bottom. A shielding region is formed in the silicon carbide substrate. The shielding region extends along the trench bottom. In at least one doping plane extending approximately parallel to the trench bottom, a dopant concentration in the shielding region over a lateral first width deviates by not more than 10% from a maximum value of the dopant concentration. The first width is less than the trench width and is at least 30% of the trench width.

公开(公告)号：US11552111B2

公开(公告)日：2023-01-10

申请号：US17043232

申请日：2019-04-08

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei Yamazaki ,  Kenichi Okazaki ,  Masami Jintyou ,  Yukinori Shima

IPC分类号： H01L27/00 ,  H01L29/00 ,  H01L27/12 ,  H01L21/426

摘要： A semiconductor device having favorable and stable electrical characteristics is provided. The semiconductor device includes a first and a second transistor over an insulating surface. The first and the second transistors each include a first insulating layer, a semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, and a first conductive layer overlapping with the semiconductor layer with the second insulating layer interposed therebetween. The first insulating layer includes a convex first region that overlaps with the semiconductor layer and a second region that does not and is thinner than the first region. The first conductive layer includes a part over the second region where a lower surface of the first conductive layer is positioned below a lower surface of the semiconductor layer. The second transistor further includes a third conductive layer overlapping with the semiconductor layer with the first insulating layer interposed therebetween.

公开(公告)号：US11374117B2

公开(公告)日：2022-06-28

申请号：US16971061

申请日：2019-02-22

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Kenichi Okazaki ,  Yukinori Shima

IPC分类号： H01L29/786 ,  H01L29/66 ,  G02F1/1368 ,  H01L21/426 ,  H01L21/4763 ,  H01L27/12 ,  H01L21/02 ,  H01L21/385

摘要： A semiconductor device having favorable electrical characteristics is provided. The semiconductor device is manufactured by a first step of forming a semiconductor layer containing a metal oxide, a second step of forming a first insulating layer, a third step of forming a first conductive film over the first insulating layer, a fourth step of etching part of the first conductive film to form a first conductive layer, thereby forming a first region over the semiconductor layer that overlaps with the first conductive layer and a second region over the semiconductor layer that does not overlap with the first conductive layer, and a fifth step of performing first treatment on the conductive layer. The first treatment is plasma treatment in an atmosphere including a mixed gas of a first gas containing an oxygen element but not containing a hydrogen element, and a second gas containing a hydrogen element but not containing an oxygen element.

公开(公告)号：US20220029026A1

公开(公告)日：2022-01-27

申请号：US17499908

申请日：2021-10-13

申请人： Japan Display Inc.

发明人： Hajime WATAKABE ,  Tomoyuki ITO ,  Toshihide JINNAI ,  lsao SUZUMURA ,  Akihiro HANADA ,  Ryo ONODERA

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L27/12 ,  H01L29/66 ,  H01L21/4763 ,  H01L29/49 ,  H01L21/426 ,  H01L29/423 ,  H01L29/24 ,  H01L21/4757 ,  G02F1/1368

摘要： A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.

公开(公告)号：US11101357B2

公开(公告)日：2021-08-24

申请号：US16983764

申请日：2020-08-03

申请人： Tessera, Inc.

发明人： Anthony I. Chou ,  Arvind Kumar ,  Chung-Hsun Lin ,  Shreesh Narasimha ,  Claude Ortolland ,  Jonathan T. Shaw

IPC分类号： H01L29/423 ,  H01L29/51 ,  H01L21/265 ,  H01L29/66 ,  H01L21/28 ,  H01L21/02 ,  H01L21/426 ,  H01L21/8234 ,  H01L21/3115 ,  H01L21/324 ,  H01L21/84 ,  H01L29/40 ,  H01L29/78 ,  H01L21/283 ,  H01L21/308 ,  H01L29/417

摘要： An asymmetric high-k dielectric for reduced gate induced drain leakage in high-k MOSFETs and methods of manufacture are disclosed. The method includes performing an implant process on a high-k dielectric sidewall of a gate structure. The method further includes performing an oxygen annealing process to grow an oxide region on a drain side of the gate structure, while inhibiting oxide growth on a source side of the gate structure adjacent to a source region.

公开(公告)号：US10818780B2

公开(公告)日：2020-10-27

申请号：US16570663

申请日：2019-09-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jean-Pierre Colinge ,  Carlos H. Diaz ,  Yee-Chia Yeo

IPC分类号： H01L29/24 ,  H01L29/66 ,  H01L29/267 ,  H01L29/78 ,  H01L27/088 ,  H01L29/04 ,  H01L21/02 ,  H01L29/10 ,  H01L21/477 ,  H01L21/8234 ,  H01L21/8256 ,  H01L29/786 ,  H01L27/06 ,  H01L21/8258 ,  H01L27/12 ,  H01L29/423 ,  H01L21/426 ,  H01L21/441 ,  H01L21/461 ,  H01L21/762 ,  H01L21/768 ,  H01L29/06 ,  H01L29/08 ,  H01L21/8238 ,  H01L27/092

摘要： Devices, and methods of forming such devices, having a material that is semimetal when in bulk but is a semiconductor in the devices are described. An example structure includes a substrate, a first source/drain contact region, a channel structure, a gate dielectric, a gate electrode, and a second source/drain contact region. The substrate has an upper surface. The channel structure is connected to and over the first source/drain contact region, and the channel structure is over the upper surface of the substrate. The channel structure has a sidewall that extends above the first source/drain contact region. The channel structure comprises a bismuth-containing semiconductor material. The gate dielectric is along the sidewall of the channel structure. The gate electrode is along the gate dielectric. The second source/drain contact region is connected to and over the channel structure.

公开(公告)号：US10734492B2

公开(公告)日：2020-08-04

申请号：US16440106

申请日：2019-06-13

申请人： TESSERA, INC.

发明人： Anthony I. Chou ,  Arvind Kumar ,  Chung-Hsun Lin ,  Shreesh Narasimha ,  Claude Ortolland ,  Jonathan T. Shaw

IPC分类号： H01L29/423 ,  H01L29/51 ,  H01L21/265 ,  H01L29/66 ,  H01L21/28 ,  H01L21/02 ,  H01L21/426 ,  H01L21/8234 ,  H01L21/3115 ,  H01L21/324 ,  H01L21/84 ,  H01L29/78 ,  H01L21/283 ,  H01L21/308 ,  H01L29/417

摘要： An asymmetric high-k dielectric for reduced gate induced drain leakage in high-k MOSFETs and methods of manufacture are disclosed. The method includes performing an implant process on a high-k dielectric sidewall of a gate structure. The method further includes performing an oxygen annealing process to grow an oxide region on a drain side of the gate structure, while inhibiting oxide growth on a source side of the gate structure adjacent to a source region.