DEVICE FOR HOLDING A PACKAGE SUBSTRATE WITH REDUCED WARPAGE

    公开(公告)号:US20240347373A1

    公开(公告)日:2024-10-17

    申请号:US18636304

    申请日:2024-04-16

    IPC分类号: H01L21/687 H01L21/68

    CPC分类号: H01L21/68785 H01L21/68

    摘要: A device for holding a package substrate is provided. The device comprises: a lower jig comprising a base material, and magnets embedded within the base material; and an upper jig comprising a frame and a grid pattern inside the frame, wherein the frame has a skirt portion that defines a gap between the lower jig and the grid pattern to accommodate the package substrate, and wherein the grid pattern is attractable by the magnets such that when the upper jig is placed on the lower jig to accommodate the package substrate the grid pattern is in contact with the package substrate to apply a pressure to the package substrate due to a magnetic interaction between the magnets and the grid pattern.

    METHOD FOR FORMING A SHIELDING LAYER ON A SEMICONDUCTOR DEVICE

    公开(公告)号:US20240332209A1

    公开(公告)日:2024-10-03

    申请号:US18603185

    申请日:2024-03-12

    摘要: A method for forming a shielding layer to a semiconductor device, wherein the semiconductor device comprises a substrate, one or more electronic components on a front surface of the substrate, an encapsulant layer on the front surface of the substrate that covers the one or more electronic components and one or more connectors on a back surface of the substrate, the method comprising: applying a coating layer onto the back surface of the substrate to cover the one or more connectors; attaching the coating layer onto a tape to load the semiconductor device to the tape, wherein the attachment between the coating layer and the tape is stronger than the attachment between the coating layer and the back surface of the substrate as well as the one or more connectors; forming the shielding layer onto the encapsulant layer to cover the one or more electronic components; and unloading the semiconductor device from the tape, wherein the coating layer is left on the tape.

    Semiconductor Device and Method of Forming RDL with Graphene-Coated Core

    公开(公告)号:US20240234291A1

    公开(公告)日:2024-07-11

    申请号:US18150567

    申请日:2023-01-05

    摘要: A semiconductor device has a one-layer interconnect substrate and electrical component disposed over a first surface of the interconnect substrate. The electrical components can be discrete electrical devices, IPDs, semiconductor die, semiconductor packages, surface mount devices, and RF components. An RDL with a graphene core shell is formed over a second surface of the interconnect substrate. The graphene core shell has a copper core and a graphene coating formed over the copper core. The RDL further has a matrix to embed the graphene core shell. The graphene core shells through RDL form an electrical path. The RDL can be thermoset material or polymer or composite epoxy type matrix. The graphene core shell is embedded within the thermoset material or polymer or composite epoxy type matrix. The RDL with graphene core shell is useful for electrical conductivity and electrical interconnect within an SIP.