公开(公告)号：US08835319B2

公开(公告)日：2014-09-16

申请号：US13410751

申请日：2012-03-02

Applicant: Dirk Meinhold ,  Norbert Mais ,  Reimund Engl ,  Hans-Joerg Timme ,  Alfred Vater ,  Stephan Henneck ,  Norbert Urbansky

Inventor： Dirk Meinhold ,  Norbert Mais ,  Reimund Engl ,  Hans-Joerg Timme ,  Alfred Vater ,  Stephan Henneck ,  Norbert Urbansky

IPC: H01L23/488 ,  H01L21/283

CPC classification number: H01L23/564 ,  H01L21/7685 ,  H01L21/76852 ,  H01L23/53219 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48824 ,  H01L2224/4911 ,  H01L2924/01015 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/20752

Abstract: In one embodiment, a method of forming a semiconductor device includes forming a metal line over a substrate and depositing an alloying material layer over a top surface of the metal line. The method further includes forming a protective layer by combining the alloying material layer with the metal line.

Abstract translation: 在一个实施例中，形成半导体器件的方法包括在衬底上形成金属线，并在金属线的顶表面上沉积合金材料层。 该方法还包括通过将合金材料层与金属线组合来形成保护层。

公开(公告)号：US20130200786A1

公开(公告)日：2013-08-08

申请号：US13366147

申请日：2012-02-03

Applicant: Dirk Meinhold

Inventor： Dirk Meinhold

IPC: H01J17/49 ,  H01J61/04 ,  H01L21/28

CPC classification number: H01J9/02 ,  H01J11/32 ,  H01J2211/326

Abstract: A plasma cell and a method for making a plasma cell are disclosed. In accordance with an embodiment of the present invention, a cell comprises a semiconductor material, an opening disposed in the semiconductor material, a dielectric layer lining a surface of the opening, a cap layer closing the opening, a first electrode disposed adjacent the opening, and a second electrode disposed adjacent the opening.

Abstract translation: 公开了等离子体电池和制造等离子体电池的方法。 根据本发明的实施例，电池包括半导体材料，设置在半导体材料中的开口，衬在开口表面上的电介质层，封闭开口的盖层，邻近开口设置的第一电极， 以及邻近开口设置的第二电极。

公开(公告)号：US08278727B2

公开(公告)日：2012-10-02

申请号：US12651623

申请日：2010-01-04

Applicant: Thoralf Kautzsch ,  Marco Müller ,  Dirk Meinhold ,  Ben Rosam ,  Klaus Elian ,  Stefan Kolb

Inventor： Thoralf Kautzsch ,  Marco Müller ,  Dirk Meinhold ,  Ben Rosam ,  Klaus Elian ,  Stefan Kolb

IPC: G01L9/00

CPC classification number: B81C1/00071 ,  B81B2201/0264 ,  G01L9/0042

Abstract: A method for providing a pressure sensor substrate comprises creating a first cavity that extends inside the substrate in a first direction perpendicular to a main surface of the substrate, and that extends inside the substrate, in a second direction perpendicular to the first direction, into a first venting area of the substrate; creating a second cavity that extends in the first direction inside the substrate, that extends in parallel to the first cavity in the second direction, and that does not extend into the first venting area; and opening the first cavity in the first venting area.

Abstract translation: 一种用于提供压力传感器基板的方法包括：在垂直于基板的主表面的第一方向上形成在基板内延伸的第一空腔，并且在垂直于第一方向的第二方向上延伸到基板的内部， 基板的第一通气区域; 形成第二空腔，该第二空腔沿第一方向在基板内延伸，该第二空腔在第二方向上平行于第一空腔延伸，并且不延伸到第一排气区域; 并打开第一个通风区域的第一个空腔。

公开(公告)号：US20130001712A1

公开(公告)日：2013-01-03

申请号：US13612042

申请日：2012-09-12

Applicant: Thoralf Kautzsch ,  Bernhard Winkler ,  Dirk Meinhold ,  Ben Rosam ,  Bernd Foeste ,  Andreas Thamm ,  Boris Binder

Inventor： Thoralf Kautzsch ,  Bernhard Winkler ,  Dirk Meinhold ,  Ben Rosam ,  Bernd Foeste ,  Andreas Thamm ,  Boris Binder

IPC: H01L29/84 ,  H01L21/02

CPC classification number: G01P15/125 ,  B81B2201/0235 ,  B81C1/00182 ,  G01P15/0802

Abstract: A semiconductor device includes a semiconductor substrate and a semiconductor mass element configured to move in response to an applied acceleration. The mass element is defined by trenches etched into the semiconductor substrate and a cavity below the mass element. The semiconductor device includes a sensing element configured to sense movement of the mass element.

Abstract translation: 半导体器件包括半导体衬底和配置为响应于所施加的加速度而移动的半导体质量元件。 质量元件由蚀刻到半导体衬底中的沟槽和质量元件下方的空腔限定。 半导体器件包括感测元件，其被配置为感测质量元件的移动。

公开(公告)号：US20120080795A1

公开(公告)日：2012-04-05

申请号：US12894189

申请日：2010-09-30

Applicant: Gerald DALLMANN ,  Dirk MEINHOLD ,  Alfred VATER

Inventor： Gerald DALLMANN ,  Dirk MEINHOLD ,  Alfred VATER

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L23/48 ,  H01L21/768 ,  H01L21/76831 ,  H01L21/76885 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: One or more embodiments relate to a method for forming a semiconductor structure, comprising: providing a workpiece; forming a dielectric barrier layer over the workpiece; forming an opening through the dielectric barrier layer; forming a seed layer over the dielectric barrier layer and within the dielectric barrier layer opening; and electroplating a first fill layer on the seed layer.

Abstract translation: 一个或多个实施例涉及一种用于形成半导体结构的方法，包括：提供工件; 在工件上形成介电阻挡层; 形成通过介电阻挡层的开口; 在所述电介质阻挡层之上和所述电介质阻挡层开口内形成籽晶层; 并在种子层上电镀第一填充层。

公开(公告)号：US08404597B2

公开(公告)日：2013-03-26

申请号：US11937681

申请日：2007-11-09

Applicant: Lothar Brencher ,  Dirk Meinhold ,  Michael Hartenberger ,  Georg Seidemann ,  Wolfgang Dickenscheld

Inventor： Lothar Brencher ,  Dirk Meinhold ,  Michael Hartenberger ,  Georg Seidemann ,  Wolfgang Dickenscheld

IPC: H01L21/302

CPC classification number: H01L21/76832 ,  H01L21/3083 ,  H01L21/31116 ,  H01L21/32136 ,  H01L21/76802 ,  H01L21/76804 ,  H01L21/76877

Abstract: A method for etching a layer assembly, the layer assembly including an intermediate layer sandwiched between an etch layer and a stop layer, the method including a step of etching the etch layer using a first etchant and a step of etching the intermediate layer using a second etchant. The first etchant includes a first etch selectivity of at least 5:1 with respect to the etch layer and the intermediate layer. The second etchant includes a second etch selectivity of at least 5:1 with respect to the intermediate layer and the stop layer. The first etchant being different from the second etchant.

Abstract translation: 一种用于蚀刻层组件的方法，所述层组件包括夹在蚀刻层和阻挡层之间的中间层，所述方法包括使用第一蚀刻剂蚀刻所述蚀刻层的步骤，以及使用第二蚀刻剂蚀刻所述中间层的步骤 蚀刻剂 第一蚀刻剂包括相对于蚀刻层和中间层至少5:1的第一蚀刻选择性。 第二蚀刻剂包括相对于中间层和停止层至少5:1的第二蚀刻选择性。 第一蚀刻剂不同于第二蚀刻剂。

公开(公告)号：US20120267694A1

公开(公告)日：2012-10-25

申请号：US13089379

申请日：2011-04-19

Applicant: Dieter Kaiser ,  Dirk Meinhold ,  Thoralf Kautzsch ,  Georg Holfeld

Inventor： Dieter Kaiser ,  Dirk Meinhold ,  Thoralf Kautzsch ,  Georg Holfeld

IPC: H01L31/113 ,  H01L27/146

CPC classification number: H01L27/14621 ,  H01L27/1443 ,  H01L27/14614 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14685 ,  H01L31/02327

Abstract: An integrated circuit arrangement is provided, including a transistor including a gate region; and a wavelength conversion element, wherein the wavelength conversion element may include the same material or same materials as the gate region of the transistor.

Abstract translation: 提供一种集成电路装置，包括：包括栅极区域的晶体管; 以及波长转换元件，其中所述波长转换元件可以包括与所述晶体管的栅极区域相同的材料或相同的材料。

公开(公告)号：US08266962B2

公开(公告)日：2012-09-18

申请号：US12361212

申请日：2009-01-28

Applicant: Thoralf Kautzsch ,  Bernhard Winkler ,  Dirk Meinhold ,  Ben Rosam ,  Bernd Foeste ,  Andreas Thamm ,  Boris Binder

Inventor： Thoralf Kautzsch ,  Bernhard Winkler ,  Dirk Meinhold ,  Ben Rosam ,  Bernd Foeste ,  Andreas Thamm ,  Boris Binder

IPC: G01P15/125 ,  H01L29/84 ,  H01L21/02

CPC classification number: G01P15/125 ,  B81B2201/0235 ,  B81C1/00182 ,  G01P15/0802

Abstract: A semiconductor device includes a semiconductor substrate and a semiconductor mass element configured to move in response to an applied acceleration. The mass element is defined by trenches etched into the semiconductor substrate and a cavity below the mass element. The semiconductor device includes a sensing element configured to sense movement of the mass element and a complementary metal-oxide-semiconductor (CMOS) circuit formed on the substrate.

Abstract translation: 半导体器件包括半导体衬底和配置为响应于所施加的加速度而移动的半导体质量元件。 质量元件由蚀刻到半导体衬底中的沟槽和质量元件下方的空腔限定。 半导体器件包括感测元件，其被配置为感测质量元件的移动和形成在衬底上的互补金属氧化物半导体（CMOS）电路。

公开(公告)号：US20100058876A1

公开(公告)日：2010-03-11

申请号：US12208897

申请日：2008-09-11

Applicant: Thoralf Kautzsch ,  Boris Binder ,  Dirk Meinhold ,  Ben Rosam ,  Bernd Foeste ,  Andreas Thamm

Inventor： Thoralf Kautzsch ,  Boris Binder ,  Dirk Meinhold ,  Ben Rosam ,  Bernd Foeste ,  Andreas Thamm

IPC: G01L9/00 ,  H01L21/304 ,  H01L21/311 ,  H01L21/306

CPC classification number: G01L9/0098 ,  G01L9/0052 ,  G01L9/0073 ,  G01L13/025 ,  G01L15/00

Abstract: A semiconductor device includes a first cavity within a semiconductor substrate and a second cavity within the semiconductor substrate. The second cavity is open to an atmosphere and defines a first lamella between the first cavity and the second cavity. The semiconductor device includes a first sense element configured for sensing a pressure on the first lamella.

Abstract translation: 半导体器件包括半导体衬底内的第一腔和半导体衬底内的第二腔。 第二腔向大气开放，并且在第一腔和第二腔之间限定第一薄片。 半导体器件包括被配置为感测第一薄片上的压力的第一感测元件。

公开(公告)号：US09202832B2

公开(公告)日：2015-12-01

申请号：US13089379

申请日：2011-04-19

Applicant: Dieter Kaiser ,  Dirk Meinhold ,  Thoralf Kautzsch ,  Georg Holfeld

Inventor： Dieter Kaiser ,  Dirk Meinhold ,  Thoralf Kautzsch ,  Georg Holfeld

IPC: H01L27/146 ,  H01L31/0232 ,  H01L27/144

CPC classification number: H01L27/14621 ,  H01L27/1443 ,  H01L27/14614 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14685 ,  H01L31/02327

Abstract: An integrated circuit arrangement is provided, including a transistor including a gate region; and a wavelength conversion element, wherein the wavelength conversion element may include the same material or same materials as the gate region of the transistor.

Abstract translation: 提供一种集成电路装置，包括：包括栅极区域的晶体管; 以及波长转换元件，其中所述波长转换元件可以包括与所述晶体管的栅极区域相同的材料或相同的材料。