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    Conductive structures for microfeature devices and methods for fabricating microfeature devices
    3.
    发明授权
    Conductive structures for microfeature devices and methods for fabricating microfeature devices 有权
    用于微特征器件的导电结构和用于制造微特征器件的方法

    公开(公告)号：US08222727B2

    公开(公告)日：2012-07-17

    申请号：US12613413

    申请日：2009-11-05

    申请人： Mark S. Johnson

    发明人： Mark S. Johnson

    IPC分类号： H01L23/04

    CPC分类号： H05K3/428 ,  H01L21/4857 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/16227 ,  H05K1/0287 ,  H05K3/108 ,  H05K2201/09609 ,  H05K2201/10378

    摘要： Methods for fabricating conductive structures on and/or in interposing devices and microfeature devices that are formed using such methods are disclosed herein. In one embodiment, a method for fabricating interposer devices having substrates includes forming a plurality of conductive sections on a first substrate in a first pattern. The method continues by forming a plurality of conductive sections on a second substrate in a second pattern. The method further includes constructing a plurality of conductive lines in a common third pattern on both the first substrate and the second substrate. The conductive lines can be formed on the first and second substrates either before or after forming the first pattern of conductive sections on the first substrate and/or forming the second pattern of conductive sections on the second substrate.

    摘要翻译： 在此公开了使用这种方法形成的在和/或介入装置和微特征装置之间的导电结构的制造方法。 在一个实施例中，一种用于制造具有衬底的插入器器件的方法包括以第一图案在第一衬底上形成多个导电部分。 该方法通过在第二图案的第二基板上形成多个导电部分来继续。 该方法还包括在第一基板和第二基板上在公共第三图案中构造多条导线。 导电线可以在形成第一衬底上的第一导电部分图案之前或之后形成在第一衬底和第二衬底上，和/或在第二衬底上形成导电部分的第二图案。

    Conductive structures for microfeature devices and methods for fabricating microfeature devices
    7.
    发明授权
    Conductive structures for microfeature devices and methods for fabricating microfeature devices 有权
    用于微特征器件的导电结构和用于制造微特征器件的方法

    公开(公告)号：US07632747B2

    公开(公告)日：2009-12-15

    申请号：US10922184

    申请日：2004-08-19

    申请人： Mark S. Johnson

    发明人： Mark S. Johnson

    IPC分类号： H01L21/44

    CPC分类号： H05K3/428 ,  H01L21/4857 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/16227 ,  H05K1/0287 ,  H05K3/108 ,  H05K2201/09609 ,  H05K2201/10378

    摘要： Methods for fabricating conductive structures on and/or in interposing devices and microfeature devices that are formed using such methods are disclosed herein. In one embodiment, a method for fabricating interposer devices having substrates includes forming a plurality of conductive sections on a first substrate in a first pattern. The method continues by forming a plurality of conductive sections on a second substrate in a second pattern. The method further includes constructing a plurality of conductive lines in a common third pattern on both the first substrate and the second substrate. The conductive lines can be formed on the first and second substrates either before or after forming the first pattern of conductive sections on the first substrate and/or forming the second pattern of conductive sections on the second substrate.

    摘要翻译： 在此公开了使用这种方法形成的在和/或介入装置和微特征装置之间的导电结构的制造方法。 在一个实施例中，一种用于制造具有衬底的插入器器件的方法包括以第一图案在第一衬底上形成多个导电部分。 该方法通过在第二图案的第二基板上形成多个导电部分来继续。 该方法还包括在第一基板和第二基板上在公共第三图案中构造多条导线。 导电线可以在形成第一衬底上的第一导电部分图案之前或之后形成在第一衬底和第二衬底上，和/或在第二衬底上形成导电部分的第二图案。

    Plating buss and a method of use thereof
    8.
    发明授权
    Plating buss and a method of use thereof 失效
    电镀母线及其使用方法

    公开(公告)号：US07608788B2

    公开(公告)日：2009-10-27

    申请号：US11869204

    申请日：2007-10-09

    申请人： Mark S. Johnson

    发明人： Mark S. Johnson

    IPC分类号： H01R12/04 ,  H05K1/11

    CPC分类号： H05K3/242 ,  H05K3/0052 ,  H05K2201/09263 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

    摘要： The present invention relates generally to a plating buss design and method for minimizing short circuit problems in PCB panel singulation. More particularly, the invention encompasses a serpentine plating buss which increases the PCB singulation process window thereby minimizing short circuit problems due to indexing errors caused by occasional manufacturing and equipment alignment problems. The serpentine plating buss design therefore increases board yield.

    摘要翻译： 本发明一般涉及一种用于最小化PCB面板单片化中的短路问题的电镀总线设计和方法。 更具体地，本发明包括蛇形电镀母线，其增加了PCB分割工艺窗口，从而由于由于偶然的制造和设备对准问题引起的分度误差而使短路问题最小化。 蛇形电镀母线设计因此增加了板材的产量。

    Precision Fiducial
    9.
    发明授权
    Precision Fiducial 失效
    精密基准

    公开(公告)号：US06820525B2

    公开(公告)日：2004-11-23

    申请号：US10269603

    申请日：2002-10-11

    申请人： Mark S. Johnson

    发明人： Mark S. Johnson

    IPC分类号： G03F900

    CPC分类号： H05K1/0269 ,  H01L23/544 ,  H01L2223/54473 ,  H01L2924/0002 ,  H05K3/0002 ,  H05K3/0052 ,  H05K3/064 ,  H05K2201/09781 ,  H05K2201/09918 ,  Y10T83/04 ,  H01L2924/00

    摘要： A fiducial includes complementary patterns that are situated symmetrically about a common axis. The complementary patterns permit location of the common axis as an axis that is equidistant from the complementary patterns. The complementary patterns are displaced from the common axes by different distances so that the common axis is located using the complementary patterns nearest the common axis to accurately locate the common axis. The complementary patterns include etch-compensation features that permit the common axis to be accurately located even if an etch process defines the fiducial and the etch process exhibits a process error or variation such as underetching or overetching. The fiducial may be produced by transferring a fiducial pattern from a mask such as a photomask. The fiducial pattern may also be defined on the mask using a computer-aided design program.

    摘要翻译： 基准包括对称关于共同轴线的互补图案。 互补图形允许公共轴的位置作为与互补图案等距的轴。 互补图案从公共轴线移位不同的距离，使得公共轴线使用最接近公共轴线的互补图案来定位，以精确定位公共轴线。 互补图案包括允许公共轴准确定位的蚀刻补偿特征，即使蚀刻工艺限定基准并且蚀刻工艺表现出过程误差或变化，例如不平整或过蚀刻。 可以通过从诸如光掩模的掩模转移基准图来产生基准。 也可以使用计算机辅助设计程序在掩模上定义基准图案。

    Precision fiducial
    10.
    发明授权
    Precision fiducial 有权
    精密基准

    公开(公告)号：US06632575B1

    公开(公告)日：2003-10-14

    申请号：US09654107

    申请日：2000-08-31

    申请人： Mark S. Johnson

    发明人： Mark S. Johnson

    IPC分类号： G03F900

    CPC分类号： H05K1/0269 ,  H01L23/544 ,  H01L2223/54473 ,  H01L2924/0002 ,  H05K3/0002 ,  H05K3/0052 ,  H05K3/064 ,  H05K2201/09781 ,  H05K2201/09918 ,  Y10T83/04 ,  H01L2924/00

    摘要： A fiducial includes complementary patterns that are situated symmetrically about a common axis. The complementary patterns permit location of the common axis as an axis that is equidistant from the complementary patterns. The complementary patterns are displaced from the common axes by different distances so that the common axis is located using the complementary patterns nearest the common axis to accurately locate the common axis. The complementary patterns include etch-compensation features that permit the common axis to be accurately located even if an etch process defines the fiducial and the etch process exhibits a process error or variation such as underetching or overetching. The fiducial may be produced by transferring a fiducial pattern from a mask such as a photomask. The fiducial pattern may also be defined on the mask using a computer-aided design program.

    摘要翻译： 基准包括对称关于共同轴线的互补图案。 互补图形允许公共轴的位置作为与互补图案等距的轴。 互补图案从公共轴线移位不同的距离，使得公共轴线使用最接近公共轴线的互补图案来定位，以精确定位公共轴线。 互补图案包括允许公共轴准确定位的蚀刻补偿特征，即使蚀刻工艺限定基准并且蚀刻工艺表现出过程误差或变化，例如不平整或过蚀刻。 可以通过从诸如光掩模的掩模转移基准图来产生基准。 也可以使用计算机辅助设计程序在掩模上定义基准图案。