公开(公告)号：US20150308969A1

公开(公告)日：2015-10-29

申请号：US14691164

申请日：2015-04-20

Applicant: Heath A. Pois ,  Wei Ti Lee

Inventor： Heath A. Pois ,  Wei Ti Lee

IPC: G01N23/22 ,  G01N23/227 ,  G01B15/02 ,  G01N23/223

CPC classification number: G01N23/2206 ,  G01B15/02 ,  G01N23/2208 ,  G01N23/223 ,  G01N23/2273 ,  G01N2223/61 ,  G01N2223/6116

Abstract: Systems and approaches for silicon germanium thickness and composition determination using combined XPS and XRF technologies are described. In an example, a method for characterizing a silicon germanium film includes generating an X-ray beam. A sample is positioned in a pathway of said X-ray beam. An X-ray photoelectron spectroscopy (XPS) signal generated by bombarding said sample with said X-ray beam is collected. An X-ray fluorescence (XRF) signal generated by bombarding said sample with said X-ray beam is also collected. Thickness or composition, or both, of the silicon germanium film is determined from the XRF signal or the XPS signal, or both.

Abstract translation: 描述了使用组合XPS和XRF技术的硅锗厚度和成分测定的系统和方法。 在一个示例中，用于表征硅锗膜的方法包括产生X射线束。 样品位于所述X射线束的通路中。 收集通过用所述X射线束轰击所述样品产生的X射线光电子能谱（XPS）信号。 还收集通过用所述X射线束轰击所述样品而产生的X射线荧光（XRF）信号。 硅锗膜的厚度或组成或两者均由XRF信号或XPS信号或两者确定。

公开(公告)号：US08866122B1

公开(公告)日：2014-10-21

申请号：US13517653

申请日：2012-06-14

Applicant: Wei Ti Lee ,  Chakravarthy Gopalan ,  Yi Ma ,  Kuei-Chang Tsai ,  Jeffrey Shields ,  Janet Wang

Inventor： Wei Ti Lee ,  Chakravarthy Gopalan ,  Yi Ma ,  Kuei-Chang Tsai ,  Jeffrey Shields ,  Janet Wang

IPC: H01L47/00

CPC classification number: H01L45/143 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1675 ,  H01L45/1683

Abstract: In one embodiment, a resistive switching device includes a bottom electrode, a switching layer, a buffer layer, and a top electrode. The switching layer is disposed over the bottom electrode. The buffer layer is disposed over the switching layer and provides a buffer of ions of a memory metal. The buffer layer includes an alloy of the memory metal with an alloying element, which includes antimony, tin, bismuth, aluminum, germanium, silicon, or arsenic. The top electrode is disposed over the buffer layer and provides a source of the memory metal.

Abstract translation: 在一个实施例中，电阻式开关器件包括底部电极，开关层，缓冲层和顶部电极。 开关层设置在底部电极上。 缓冲层设置在开关层上并提供存储金属离子的缓冲液。 缓冲层包括记忆金属与含有锑，锡，铋，铝，锗，硅或砷的合金元素的合金。 顶部电极设置在缓冲层上方并提供存储金属的源。

公开(公告)号：US08535443B2

公开(公告)日：2013-09-17

申请号：US11459575

申请日：2006-07-24

Applicant: Wei Ti Lee ,  Ted Guo ,  Steve H. Chiao ,  Alan A. Ritchie

Inventor： Wei Ti Lee ,  Ted Guo ,  Steve H. Chiao ,  Alan A. Ritchie

IPC: C23C16/00

CPC classification number: C23C16/45561 ,  C23C14/165 ,  C23C16/4402 ,  C23C16/4404 ,  C23C16/45565 ,  C23C16/45591 ,  Y10T29/497 ,  Y10T29/49826 ,  Y10T137/0491 ,  Y10T137/9029

Abstract: A system of gas lines for a processing chamber and a method of forming a gas line system for a processing chamber are provided. The system of gas lines includes electropolished multi-way valves that connect electropolished linear gas lines. By using multi-way valves rather than tee-fittings and electropolishing the linear gas lines, the nucleation of contaminating particles in the system of gas lines may be reduced.

Abstract translation: 提供了一种用于处理室的气体管线系统和形成用于处理室的气体管线系统的方法。 气体管线系统包括连接电抛光线性气体管线的电抛光多通阀。 通过使用多通阀而不是三通阀，并对线性气体管线进行电解抛光，可以减少气体管线系统中污染颗粒的成核。

公开(公告)号：US20110312148A1

公开(公告)日：2011-12-22

申请号：US13155520

申请日：2011-06-08

Applicant: HOON KIM ,  SANG-HYEOB LEE ,  SANG HO YU ,  WEI TI LEE ,  SESHADRI GANGULI ,  HYOUNG-CHAN HA

Inventor： HOON KIM ,  SANG-HYEOB LEE ,  SANG HO YU ,  WEI TI LEE ,  SESHADRI GANGULI ,  HYOUNG-CHAN HA

IPC: H01L21/02 ,  B82Y40/00

CPC classification number: H01L28/65 ,  B82Y40/00 ,  C23C16/18 ,  C23C16/56 ,  H01L21/28556 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76864 ,  H01L28/91

Abstract: Methods for depositing ruthenium-containing films are provided herein. In some embodiments, a method of depositing a ruthenium-containing film on a substrate may include depositing a ruthenium-containing film on a substrate using a ruthenium-containing precursor, the deposited ruthenium-containing film having carbon incorporated therein; and exposing the deposited ruthenium-containing film to an oxygen-containing gas to remove at least some of the carbon from the deposited ruthenium-containing film. In some embodiments, the oxygen-containing gas exposed ruthenium-containing film may be annealed in a hydrogen-containing gas to remove at least some oxygen from the ruthenium-containing film. In some embodiments, the deposition, exposure, and annealing may be repeated to deposit the ruthenium-containing film to a desired thickness.

Abstract translation: 本文提供了沉积含钌膜的方法。 在一些实施方案中，在基材上沉积含钌膜的方法可以包括使用含钌前驱体将沉积的含钌膜沉积在基板上， 并将沉积的含钌膜暴露于含氧气体中以从沉积的含钌膜中除去至少一些碳。 在一些实施方案中，含氧气体暴露的含钌膜可以在含氢气体中退火以从含钌膜中除去至少一些氧。 在一些实施例中，可以重复沉积，曝光和退火，以将含钌膜沉积到期望的厚度。

公开(公告)号：US20100304027A1

公开(公告)日：2010-12-02

申请号：US12789194

申请日：2010-05-27

Applicant: Wei Ti Lee ,  Lai Ta ,  Srinivas Guggilla ,  Kevin Moraes ,  Olkan Cuvalci ,  Regan Young ,  John Mazzocco

Inventor： Wei Ti Lee ,  Lai Ta ,  Srinivas Guggilla ,  Kevin Moraes ,  Olkan Cuvalci ,  Regan Young ,  John Mazzocco

IPC: C23C16/44 ,  C23C16/00

CPC classification number: C23C14/568 ,  C23C14/564 ,  C23C16/4401 ,  C23C16/54

Abstract: Embodiments of the invention provide methods for processing substrates within a substrate processing system. In one embodiment, the method provides depositing a material on a substrate within a vapor deposition chamber coupled to a buffer chamber contained within a mainframe while maintaining a pressure of about 1×10−6 Torr or lower within a transfer chamber contained within the mainframe. The method further includes transferring the substrate from the vapor deposition chamber to the buffer chamber by a substrate handling robot while flowing a gas into the buffer chamber, evacuating the vapor deposition chamber, and maintaining a greater internal pressure within the buffer chamber than in the vapor deposition chamber. In some embodiments, the method includes transferring the substrate from the transfer chamber to a PVD chamber coupled to the transfer chamber by another substrate handling robot and depositing another material on the substrate within the PVD chamber.

Abstract translation: 本发明的实施例提供了在衬底处理系统内处理衬底的方法。 在一个实施例中，该方法提供了在包含在主机内的传送室内保持约1×10 -6 Torr或更低的压力的情况下，在耦合到主机内的缓冲室的气相沉积室内的衬底上沉积材料。 该方法还包括：在将气体流入缓冲室的同时，通过基板处理机器人将基板从气相沉积室转移到缓冲室，抽空蒸镀室，并在缓冲室内保持比在蒸气中更大的内部压力 沉积室。 在一些实施例中，该方法包括将衬底从传送室转移到通过另一衬底处理机器人耦合到传送室的PVD室，并将另一材料沉积在PVD室内的衬底上。

公开(公告)号：US09926639B2

公开(公告)日：2018-03-27

申请号：US13167001

申请日：2011-06-23

Applicant: Hoon Kim ,  Wei Ti Lee ,  Sang Ho Yu ,  Seshadri Ganguli ,  Hyoung-Chan Ha ,  Sang Hyeob Lee

Inventor： Hoon Kim ,  Wei Ti Lee ,  Sang Ho Yu ,  Seshadri Ganguli ,  Hyoung-Chan Ha ,  Sang Hyeob Lee

IPC: C25D5/02 ,  H01L21/768 ,  H01L21/285

CPC classification number: C25D5/02 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76831 ,  H01L21/76846 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76898

Abstract: Methods for forming barrier/seed layers for interconnect structures are provided herein. In some embodiments, a method of processing a substrate having an opening formed in a first surface of the substrate, the opening having a sidewall and a bottom surface, the method may include forming a layer comprising manganese (Mn) and at least one of ruthenium (Ru) or cobalt (Co) on the sidewall and bottom surface of the opening; and depositing a conductive material on the layer to fill the opening. In some embodiments, one of ruthenium (Ru) or cobalt (Co) is deposited on the sidewall and bottom surface of the opening. The materials may be deposited by chemical vapor deposition (CVD) or by physical vapor deposition (PVD).

公开(公告)号：US08637390B2

公开(公告)日：2014-01-28

申请号：US13116794

申请日：2011-05-26

Applicant: Seshadri Ganguli ,  Sang Ho Yu ,  Sang-Hyeob Lee ,  Hyoung-Chan Ha ,  Wei Ti Lee ,  Hoon Kim ,  Srinivas Gandikota ,  Yu Lei ,  Kevin Moraes ,  Xianmin Tang

Inventor： Seshadri Ganguli ,  Sang Ho Yu ,  Sang-Hyeob Lee ,  Hyoung-Chan Ha ,  Wei Ti Lee ,  Hoon Kim ,  Srinivas Gandikota ,  Yu Lei ,  Kevin Moraes ,  Xianmin Tang

IPC: H01L21/4763

CPC classification number: H01L21/28079 ,  H01L21/28088 ,  H01L21/32051 ,  H01L29/49

Abstract: Metal gate structures and methods for forming thereof are provided herein. In some embodiments, a method for forming a metal gate structure on a substrate having a feature formed in a high k dielectric layer may include depositing a first layer within the feature atop the dielectric layer; depositing a second layer comprising cobalt or nickel within the feature atop the first layer; and depositing a third layer comprising a metal within the feature atop the second layer to fill the feature, wherein at least one of the first or second layers forms a wetting layer to form a nucleation layer for a subsequently deposited layer, wherein one of the first, second, or third layers forms a work function layer, and wherein the third layer forms a gate electrode.

Abstract translation: 本文提供了金属门结构及其形成方法。 在一些实施例中，在具有形成在高k电介质层中的特征的衬底上形成金属栅极结构的方法可以包括在电介质层顶部的特征内沉积第一层; 在所述特征内在所述第一层顶部沉积包含钴或镍的第二层; 以及在第二层顶部沉积包括特征内的金属的第三层以填充该特征，其中第一层或第二层中的至少一层形成润湿层以形成后续沉积层的成核层，其中第一层 第二层或第三层形成功函数层，并且其中第三层形成栅电极。

公开(公告)号：US20130062587A1

公开(公告)日：2013-03-14

申请号：US13558296

申请日：2012-07-25

Applicant: Wei Ti Lee ,  Chakravarthy Gopalan ,  Yi Ma ,  Jeffrey Shields ,  Philippe Blanchard ,  John Ross Jameson ,  Foroozan Sarah Koushan ,  Janet Wang ,  Mark Kellam

Inventor： Wei Ti Lee ,  Chakravarthy Gopalan ,  Yi Ma ,  Jeffrey Shields ,  Philippe Blanchard ,  John Ross Jameson ,  Foroozan Sarah Koushan ,  Janet Wang ,  Mark Kellam

IPC: H01L47/00 ,  H01L21/02

CPC classification number: H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1658

Abstract: In accordance with an embodiment of the present invention, a resistive switching device comprises a bottom electrode, a switching layer disposed over the bottom electrode, and a top electrode disposed over the switching layer. The top electrode comprises an alloy of a memory metal and an alloying element. The top electrode provides a source of the memory metal. The memory metal is configured to change a state of the switching layer.

Abstract translation: 根据本发明的实施例，电阻式开关装置包括底电极，设置在底电极上的开关层和设置在开关层上的顶电极。 顶部电极包括记忆金属和合金元素的合金。 顶部电极提供存储金属的源。 存储器金属被配置为改变开关层的状态。

公开(公告)号：US07867900B2

公开(公告)日：2011-01-11

申请号：US12240816

申请日：2008-09-29

Applicant: Wei Ti Lee ,  Mohd Fadzli Anwar Hassan ,  Ted Guo ,  Sang-Ho Yu

Inventor： Wei Ti Lee ,  Mohd Fadzli Anwar Hassan ,  Ted Guo ,  Sang-Ho Yu

IPC: H01L21/44

CPC classification number: H01L23/53214 ,  H01L21/02068 ,  H01L21/28518 ,  H01L21/76876 ,  H01L21/76877 ,  H01L23/485 ,  H01L23/53223 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Embodiments herein provide methods for forming an aluminum contact on a cobalt silicide junction. In one embodiment, a method for forming materials on a substrate is provided which includes forming a cobalt silicide layer on a silicon-containing surface of the substrate during a silicidation process, forming a fluorinated sublimation film on the cobalt silicide layer during a plasma process, heating the substrate to a sublimation temperature to remove the fluorinated sublimation film, depositing a titanium-containing nucleation layer over the cobalt silicide layer, and depositing an aluminum-containing material over the titanium-containing nucleation layer. In one example, the method further provides forming the cobalt silicide layer by depositing a cobalt-containing layer on the silicon-containing surface, heating the substrate during a rapid thermal annealing (RTA) process, etching away any remaining portions of the cobalt-containing layer from the substrate, and subsequently heating the substrate during another RTA process.

Abstract translation: 本文的实施方案提供了在钴硅化物结上形成铝接触的方法。 在一个实施例中，提供了一种在衬底上形成材料的方法，包括在硅化过程中在衬底的含硅表面上形成钴硅化物层，在等离子体工艺期间在硅化钴层上形成氟化升华膜， 将基板加热到升华温度以除去氟化升华膜，在硅化钴层上沉积含钛成核层，并在含钛成核层上沉积含铝材料。 在一个实例中，该方法还提供通过在含硅表面上沉积含钴层来形成钴硅化物层，在快速热退火（RTA）工艺中加热衬底，蚀刻掉含钴的剩余部分 层，然后在另一RTA工艺期间加热衬底。

公开(公告)号：US07857947B2

公开(公告)日：2010-12-28

申请号：US11459531

申请日：2006-07-24

Applicant: Alan A. Ritchie ,  Wei Ti Lee ,  Ted Guo

Inventor： Alan A. Ritchie ,  Wei Ti Lee ,  Ted Guo

IPC: C23C14/34 ,  C23C16/00

CPC classification number: C23C16/45561 ,  C23C14/165 ,  C23C16/4402 ,  C23C16/4404 ,  C23C16/45565 ,  C23C16/45591 ,  Y10T29/497 ,  Y10T29/49826 ,  Y10T137/0491 ,  Y10T137/9029

Abstract: Blocker plates for chemical vapor deposition chambers and methods of treating blocker plates are provided. The blocker plates define a plurality of holes therethrough and have an upper surface and a lower surface that are at least about 99.5% pure, which minimizes the nucleation of contaminating particles on the blocker plates. A physically vapor deposited coating, such as an aluminum physically vapor deposited coating, may be formed on the upper and lower surfaces of the blocker plates. Chemical vapor deposition chambers including blocker plates having a physically vapor deposited coating thereon are also provided.

Abstract translation: 提供化学气相沉积室的阻挡板和处理阻挡板的方法。 阻挡板限定穿过其中的多个孔，并且具有至少约99.5％纯度的上表面和下表面，其最大限度地减小阻挡板上的污染颗粒的成核。 可以在阻挡板的上表面和下表面上形成物理气相沉积涂层，例如铝物理气相沉积涂层。 还提供了包括其上具有物理气相沉积涂层的阻挡板的化学气相沉积室。