公开(公告)号：US20110014727A1

公开(公告)日：2011-01-20

申请号：US12883982

申请日：2010-09-16

申请人： Akira YABUSHITA ,  Yasunori Narizuka ,  Susumu Kasukabe ,  Terutaka Mori ,  Etsuko Takane ,  Akio Hasebe ,  Kenji Kawakami

发明人： Akira YABUSHITA ,  Yasunori Narizuka ,  Susumu Kasukabe ,  Terutaka Mori ,  Etsuko Takane ,  Akio Hasebe ,  Kenji Kawakami

IPC分类号： H01L21/66 ,  H05K3/02

CPC分类号： G01R1/0735 ,  Y10T29/49156

摘要： In the highly accurate thin film probe sheet which is used for the contact to electrode pads disposed in high density with narrow pitches resulting from the increase in integration degree of semiconductor chips and for the inspection of semiconductor chips, a large spatial region in which a metal film selectively removable relative to terminal metal is formed in advance is formed in the peripheral region around minute contact terminals having sharp tips and disposed in high density with narrow pitches equivalent to those of the electrode pads. Thus, occurrence of damage in an inspection process is significantly reduced, and an inspection device simultaneously achieving the miniaturization and the durability can be provided.

摘要翻译： 在用于与由半导体芯片的集成度增加和半导体芯片的检查而产生的窄间距高密度设置的电极焊盘接触的高精度薄膜探针片中，其中金属 在具有尖锐尖端的微小接触端子周围的周边区域中预先形成相对于端子金属可选择的膜，并以与电极焊盘相同的窄间距高密度地设置。 因此，检查过程中的损坏的发生显着减少，并且可以提供同时实现小型化和耐久性的检查装置。

公开(公告)号：US20060094162A1

公开(公告)日：2006-05-04

申请号：US11253575

申请日：2005-10-20

申请人： Akira Yabushita ,  Yasunori Narizuka ,  Susumu Kasukabe ,  Terutaka Mori ,  Etsuko Takane ,  Akio Hasebe ,  Kenji Kawakami

发明人： Akira Yabushita ,  Yasunori Narizuka ,  Susumu Kasukabe ,  Terutaka Mori ,  Etsuko Takane ,  Akio Hasebe ,  Kenji Kawakami

IPC分类号： H01L21/50

CPC分类号： G01R1/0735 ,  Y10T29/49156

摘要： In the highly accurate thin film probe sheet which is used for the contact to electrode pads disposed in high density with narrow pitches resulting from the increase in integration degree of semiconductor chips and for the inspection of semiconductor chips, a large spatial region in which a metal film selectively removable relative to terminal metal is formed in advance is formed in the peripheral region around minute contact terminals having sharp tips and disposed in high density with narrow pitches equivalent to those of the electrode pads. Thus, occurrence of damage in an inspection process is significantly reduced, and an inspection device simultaneously achieving the miniaturization and the durability can be provided.

摘要翻译： 在用于与由半导体芯片的集成度增加和半导体芯片的检查而产生的窄间距高密度设置的电极焊盘接触的高精度薄膜探针片中，其中金属 在具有尖锐尖端的微小接触端子周围的周边区域中预先形成相对于端子金属可选择的膜，并以与电极焊盘相同的窄间距高密度地设置。 因此，检查过程中的损坏的发生显着减少，并且可以提供同时实现小型化和耐久性的检查装置。

公开(公告)号：US20060043593A1

公开(公告)日：2006-03-02

申请号：US11184980

申请日：2005-07-20

申请人： Terutaka Mori ,  Yasunori Narizuka ,  Akira Yabushita ,  Etsuko Takane ,  Akio Hasebe ,  Kenji Kawakami

发明人： Terutaka Mori ,  Yasunori Narizuka ,  Akira Yabushita ,  Etsuko Takane ,  Akio Hasebe ,  Kenji Kawakami

IPC分类号： H01L23/52

CPC分类号： G01R1/06711 ,  G01R1/06744 ,  G01R1/0735 ,  G01R3/00

摘要： In the connecting apparatus for inspecting the semiconductor chip, in which contact terminals are electrically connected to each of the plurality of electrode pads formed on the semiconductor chips, a part of metal projections in the shape of quadrangular pyramid which constitute the contact terminals is composed of insulator in the present invention. Therefore, the inspection of semiconductor chips performed by simultaneously transmitting high-speed signals to the plurality of minute electrode pads arranged at a narrow pitch on the semiconductor chips can be realized.

摘要翻译： 在用于检查半导体芯片的连接装置中，其中接触端子电连接到形成在半导体芯片上的多个电极焊盘中的每一个，构成接触端子的四角锥形状的金属突起的一部分由 绝缘体。 因此，可以实现通过同时向半导体芯片上以窄间距布置的多个微小电极焊盘传输高速信号而执行的半导体芯片的检查。

公开(公告)号：US07219422B2

公开(公告)日：2007-05-22

申请号：US10765917

申请日：2004-01-29

申请人： Yuji Wada ,  Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akira Yabushita ,  Terutaka Mori ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Teruo Shoji ,  Masakazu Sueyoshi

发明人： Yuji Wada ,  Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akira Yabushita ,  Terutaka Mori ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Teruo Shoji ,  Masakazu Sueyoshi

IPC分类号： H05K3/00 ,  H01R9/00

CPC分类号： G01R1/07314 ,  G01R31/2872 ,  Y10T29/41 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49169 ,  Y10T29/49798

摘要： The fabrication of a semiconductor integrated circuit device involves testing using a pushing mechanism that is constructed by forming, over the upper surface of a thin film probe, a reinforcing material having a linear expansion coefficient (thermal expansion coefficient) almost equal to that of a wafer to be tested; forming a groove in the reinforcing material above a contact terminal; placing an elastomer in the groove so that a predetermined amount projects out of the groove; and disposing a pusher and another elastomer to sandwich the pusher between the elastomers. With the use of such a probe, it is possible to improve the throughput of wafer-level electrical testing of a semiconductor integrated circuit.

摘要翻译： 半导体集成电路器件的制造包括使用推压机构进行测试，所述推压机构通过在薄膜探针的上表面上形成具有几乎等于晶片的线性膨胀系数（热膨胀系数）的增强材料而构成 待测 在接触端子上方的增强材料中形成凹槽; 将弹性体放置在所述槽中，使得预定量突出到所述凹槽中; 并且设置推进器和另一种弹性体以将推进器夹在弹性体之间。 通过使用这样的探针，可以提高半导体集成电路的晶片级电气测试的吞吐量。

公开(公告)号：US07351597B2

公开(公告)日：2008-04-01

申请号：US11750371

申请日：2007-05-18

申请人： Yuji Wada ,  Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akira Yabushita ,  Terutaka Mori ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Teruo Shoji ,  Masakazu Sueyoshi

发明人： Yuji Wada ,  Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akira Yabushita ,  Terutaka Mori ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Teruo Shoji ,  Masakazu Sueyoshi

IPC分类号： H01L21/66

CPC分类号： G01R1/07314 ,  G01R31/2872 ,  Y10T29/41 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49169 ,  Y10T29/49798

摘要： The fabrication of a semiconductor integrated circuit device involves testing using a pushing mechanism that is constructed by forming, over the upper surface of a thin film probe, a reinforcing material having a linear expansion coefficient (thermal expansion coefficient) almost equal to that of a wafer to be tested; forming a groove in the reinforcing material above a contact terminal; placing an elastomer in the groove so that a predetermined amount projects out of the groove; and disposing a pusher and another elastomer to sandwich the pusher between the elastomers. With the use of such a probe, it is possible to improve the throughput of wafer-level electrical testing of a semiconductor integrated circuit.

摘要翻译： 半导体集成电路器件的制造包括使用推压机构进行测试，所述推压机构通过在薄膜探针的上表面上形成具有几乎等于晶片的线性膨胀系数（热膨胀系数）的增强材料而构成 待测 在接触端子上方的增强材料中形成凹槽; 将弹性体放置在所述槽中，使得预定量突出到所述凹槽中; 并且设置推进器和另一种弹性体以将推进器夹在弹性体之间。 通过使用这样的探针，可以提高半导体集成电路的晶片级电气测试的吞吐量。

公开(公告)号：US20070218572A1

公开(公告)日：2007-09-20

申请号：US11750371

申请日：2007-05-18

申请人： Yuji Wada ,  Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akira Yabushita ,  Terutaka Mori ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Teruo Shoji ,  Masakazu Sueyoshi

发明人： Yuji Wada ,  Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akira Yabushita ,  Terutaka Mori ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Teruo Shoji ,  Masakazu Sueyoshi

IPC分类号： H01L21/66

CPC分类号： G01R1/07314 ,  G01R31/2872 ,  Y10T29/41 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49169 ,  Y10T29/49798

摘要： The fabrication of a semiconductor integrated circuit device involves testing using a pushing mechanism that is constructed by forming, over the upper surface of a thin film probe, a reinforcing material having a linear expansion coefficient (thermal expansion coefficient) almost equal to that of a wafer to be tested; forming a groove in the reinforcing material above a contact terminal; placing an elastomer in the groove so that a predetermined amount projects out of the groove; and disposing a pusher and another elastomer to sandwich the pusher between the elastomers. With the use of such a probe, it is possible to improve the throughput of wafer-level electrical testing of a semiconductor integrated circuit.

摘要翻译： 半导体集成电路器件的制造包括使用推压机构进行测试，所述推压机构通过在薄膜探针的上表面上形成具有几乎等于晶片的线性膨胀系数（热膨胀系数）的增强材料而构成 待测 在接触端子上方的增强材料中形成凹槽; 将弹性体放置在所述槽中，使得预定量突出到所述凹槽中; 并且设置推进器和另一种弹性体以将推进器夹在弹性体之间。 通过使用这样的探针，可以提高半导体集成电路的晶片级电气测试的吞吐量。

公开(公告)号：US20100301884A1

公开(公告)日：2010-12-02

申请号：US12787869

申请日：2010-05-26

申请人： Etsuko Takane ,  Yasunori Narizuka ,  Akira Yabushita ,  Kenji Kawakami ,  Akio Hasebe

发明人： Etsuko Takane ,  Yasunori Narizuka ,  Akira Yabushita ,  Kenji Kawakami ,  Akio Hasebe

IPC分类号： G01R31/02 ,  H01R13/02 ,  H01R43/00

CPC分类号： H05K3/4007 ,  G01R1/06733 ,  G01R1/0735 ,  G01R3/00 ,  H05K3/06 ,  H05K3/205 ,  H05K2201/0367 ,  H05K2201/09845 ,  H05K2203/0574 ,  Y10T29/49224

摘要： A semiconductor chip inspection apparatus largely reduces occurrence of damage due to foreign matter in an inspection process and improves durability at the same time of miniaturization is provided. As to a highly accurate thin-film probe sheet which performs: a contact to electrode pads arranged at a narrow pitch and a high density along with integration of semiconductor chip; and an inspection of semiconductor chips, by providing two layers of metal films selectively removable in a step-like shape in a periphery region of fine contact terminal having sharp tips and arranged at a high density and a narrow pitch at the same level as electrode pads, an upper periphery of the contact terminals is covered with an insulating film, and a large space region is formed.

摘要翻译： 半导体芯片检查装置大大减少了检查过程中由于异物引起的损坏的发生，并提供了同时小型化的耐久性。 对于高精度的薄膜探针片，其执行：与半导体芯片的集成一起以窄间距和高密度布置的电极焊盘的接触; 以及对半导体芯片的检查，通过在具有尖锐尖端的精细接触端子的周边区域中提供两级可选择性地以阶梯状形式移除的金属膜，并以与电极焊盘相同的高度密度和窄间距排列 接触端子的上周边被绝缘膜覆盖，形成大的空间区域。

公开(公告)号：US20080029763A1

公开(公告)日：2008-02-07

申请号：US11740301

申请日：2007-04-26

申请人： Susumu Kasukabe ,  Terutaka Mori ,  Yasunori Narizuka ,  Norio Chujo

发明人： Susumu Kasukabe ,  Terutaka Mori ,  Yasunori Narizuka ,  Norio Chujo

IPC分类号： H01L23/48 ,  G01R31/26 ,  H01L23/58 ,  H01L29/40

CPC分类号： G01R31/31905 ,  G01R1/0735 ,  G01R31/2874 ,  G01R31/2879 ,  G01R31/2889 ,  H01L2924/0002 ,  H01P3/081 ,  H01L2924/00

摘要： A probe sheet or a connecting sheet with good transmission characteristics and flexibility comprising contact terminals capable of contacting at a plurality of points and in high density, without applying damages on an electrode pad which is a contact subject is provided. Further, a high-speed transmission circuit capable of designing signal wirings with aligned impedance to have wide width even with a thin insulating film is achieved to provide a probe sheet or a connecting sheet with reduced loss of high-speed transmission signals. Moreover, the transmission circuit is applied to a probe card using a probe sheet, an inspecting method of (a method of manufacturing) a semiconductor device using the same, and a connecting sheet having an excellent high-frequency characteristic.

摘要翻译： 提供了具有良好传输特性和柔性的探针片或连接片，包括能够在多个点和高密度下接触的接触端子，而不对作为接触物体的电极焊盘施加损伤。 此外，实现了即使使用薄绝缘膜，能够设计具有均匀阻抗的宽度宽的宽度的高速传输电路，以提供具有降低的高速传输信号损失的探针片或连接片。 此外，使用探针片将传输电路应用到探针卡，使用其的制造半导体器件的制造方法的检查方法以及具有优异的高频特性的连接片。

公开(公告)号：US07049837B2

公开(公告)日：2006-05-23

申请号：US10676609

申请日：2003-10-02

申请人： Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akio Hasebe

发明人： Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akio Hasebe

IPC分类号： G01R31/02

CPC分类号： G01R1/06744 ,  G01R1/06711 ,  G01R1/0735 ,  G01R3/00 ,  G01R31/2874 ,  H01L24/05 ,  H01L2224/04042 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01033

摘要： A probe card has first contact terminals electrically connected to the fine-pitch electrodes of a test target; wirings drawn from the first contact terminals; and second contact terminals electrically connected to the wirings, wherein the first contact terminals are formed each using an anisotropically etched hole in a crystalline substrate, and a semiconductor device test method (fabrication method) using the probe card.

摘要翻译： 探针卡具有电连接到测试对象的细间距电极的第一接触端子; 从第一接触端子抽出的接线; 以及电连接到所述布线的第二接触端子，其中，使用所述探针卡的半导体器件测试方法（制造方法）在所述晶体衬底中各自使用各向异性蚀刻的孔来形成所述第一接触端子。

公开(公告)号：US20070103178A1

公开(公告)日：2007-05-10

申请号：US11543021

申请日：2006-10-05

申请人： Susumu Kasukabe ,  Teruo Shoji ,  Akio Hasebe ,  Yoshinori Deguchi ,  Yasunori Narizuka

发明人： Susumu Kasukabe ,  Teruo Shoji ,  Akio Hasebe ,  Yoshinori Deguchi ,  Yasunori Narizuka

IPC分类号： G01R31/02

CPC分类号： G01R1/0735 ,  G01R3/00

摘要： In a prove card comprising: a probe sheet having a contact terminal contacting with an electrode provided on a wafer, a wiring led from the contact terminal, and an electrode electrically connected to the wiring; and a multilayered wiring substrate having an electrode electrically connected to the electrode of the probe sheet, wherein a contact between the contact terminal and the electrode of the wafer is established by one or more adhesion holder for pressing, from the backside of a terminal group of the terminal contacts, the terminal group via a press block with a spring to contact with the electrode pad. A device in which the probe sheet is attached to the adhesion holder and a plurality of chips are tested simultaneously by combining the adhesion holder.

摘要翻译： 一种证明卡，包括：探针片，其具有与设置在晶片上的电极接触的接触端子，从接触端子引出的布线和电连接到布线的电极; 以及多层布线基板，其具有与所述探针片的电极电连接的电极，其中，所述接触端子和所述晶片的电极之间的接触由一个或多个粘合保持器建立，所述粘合保持器从所述端子组的端子组的背面 端子触点，端子组通过具有弹簧的压块与电极焊盘接触。 通过组合粘合保持器，将探针片附接到粘合保持器和多个芯片的装置同时测试。