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公开(公告)号:US06221694B1
公开(公告)日:2001-04-24
申请号:US09343080
申请日:1999-06-29
申请人: Anilkumar C. Bhatt , Michael J. Cummings , Thomas R. Miller , Kristen A. Stauffer , Michael Wozniak
发明人: Anilkumar C. Bhatt , Michael J. Cummings , Thomas R. Miller , Kristen A. Stauffer , Michael Wozniak
IPC分类号: H01L2144
CPC分类号: H01L21/4803 , H01L21/4846 , H01L21/486 , H01L23/13 , H01L23/49805 , H01L24/45 , H01L24/48 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H05K1/021 , H05K1/182 , H05K3/0061 , H05K3/427 , H05K2201/09554 , H05K2201/09981 , H05K2203/049 , H01L2224/05599 , H01L2924/00
摘要: A method of making a circuitized substrate which may be utilized as a chip carrier structure. The method involves the steps of providing a dielectric member and routing out a preselected portion of the base member to form an aperture. Metallization of the dielectric member and the walls of the aperture then occurs, followed by circuitization of the surfaces of the dielectric member. Direct metallization of the aperture walls eliminates many manufacturing steps previously required to metallize the aperture walls.
摘要翻译: 制造可用作芯片载体结构的电路化衬底的方法。 该方法包括以下步骤:提供电介质构件并布置出基底构件的预选部分以形成孔。 然后发生电介质构件和孔的壁的金属化,随后电介质构件的表面被电路化。 孔壁的直接金属化消除了先前为孔壁金属化所需的许多制造步骤。
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公开(公告)号:US06188027B1
公开(公告)日:2001-02-13
申请号:US09345474
申请日:1999-06-30
IPC分类号: H01K909
CPC分类号: H05K3/0094 , H05K3/385 , H05K2201/0959 , Y10S428/901 , Y10T428/24273 , Y10T428/24917 , Y10T428/249985
摘要: An electronic structure, and associated method of formation, in which a plated metallic layer such as a copper layer, of a plated through hole (PTH) is adhesively coupled to holefill material distributed within the PTH. The holefill material includes a resin such as an epoxy and optionally includes a particulate component such as a copper powder. The adhesive coupling is accomplished by forming an adhesion promoter film on the plated metallic layer such that the adhesion promoter film is bonded to the resin. The adhesion promoter film may include a metallic oxide layer such as layer containing cupric oxide and cuprous oxide, which could be formed from bathing the PTH in a solution of sodium chlorite. Application of a reducing solution of dimethylamine borane to the cuprous oxide layer would convert some of the cuprous oxide to cupric oxide in the metallic oxide layer. Another possibility for an adhesion promoter film is an organometallic layer such as a layer that includes a chemical complex of metal and an organic corrosion inhibitor. Useful organic corrosion inhibitors for this purpose include triazoles, tetrazoles, and imidazoles. The organometallic layer could be formed from bathing the PTH in a bath of hydrogen peroxide, sulfuric acid, and an organic corrosion inhibitor.
摘要翻译: 将电镀通孔(PTH)的电镀金属层(例如铜层)粘合地耦合到分布在PTH内的孔填充材料的电子结构及其相关联的形成方法。 孔填充材料包括诸如环氧树脂的树脂,并且任选地包括诸如铜粉末的颗粒组分。 通过在电镀金属层上形成粘合促进剂膜,使粘合促进剂膜与树脂结合,实现粘接剂的连接。 粘合促进剂膜可以包括金属氧化物层,例如含有氧化铜和氧化亚铜的层,其可以通过在亚氯酸钠溶液中洗涤PTH而形成。 将二甲胺硼烷的还原溶液应用于氧化亚铜层将将一些氧化亚铜转化为金属氧化物层中的氧化铜。 粘合促进剂膜的另一种可能性是有机金属层,例如包含金属和有机缓蚀剂的化学络合物的层。 用于此目的的有用的有机腐蚀抑制剂包括三唑,四唑和咪唑。 可以通过在过氧化氢,硫酸和有机腐蚀抑制剂的浴中洗涤PTH来形成有机金属层。
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公开(公告)号:US06537608B2
公开(公告)日:2003-03-25
申请号:US09752915
申请日:2001-01-02
IPC分类号: B05D512
CPC分类号: H05K3/0094 , H05K3/385 , H05K2201/0959 , Y10S428/901 , Y10T428/24273 , Y10T428/24917 , Y10T428/249985
摘要: A method of forming an electronic structure, including adhesively coupling a plated metallic layer (e.g. a copper layer) of a plated through hole (PTH) to holefill material (e.g., epoxy resin) distributed within the PTH. The adhesive coupling utilizes an adhesion promoter film on the plated metallic layer such that the adhesion promoter film is bonded to the resin. The adhesion promoter film may include a metallic oxide layer such as a layer containing cupric oxide and cuprous oxide, which could be formed from bathing a PTH plated with copper in a solution of sodium chlorite. The adhesion promoter film may alternatively include an organometallic layer such as a layer that includes a chemical complex of metal and an organic corrosion inhibitor. The organometallic layer could be formed from bathing the PTH in a bath of hydrogen peroxide, sulfuric acid, and the organic corrosion inhibitor.
摘要翻译: 一种形成电子结构的方法,包括将电镀通孔(PTH)的电镀金属层(例如铜层)粘附到分布在PTH内的孔填充材料(例如环氧树脂)。 粘合剂偶联剂在镀金属层上使用粘合促进剂膜,使粘合促进剂膜与树脂结合。 粘合促进剂膜可以包括金属氧化物层,例如含有氧化铜和氧化亚铜的层,其可以通过在亚氯酸钠溶液中洗涤镀铜的PTH来形成。 粘合促进剂膜可以替代地包括有机金属层,例如包含金属和有机腐蚀抑制剂的化学络合物的层。 有机金属层可以通过在过氧化氢,硫酸和有机腐蚀抑制剂的浴中洗涤PTH而形成。
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公开(公告)号:US06467160B1
公开(公告)日:2002-10-22
申请号:US09537960
申请日:2000-03-28
IPC分类号: H01K310
CPC分类号: H05K3/427 , H05K3/0094 , H05K3/064 , H05K2201/0959 , H05K2203/1394 , Y10T29/49128 , Y10T29/49165
摘要: A method of making a circuitized substrate having plated through holes free of filler material is provided. The method includes the steps of providing a dielectric substrate having first and second opposite faces. At least one via hole is formed from one face to the other. A first electrically conductive layer is applied onto the top and bottom faces of the dielectric member and onto the side wall of the via. First layers of photoresist are applied to each layer of conductive material and entering at least partially into the via hole. The first layers of photoresist are selectively exposed and developed to remove all of the photoresist, except that photoresist which is disposed in the via holes. Thereafter, a portion of the faces of the metal coatings on the surfaces of dielectric material and any photoresist remaining in the holes extending above the layers of electrically conductive material are removed to form a planar surface thinner than the thickness of the metal in the through hole. Thereafter, a second layer of photoresist material is applied to both the surfaces of the metal on both faces of the dielectric material and exposed to a desired circuit pattern. Thereafter, the second layers of the photoresist material are developed to reveal the underlying metal which is then etched to form a circuit pattern in the metal layer on both faces. Thereafter, the second layers of the remaining photoresist are stripped and also the photoresist remaining in the hole is stripped, thereby to provide a circuitized substrate with plated through holes having an opening extending from the upper face of the substrate to the lower face of the substrate.
摘要翻译: 提供了一种制造电路化基板的方法,该基板具有不含填料的电镀通孔。 该方法包括提供具有第一和第二相对面的电介质基板的步骤。 至少一个通孔从一个面到另一个形成。 将第一导电层施加到电介质构件的顶表面和底表面上并通过通孔的侧壁。 将第一层光致抗蚀剂施加到每个导电材料层并且至少部分地进入通孔。 除了设置在通孔中的光致抗蚀剂之外,第一层光致抗蚀剂被选择性地曝光和显影以除去所有光致抗蚀剂。 此后,介电材料表面上的金属涂层表面的一部分和残留在延伸到导电材料层之上的孔中的任何光致抗蚀剂被去除以形成比通孔中的金属厚度更薄的平面 。 此后,将第二层光致抗蚀剂材料施加到电介质材料的两个表面上的金属的两个表面上并暴露于期望的电路图案。 此后,第二层光致抗蚀剂材料被显影以露出下面的金属,然后将其蚀刻以在两面上的金属层中形成电路图案。 此后,残留的光致抗蚀剂的第二层被剥离,并且剥离残留在孔中的光致抗蚀剂,从而为电路化基板提供具有从基板的上表面延伸到基板的下表面的开口的电镀通孔 。
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公开(公告)号:US06207354B1
公开(公告)日:2001-03-27
申请号:US09288052
申请日:1999-04-07
IPC分类号: G03C500
CPC分类号: H05K3/403 , H01L21/4803 , H01L21/4846 , H01L24/45 , H01L2224/45144 , H01L2224/48091 , H01L2224/73265 , H01L2924/01013 , H01L2924/01028 , H01L2924/01046 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H05K1/0203 , H05K1/021 , H05K1/182 , H05K3/0061 , H05K3/064 , H05K3/427 , H01L2924/00014 , H01L2924/00
摘要: A method of making a circuitized substrate wherein a chip-accommodating cavity is formed along with a plurality of conductive elements (e.g., pads, lines, etc.) which form part of the substrate's circuitry. Metallization is provided over the elements and, significantly, on the internal surfaces of the formed cavity to thereby enhance the electrical properties of the finished product, e.g., by assuring a solid, continuous path between upper and lower surfaces of the product.
摘要翻译: 一种制造电路化基板的方法,其中与形成基板电路的一部分的多个导电元件(例如,焊盘,线等)一起形成芯片容纳腔。 在元件上以及显着地在成形腔的内表面上提供金属化,从而例如通过确保产品的上表面和下表面之间的固体连续路径来增强成品的电性能。
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公开(公告)号:US06740819B2
公开(公告)日:2004-05-25
申请号:US10421272
申请日:2003-04-23
申请人: Anilkumar C. Bhatt , Ashwinkumar C. Bhatt , Subahu D. Desai , John M. Lauffer , Voya R. Markovich , Thomas R. Miller
发明人: Anilkumar C. Bhatt , Ashwinkumar C. Bhatt , Subahu D. Desai , John M. Lauffer , Voya R. Markovich , Thomas R. Miller
IPC分类号: H05K706
CPC分类号: H05K3/445 , H05K1/056 , H05K3/0023 , H05K3/0082 , H05K3/4641 , H05K2203/143
摘要: Via holes are formed in an electrically conductive power plane. Photo-imageable dielectric (PID) material is applied to one side of the power plane filling the via holes. The power plane side with no PID material is exposed to light energy to cure the PID material in the via holes. A developer is used to remove any uncured PID material. Signal plane assemblies comprising a conductive signal plane and a dielectric layer are laminated onto the filled power plane forming a two signal and one power plane (2S1P) structure. In another embodiment, the power plane has PID material applied from both sides. A photo-mask is applied to the power plane and the PID material in the via holes is cured with light energy. A developer is used to remove uncured PID material. Signal plane assemblies, as described above, are laminated onto the filled power plane forming a 2S1P structure.
摘要翻译: 通孔形成在导电电力平面中。 可光成像电介质(PID)材料被施加到填充通孔的电源平面的一侧。 没有PID材料的电源平面侧暴露于光能以固化通孔中的PID材料。 开发人员用于去除任何未固化的PID材料。 包括导电信号平面和电介质层的信号平面组件层压到形成两个信号和一个功率平面(2S1P)结构的填充的电源平面上。 在另一实施例中,动力平面具有从两侧施加的PID材料。 将光掩模应用于电源平面,通孔中的PID材料用光能固化。 开发人员用于清除未固化的PID材料。 如上所述的信号平面组件被层压到形成2S1P结构的填充的电源平面上。
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公开(公告)号:US06608757B1
公开(公告)日:2003-08-19
申请号:US10101277
申请日:2002-03-18
申请人: Anilkumar C. Bhatt , Ashwinkumar C. Bhatt , Subahu D. Desai , John M. Lauffer , Voya R. Markovich , Thomas R. Miller
发明人: Anilkumar C. Bhatt , Ashwinkumar C. Bhatt , Subahu D. Desai , John M. Lauffer , Voya R. Markovich , Thomas R. Miller
IPC分类号: H05K716
CPC分类号: H05K3/445 , H05K1/056 , H05K3/0023 , H05K3/0082 , H05K3/4641 , H05K2203/143
摘要: Via holes are formed in an electrically conductive power plane. Photo-imageable dielectric (PID) material is applied to one side of the power plane filling the via holes. The power plane side with no PID material is exposed to light energy to cure the PID material in the via holes. A developer is used to remove any uncured PID material. Signal plane assemblies comprising a conductive signal plane and a dielectric layer are laminated onto the filled power plane forming a two signal and one power plane (2S1P) structure. In another embodiment, the power plane has PID material applied from both sides. A photo-mask is applied to the power plane and the PID material in the via holes is cured with light energy. A developer is used to remove uncured PID material. Signal plane assemblies, as described above, are laminated onto the filled power plane forming a 2S1P structure.
摘要翻译: 通孔形成在导电电力平面中。 可光成像电介质(PID)材料被施加到填充通孔的电源平面的一侧。 没有PID材料的电源平面侧暴露于光能以固化通孔中的PID材料。 开发人员用于去除任何未固化的PID材料。 包括导电信号平面和电介质层的信号平面组件层压到形成两个信号和一个功率平面(2S1P)结构的填充的电源平面上。 在另一实施例中,动力平面具有从两侧施加的PID材料。 将光掩模应用于电源平面,通孔中的PID材料用光能固化。 开发人员用于清除未固化的PID材料。 如上所述的信号平面组件被层压到形成2S1P结构的填充的电源平面上。
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公开(公告)号:US06630743B2
公开(公告)日:2003-10-07
申请号:US09795332
申请日:2001-02-27
IPC分类号: H01L2348
CPC分类号: H01L23/49827 , H01L21/486 , H01L2924/0002 , H05K3/108 , H05K3/422 , H05K3/427 , H05K2201/0344 , H05K2203/1407 , H01L2924/00
摘要: A circuitized semiconductor substrate comprising a layer of dielectric material having holes therethrough, a catalyst seed layer lining the walls of the holes along the surface of the dielectric material, and a nickel layer in the openings and a layer of copper above the nickel layer, along with a method for its fabrication. The invention also provides copper-nickel laminate PTH barrels and methods for their fabrication.
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公开(公告)号:US06618940B2
公开(公告)日:2003-09-16
申请号:US09909211
申请日:2001-07-19
申请人: Kenneth J. Lubert , Curtis L. Miller , Thomas R. Miller , Robert D. Sebesta , James W. Wilson , Michael Wozniak
发明人: Kenneth J. Lubert , Curtis L. Miller , Thomas R. Miller , Robert D. Sebesta , James W. Wilson , Michael Wozniak
IPC分类号: H05K310
CPC分类号: H05K3/0094 , H05K3/061 , H05K3/064 , H05K3/427 , H05K2201/0166 , H05K2201/0209 , H05K2201/0959 , H05K2203/025 , H05K2203/0353 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , Y10T29/49171
摘要: A high density printed wiring board is prepared by applying an essentially solid material into plated through holes such that the metallized layers within the through hole are unaffected by chemical metal etchants. In this manner, lateral surface metallized layers can exclusively be reduced in thickness by use of said chemical agents. These thinned lateral surface metallized layers are ultimately converted into fine pitch, 25 to 40 microns, circuitry, thereby providing high density boards. Since the through hole wall metallization is unaffected by the etching process, excellent electrical connection between the fine line circuitry is obtained. Various printed wiring board embodiments are also presented.
摘要翻译: 通过将基本上固体的材料施加到电镀的通孔中来制备高密度印刷线路板,使得通孔内的金属化层不受化学金属蚀刻剂的影响。 以这种方式,通过使用所述化学试剂,侧表面金属化层可以专门地减小厚度。 这些变薄的侧表面金属化层最终被转换为25至40微米的细间距,电路,从而提供高密度板。 由于通孔壁金属化不受蚀刻工艺的影响,所以可以获得细线电路之间的良好的电连接。 还提出了各种印刷线路板实施例。
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公开(公告)号:US06291779B1
公开(公告)日:2001-09-18
申请号:US09345573
申请日:1999-06-30
申请人: Kenneth J. Lubert , Curtis L. Miller , Thomas R. Miller , Robert D. Sebesta , James W. Wilson , Michael Wozniak
发明人: Kenneth J. Lubert , Curtis L. Miller , Thomas R. Miller , Robert D. Sebesta , James W. Wilson , Michael Wozniak
IPC分类号: H05K111
CPC分类号: H05K3/0094 , H05K3/061 , H05K3/064 , H05K3/427 , H05K2201/0166 , H05K2201/0209 , H05K2201/0959 , H05K2203/025 , H05K2203/0353 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , Y10T29/49171
摘要: A high density printed wiring board is prepared by applying an essentially solid material into plated through holes such that the metallized layers within the through hole are unaffected by chemical metal etchants. In this manner, lateral surface metallized layers can exclusively be reduced in thickness by use of said chemical agents. These thinned lateral surface metallized layers are ultimately converted into fine pitch, 25 to 40 microns, circuitry, thereby providing high density boards. Since the through hole wall metallization is unaffected by the etching process, excellent electrical connection between the fine line circuitry is obtained. Various printed wiring board embodiments are also presented.
摘要翻译: 通过将基本上固体的材料施加到电镀的通孔中来制备高密度印刷线路板,使得通孔内的金属化层不受化学金属蚀刻剂的影响。 以这种方式,通过使用所述化学试剂,侧表面金属化层可以专门地减小厚度。 这些变薄的侧表面金属化层最终被转换为25至40微米的细间距,电路,从而提供高密度板。 由于通孔壁金属化不受蚀刻工艺的影响,所以可以获得细线电路之间的良好的电连接。 还提出了各种印刷线路板实施例。
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