公开(公告)号：US07038322B2

公开(公告)日：2006-05-02

申请号：US10919331

申请日：2004-08-17

申请人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

发明人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

IPC分类号： H01L21/31

CPC分类号： H01L23/3157 ,  H01L23/3114 ,  H01L23/3171 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/1005 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A multi-chip module has at least two semiconductor chips. Each of the semiconductor chips has chip electrodes of the semiconductor chip, electrically conductive interconnections for electrically connection with the chip electrodes, electrically conductive lands for electrically connection with the interconnections, external terminals placed on the lands, and a stress-relaxation layer intervening between the lands and the semiconductor chip. The semiconductor chips are placed on a mounting board via the external terminals. The stress-relaxation layer of a first semiconductor chip is thicker than the stress-relaxation layer of a second semiconductor chip having a distance from a center thereof to an external terminal positioned at an outermost end portion thereof smaller than that of the first semiconductor chip.

公开(公告)号：US06927489B1

公开(公告)日：2005-08-09

申请号：US09787526

申请日：2000-03-14

申请人： Akihiro Yaguchi ,  Hideo Miura ,  Atsushi Kazama ,  Asao Nishimura

发明人： Akihiro Yaguchi ,  Hideo Miura ,  Atsushi Kazama ,  Asao Nishimura

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/31 ,  H01L23/485 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/10 ,  H01L23/3114 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/13 ,  H01L2224/13006 ,  H01L2224/13099 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/30105 ,  H01L2924/207 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： In a small semiconductor device having external terminals on a semiconductor element and a semiconductor module mounted with the small semiconductor device, disconnection of the external terminals is prevented when a temperature change occurs under the conditions that the semiconductor device is mounted on a printed circuit board. To achieve this a projection is formed on a land which is an external terminal bonding area of the semiconductor device, and a protruded portion of the projection is bonded to the external terminal. An intervening portion of a protective film made of resin material is formed between the lands and semiconductor element.

摘要翻译： 在半导体元件上具有外部端子的小半导体器件和安装有小型半导体器件的半导体模块中，在半导体器件安装在印刷电路板上的条件下发生温度变化时，可防止外部端子断开。 为了实现这一点，在作为半导体器件的外部端子接合区域的焊盘上形成突起，突起的突出部分接合到外部端子。 在平台和半导体元件之间形成由树脂材料构成的保护膜的中间部分。

公开(公告)号：US20050029674A1

公开(公告)日：2005-02-10

申请号：US10919331

申请日：2004-08-17

申请人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

发明人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

IPC分类号： H01L23/31 ,  H01L23/48 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L23/3157 ,  H01L23/3114 ,  H01L23/3171 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/1005 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A multi-chip module has at least two semiconductor chips. Each of the semiconductor chips has chip electrodes of the semiconductor chip, electrically conductive interconnections for electrically connection with the chip electrodes, electrically conductive lands for electrically connection with the interconnections, external terminals placed on the lands, and a stress-relaxation layer intervening between the lands and the semiconductor chip. The semiconductor chips are placed on a mounting board via the external terminals. The stress-relaxation layer of a first semiconductor chip is thicker than the stress-relaxation layer of a second semiconductor chip having a distance from a center thereof to an external terminal positioned at an outermost end portion thereof smaller than that of the first semiconductor chip.

摘要翻译： 多芯片模块具有至少两个半导体芯片。 每个半导体芯片具有半导体芯片的芯片电极，用于与芯片电极电连接的导电互连，用于与互连电连接的导电焊盘，设置在焊盘上的外部端子以及介于两者之间的应力松弛层 土地和半导体芯片。 半导体芯片通过外部端子放置在安装板上。 第一半导体芯片的应力松弛层厚于第二半导体芯片的应力松弛层，该第二半导体芯片的距离其中心至位于其最外端部分的外部端子的距离小于第一半导体芯片的应力松弛层。

公开(公告)号：US07388295B2

公开(公告)日：2008-06-17

申请号：US11350919

申请日：2006-02-10

申请人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

发明人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

IPC分类号： H01L23/48

CPC分类号： H01L23/3157 ,  H01L23/3114 ,  H01L23/3171 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/1005 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A multi-chip module has at least two semiconductor chips. Each of the semiconductor chips has chip electrodes of the semiconductor chip, electrically conductive interconnections for electrically connection with the chip electrodes, electrically conductive lands for electrically connection with the interconnections, external terminals placed on the lands, and a stress-relaxation layer intervening between the lands and the semiconductor chip. The semiconductor chips are placed on a mounting board via the external terminals. The distance between farthest ones of external terminal positioned at an outermost end portions of said second semiconductor chip is smaller than that of the first semiconductor chip.

摘要翻译： 多芯片模块具有至少两个半导体芯片。 每个半导体芯片具有半导体芯片的芯片电极，用于与芯片电极电连接的导电互连，用于与互连电连接的导电焊盘，设置在焊盘上的外部端子以及介于两者之间的应力松弛层 土地和半导体芯片。 半导体芯片通过外部端子放置在安装板上。 位于所述第二半导体芯片的最外端部的最外侧端子之间的距离小于第一半导体芯片的距离。

公开(公告)号：US20060125116A1

公开(公告)日：2006-06-15

申请号：US11350919

申请日：2006-02-10

申请人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

发明人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

IPC分类号： H01L23/48

CPC分类号： H01L23/3157 ,  H01L23/3114 ,  H01L23/3171 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/1005 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A multi-chip module has at least two semiconductor chips. Each of the semiconductor chips has chip electrodes of the semiconductor chip, electrically conductive interconnections for electrically connection with the chip electrodes, electrically conductive lands for electrically connection with the interconnections, external terminals placed on the lands, and a stress-relaxation layer intervening between the lands and the semiconductor chip. The semiconductor chips are placed on a mounting board via the external terminals. The distance between farthest ones of external terminal positioned at an outermost end portions of said second semiconductor chip is smaller than that of the first semiconductor chip.

摘要翻译： 多芯片模块具有至少两个半导体芯片。 每个半导体芯片具有半导体芯片的芯片电极，用于与芯片电极电连接的导电互连，用于与互连电连接的导电焊盘，设置在焊盘上的外部端子以及介于两者之间的应力松弛层 土地和半导体芯片。 半导体芯片通过外部端子放置在安装板上。 位于所述第二半导体芯片的最外端部的最外侧端子之间的距离小于第一半导体芯片的距离。

公开(公告)号：US06777816B2

公开(公告)日：2004-08-17

申请号：US10700470

申请日：2003-11-05

申请人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

发明人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

IPC分类号： H01L2131

CPC分类号： H01L23/3157 ,  H01L23/3114 ,  H01L23/3171 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/1005 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A multi-chip module has at least two semiconductor chips. Each of the semiconductor chips has chip electrodes of the semiconductor chip, electrically conductive interconnections for electrically connection with the chip electrodes, electrically conductive lands for electrically connection with the interconnections, external terminals placed on the lands, and a stress-relaxation layer intervening between the lands and the semiconductor chip. The semiconductor chips are placed on a mounting board via the external terminals. The stress-relaxation layer of a first semiconductor chip is thicker than the stress-relaxation layer of a second semiconductor chip having a distance from a center thereof to an external terminal positioned at an outermost end portion thereof smaller than that of the first semiconductor chip.

公开(公告)号：US06696765B2

公开(公告)日：2004-02-24

申请号：US09988415

申请日：2001-11-19

申请人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

发明人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

IPC分类号： H01L2131

CPC分类号： H01L23/3157 ,  H01L23/3114 ,  H01L23/3171 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/1005 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A multi-chip module has at least two semiconductor chips. Each of the semiconductor chips has chip electrodes of the semiconductor chip, electrically conductive interconnections for electrically connection with the chip electrodes, electrically conductive lands for electrically connection with the interconnections, external terminals placed on the lands, and a stress-relaxation layer intervening between the lands and the semiconductor chip. The semiconductor chips are placed on a mounting board via the external terminals. The stress-relaxation layer of a first semiconductor chip is thicker than the stress-relaxation layer of a second semiconductor chip having a distance from a center thereof to an external terminal positioned at an outermost end portion thereof smaller than that of the first semiconductor chip.

摘要翻译： 多芯片模块具有至少两个半导体芯片。 每个半导体芯片具有半导体芯片的芯片电极，用于与芯片电极电连接的导电互连，用于与互连电连接的导电焊盘，设置在焊盘上的外部端子以及介于两者之间的应力松弛层 土地和半导体芯片。 半导体芯片通过外部端子放置在安装板上。 第一半导体芯片的应力松弛层厚于第二半导体芯片的应力松弛层，该第二半导体芯片的距离其中心至位于其最外端部分的外部端子的距离小于第一半导体芯片的应力松弛层。

公开(公告)号：US4987474A

公开(公告)日：1991-01-22

申请号：US536932

申请日：1990-06-12

申请人： Toshihiro Yasuhara ,  Masachika Masuda ,  Asao Nishimura ,  Naozumi Hatada ,  Sueo Kawai ,  Makoto Kitano ,  Hideo Miura ,  Akihiro Yaguchi ,  Gen Murakami

发明人： Toshihiro Yasuhara ,  Masachika Masuda ,  Asao Nishimura ,  Naozumi Hatada ,  Sueo Kawai ,  Makoto Kitano ,  Hideo Miura ,  Akihiro Yaguchi ,  Gen Murakami

IPC分类号： H01L23/495

CPC分类号： H01L24/32 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/49558 ,  H01L2224/02166 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351

摘要： In a tabless lead frame wherein a space for laying inner leads is sufficiently secured when a lengthened and enlarged semiconductor pellet is placed or set in a resin-molding package, through holes are provided in leads for the purpose of increasing the occupation area ratio of a resin portion. Furthermore, each of the leads corresponding to the lower surface of the pellet is branched into a plurality of portions in the widthwise direction thereof in order to reduce a stress. Further, in an insulating sheet which is interposed between the leads and the pellet, the dimension of the shorter lateral sides thereof is set smaller than that of the shorter lateral sides of the pellet in order to prevent cracks from occurring at the end part of the insulating sheet.

摘要翻译： 在放置或放置在树脂成型包装体中的放大或放大的半导体芯片时，用于放置内部引线的空间被充分地固定的无引线框架中，为了增加占空比的目的，提供通孔 树脂部分。 此外，与颗粒的下表面相对应的每个引线在其宽度方向上分支成多个部分，以便减小应力。 此外，在介于引线和芯片之间的绝缘片中，其较短侧面的尺寸被设定为小于颗粒的较短侧面的尺寸，以防止在端部的端部发生裂纹 绝缘片。

公开(公告)号：USRE37690E1

公开(公告)日：2002-05-07

申请号：US08448881

申请日：1995-05-24

申请人： Makoto Kitano ,  Sueo Kawai ,  Asao Nishimura ,  Hideo Miura ,  Akihiro Yaguchi ,  Chikako van Koten nee Kitabayashi ,  Ichio Shimizu ,  Toshio Hatsuda ,  Toshinori Ozaki ,  Toshio Hattori ,  Souji Sakata

发明人： Makoto Kitano ,  Sueo Kawai ,  Asao Nishimura ,  Hideo Miura ,  Akihiro Yaguchi ,  Chikako van Koten nee Kitabayashi ,  Ichio Shimizu ,  Toshio Hatsuda ,  Toshinori Ozaki ,  Toshio Hattori ,  Souji Sakata

IPC分类号： H01L23495

CPC分类号： H01L23/49503 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/29007 ,  H01L2224/29111 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/00 ,  H01L2924/3512

摘要： A lead frame and a semiconductor device wherein a through hole is formed in the center of a semiconductor chip-mounting surface of a chip pad at the center of the lead frame, the through hole being tapered or being one which corresponds to a surface area that is greater on the surface of the chip-mounting surface of the chip pad than on the surface of the side opposite to the chip-mounting surface thereof. This prevents the occurrence of cracks in the sealing plastic portion in the step of reflow soldering of the lead frame to the substrate.

摘要翻译： 引线框架和半导体器件，其中在引线框架的中心处的芯片焊盘的半导体芯片安装表面的中心处形成有通孔，该通孔是锥形的，或者是对应于表面积的表面积 在芯片安装面的芯片安装面的表面上比在与芯片安装面相反的一侧的表面上更大。 这防止了在将引线框架回流焊接到基板的步骤中密封塑料部分中出现裂纹。

公开(公告)号：US5101263A

公开(公告)日：1992-03-31

申请号：US541220

申请日：1990-06-21

申请人： Makoto Kitano ,  Chikako Kitabayashi ,  Asao Nishimura ,  Hideo Miura ,  Akihiro Yaguchi ,  Sueo Kawai

发明人： Makoto Kitano ,  Chikako Kitabayashi ,  Asao Nishimura ,  Hideo Miura ,  Akihiro Yaguchi ,  Sueo Kawai

IPC分类号： H01L21/60 ,  H01L21/603 ,  H01L23/495

CPC分类号： H01L24/85 ,  H01L23/4952 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L2224/45013 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4851 ,  H01L2224/48511 ,  H01L2224/48599 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85047 ,  H01L2224/85181 ,  H01L2224/85947 ,  H01L2924/00011 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/20753 ,  H01L2924/351

摘要： In a plastic encapsulated semiconductor device, a part of wire piece may break down due to thermal fatigue, which positioned adjacent to a bonding portion of the wire piece connected to a chip. This is caused by that wire piece moves relative to plastic encapsulating the chip and the wire piece, and a strain in the wire piece due to thermal deformation of the device concentrates on one portion of the wire piece. Accordingly, a rugged portion is formed on a surface of a part of wire piece subjected to a breakdown to thermal fatigue. The plastic bites recesses of the rugged portion to prevent the wire piece from moving relative to the plastic, thereby preventing the wire piece from breaking down due to thermal fatigue.

摘要翻译： 在塑料封装的半导体器件中，由于热疲劳，导线的一部分可能会与连接到芯片的导线的接合部分相邻放置。 这是由于该线片相对于封装芯片和线材的塑料移动，并且由于该器件的热变形引起的线片中的应变集中在线材的一部分上。 因此，在经受击穿热疲劳的线材的一部分的表面上形成粗糙部分。 塑料咬住凹凸部分的凹槽，以防止线材相对于塑料移动，从而防止线材由于热疲劳而分解。