公开(公告)号：US6008523A

公开(公告)日：1999-12-28

申请号：US140573

申请日：1998-08-26

申请人： Chandrasekhar Narayan ,  Axel Brintzinger ,  Gabriel Daniel ,  Fred Einspruch

发明人： Chandrasekhar Narayan ,  Axel Brintzinger ,  Gabriel Daniel ,  Fred Einspruch

IPC分类号： H01L21/82 ,  G11C29/04 ,  H01L21/8242 ,  H01L23/525 ,  H01L27/00 ,  H01L27/108 ,  H01L29/00

CPC分类号： H01L23/5256 ,  H01L2924/0002

摘要： A semiconductor device includes an array of electrical fuses having a structure which permits tight fuse pitches while enabling electrical fusing at voltages of about 10 volts or less. The fuses are useful to replace defective components of the device and/or to permit custom wiring. The semiconductor device includes a substrate with a tight pitch array of fuses including a plurality of fuse links of selective cross sectional area in closely adjacent arrangement, each connected at one end to an individual connector terminal of larger cross sectional area than that of the fuse link, and at another end to a common connector terminal of larger cross sectional area than that of the individual connector terminals. The common connector terminal is typically held at a less positive potential than one of the individual connector terminals during the time a fuse link thereat is to be opened such that electron flow is in a direction from the common connector terminal to the fuse link. The common connector terminal cross sectional area is desirably about 2 or more times that of the individual fuse links to enable electrical fusing at voltages of about 10 volts or less.

摘要翻译： 半导体器件包括电熔丝阵列，其具有允许紧密的熔断器间距的结构，同时在约10伏或更小的电压下实现电熔断。 保险丝可用于更换设备的有缺陷的部件和/或允许定制接线。 半导体器件包括具有紧密间距阵列的保险丝的衬底，其包括紧密相邻布置的选择性横截面积的多个熔丝链，每个熔断体的一端连接到具有比熔丝链的横截面积大的截面面积的单个连接器端子 并且在另一端连接到具有比各个连接器端子更大横截面积的公共连接器端子。 通常，连接器端子通常保持在比其中一个单独的连接器端子更小的正电位，在其中的熔断体将被打开，使得电子流在从公共连接器端子到熔丝链的方向上。 共同的连接器端子横截面积理想的是大约是单个熔断体的2倍或更多倍，以使得能够在约10伏或更小的电压下进行电熔断。

公开(公告)号：US06288436B1

公开(公告)日：2001-09-11

申请号：US09361960

申请日：1999-07-27

申请人： Chandrasekhar Narayan ,  Kenneth Arndt ,  Toshiaki Kirihata ,  David Lachtrupp ,  Axel Brintzinger ,  Gabriel Daniel

发明人： Chandrasekhar Narayan ,  Kenneth Arndt ,  Toshiaki Kirihata ,  David Lachtrupp ,  Axel Brintzinger ,  Gabriel Daniel

IPC分类号： H01L2900

CPC分类号： H01L22/22 ,  H01L23/5256 ,  H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

摘要： A plurality of fuses of different types, each type of fuse serving a specific purpose are positioned on a semiconductor integrated circuit wafer, wherein activating one type of fuse does not incapacitate fuses of a different type. Fuses of the first type, e.g., laser activated fuses, are primarily used for repairing defects at the wafer level, whereas fuses of the second type, e.g., electrically activated fuses, are used for repairing defects found after mounting the IC chips on a module and stressing the module at burn-in test. Defects at the module level typically are single cell failures which are cured by the electrically programmed fuses to activate module level redundancies.

摘要翻译： 多种不同类型的保险丝，每种类型的用于特定用途的保险丝都位于半导体集成电路晶片上，其中激活一种类型的保险丝不会使不同类型的保险丝失效。 第一种类型的保险丝，例如激光激活的保险丝，主要用于修复晶圆级的缺陷，而第二种类型的保险丝，例如电激活保险丝，用于修复将IC芯片安装在模块上所发现的缺陷 并在老化测试中强调模块。 模块级别的缺陷通常是单电池故障，它们由电气编程的保险丝固化，以激活模块级冗余。

公开(公告)号：US06436585B1

公开(公告)日：2002-08-20

申请号：US09512923

申请日：2000-02-25

申请人： Chandrasekhar Narayan ,  Axel Brintzinger ,  Fred L. Einspruch ,  Henning Haffner ,  Alan C. Thomas

发明人： Chandrasekhar Narayan ,  Axel Brintzinger ,  Fred L. Einspruch ,  Henning Haffner ,  Alan C. Thomas

IPC分类号： G03F900

CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of making a photolithography mask for use in creating an electrical fuse on a semiconductor structure comprises initially determining a pattern for a desired electrical fuse, with the pattern including a fuse portion of substantially constant width except for a localized narrowed region of the fuse portion at which the electrical fuse is designed to blow. The method then includes providing a photolithography mask substrate and creating on the photolithography mask substrate a fuse mask element adapted to absorb transmission of an energy beam. The fuse mask element has a first mask portion of substantially constant width corresponding to the desired electrical fuse pattern portion of substantially constant width, and a second mask portion corresponding to the localized narrowed region of the fuse portion. The second mask portion comprises either an additional mask element spaced from the first mask portion, a narrowed width portion, or a gap in the first mask portion. The second mask portion is of a configuration sufficient to create a latent image of the electrical fuse pattern, including the localized narrowed region of the fuse portion at which the electrical fuse is designed to blow, upon passing the energy beam through the photolithography mask and onto a resist layer. Preferably, the fuse portion of substantially constant width on the determined fuse pattern has a design width less than about 0.25 &mgr;m, and wherein the localized narrowed region of the fuse portion has a design width less than the design width of the fuse portion.

摘要翻译： 制造用于在半导体结构上形成电熔丝的光刻掩模的方法包括：首先确定所需电熔丝的图案，其中所述图案包括基本恒定宽度的熔丝部分，除了熔丝部分的局部变窄区域 电熔丝被设计在其上。 该方法然后包括提供光刻掩模基板，并在光刻掩模基板上产生适于吸收能量束透射的熔丝屏蔽元件。 熔丝掩模元件具有对应于基本恒定宽度的期望电熔丝图案部分的基本恒定宽度的第一掩模部分和对应于熔丝部分的局部变窄区域的第二掩模部分。 第二掩模部分包括与第一掩模部分间隔开的附加掩模元件，第一掩模部分中的窄宽度部分或间隙。 第二掩模部分具有足以产生电熔丝图案的潜像的构造，包括将电熔丝设计成熔断部分的熔断部分的局部变窄区域，以使能量束通过光刻掩模并进入 抗蚀剂层。 优选地，在确定的熔丝图案上的基本恒定宽度的熔丝部分具有小于约0.25μm的设计宽度，并且其中熔断器部分的局部变窄区域具有小于熔丝部分的设计宽度的设计宽度。

公开(公告)号：US06323535B1

公开(公告)日：2001-11-27

申请号：US09595764

申请日：2000-06-16

申请人： Sundar K. Iyer ,  Peter Smeys ,  Chandrasekhar Narayan ,  Subramanian Iyer ,  Axel Brintzinger

发明人： Sundar K. Iyer ,  Peter Smeys ,  Chandrasekhar Narayan ,  Subramanian Iyer ,  Axel Brintzinger

IPC分类号： H01L2900

CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： A fuse for semiconductor devices, in accordance with the present invention, includes a cathode including a first dopant type, and an anode including a second dopant type where the second dopant type is opposite the first dopant type. A fuse link connects the cathode and the anode and includes the second dopant type. The fuse link and the cathode form a junction therebetween, and the junction is configured to be reverse biased relative to a cathode potential and an anode potential. A conductive layer is formed across the junction such that current flowing at the junction is diverted into the conductive layer to enhance material migration to program the fuse.

摘要翻译： 根据本发明的用于半导体器件的熔丝包括第一掺杂剂类型的第一掺杂剂类型的阴极和包括第二掺杂剂类型的第二掺杂剂类型的阳极。 熔丝连接器连接阴极和阳极并且包括第二掺杂剂类型。 熔丝链和阴极在它们之间形成一个结，并且该结被配置为相对于阴极电位和阳极电位被反向偏置。 导电层跨越结形成，使得在结处流动的电流被转移到导电层中以增强材料迁移以对熔丝进行编程。

公开(公告)号：US20110109998A1

公开(公告)日：2011-05-12

申请号：US12614275

申请日：2009-11-06

申请人： David Berman ,  Robert G. Biskeborn ,  Michel Despont ,  Philipp Herget ,  Wayne Isami Imaino ,  Pierre-Olivier Jubert ,  Peter V. Koeppe ,  Chandrasekhar Narayan

发明人： David Berman ,  Robert G. Biskeborn ,  Michel Despont ,  Philipp Herget ,  Wayne Isami Imaino ,  Pierre-Olivier Jubert ,  Peter V. Koeppe ,  Chandrasekhar Narayan

IPC分类号： G11B5/33 ,  B05D5/12

CPC分类号： G11B5/3163 ,  G11B5/00826 ,  G11B5/398

摘要： In one embodiment, a read sensor for a recording head for a magnetic media storage system, has first and second shields, and a magneto-resistive sensor disposed between and shielded by the first and second shields in which the sensing axis of the sensor is tilted with respect to the recording surface of the head. In one embodiment, the sensing axis is oriented at an angle between 10 and 60 degrees with respect to the normal of the recording surface. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，用于磁性介质存储系统的记录头的读取传感器具有第一和第二屏蔽以及设置在第一和第二屏蔽之间并被传感器的感测轴倾斜的屏蔽的磁阻传感器 相对于头部的记录表面。 在一个实施例中，感测轴相对于记录表面的法线定向成10度至60度的角度。 描述和要求保护其他实施例。

公开(公告)号：US07486845B2

公开(公告)日：2009-02-03

申请号：US11870463

申请日：2007-10-11

申请人： Charles T. Black ,  Gian-Luca Bona ,  Timothy J. Dalton ,  Nicholas C. M. Fuller ,  Roland Germann ,  Maurice McGlashan-Powell ,  Chandrasekhar Narayan ,  Robert L. Sandstorm

发明人： Charles T. Black ,  Gian-Luca Bona ,  Timothy J. Dalton ,  Nicholas C. M. Fuller ,  Roland Germann ,  Maurice McGlashan-Powell ,  Chandrasekhar Narayan ,  Robert L. Sandstorm

IPC分类号： G02B6/00 ,  G02B6/10

CPC分类号： G02B6/126 ,  B29D11/00759 ,  G02B6/136 ,  G02B2006/1215

摘要： A method in effectuating the redirection of light which is propagated within a waveguide, and which eliminates the necessity for a bending of the waveguide, or the drawbacks encountered in directional changes in propagated light involving the need for sharp curves of essentially small-sized radii, which would resultingly lead to excessive losses in light. In this connection, the method relates to the fabricating and the provision of a wire-grid polarization beam splitter within an optical waveguide, which utilizes a diblock copolymer template to formulate the wire-grid.

摘要翻译： 实现在波导内传播的光的重定向并且消除波导的弯曲的必要性的方法或者涉及需要基本上小的半径的尖锐曲线的传播光的方向性变化中遇到的缺点， 这将导致轻微的过度损失。 在这方面，该方法涉及在光波导内制造和提供线栅偏振分束器，其利用二嵌段共聚物模板来配制线栅。

公开(公告)号：US20050121711A1

公开(公告)日：2005-06-09

申请号：US11033926

申请日：2005-01-12

申请人： H. Pogge ,  Roy Yu ,  Chandrika Prasad ,  Chandrasekhar Narayan

发明人： H. Pogge ,  Roy Yu ,  Chandrika Prasad ,  Chandrasekhar Narayan

IPC分类号： H01L23/12 ,  H01L21/68 ,  H01L21/768 ,  H01L23/48 ,  H01L23/485 ,  H01L23/525 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H01L21/8234 ,  H01L27/108 ,  H01L29/76 ,  H01L31/119

CPC分类号： H01L24/10 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/525 ,  H01L24/13 ,  H01L24/81 ,  H01L25/0652 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/06181 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/17181 ,  H01L2224/81005 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： A process is described for semiconductor device integration at chip level or wafer level, in which vertical connections are formed through a substrate. A metallized feature is formed in the top surface of a substrate, and a handling plate is attached to the substrate. The substrate is then thinned at the bottom surface thereof to expose the bottom of the feature, to form a conducting through-via. The substrate may comprise a chip having a device (e.g. DRAM) fabricated therein. The process therefore permits vertical integration with a second chip (e.g. a PE chip). The plate may be a wafer attached to the substrate using a vertical stud/via interconnection. The substrate and plate may each have devices fabricated therein, so that the process provides vertical wafer-level integration of the devices.

公开(公告)号：US6141267A

公开(公告)日：2000-10-31

申请号：US243645

申请日：1999-02-03

申请人： Toshiaki Kirihata ,  Louis Lu-Chen Hsu ,  Chandrasekhar Narayan

发明人： Toshiaki Kirihata ,  Louis Lu-Chen Hsu ,  Chandrasekhar Narayan

IPC分类号： G11C5/02 ,  G11C8/06 ,  G11C11/00 ,  G11C29/00 ,  G11C7/00

CPC分类号： G11C29/808 ,  G11C11/005 ,  G11C29/846 ,  G11C5/02 ,  G11C8/06

摘要： A defect management engine (DME) for memories integrates a plurality of redundancy data cells and a plurality of redundancy address cells in the same array. The redundancy data cells are used for replacing defective cells in the memories. The redundancy address cells store the addresses of the defective cells. The memories are preferably sub-divided into a plurality of domains. A plurality of defective cells in each domain are supported by a plurality of repair units, each consisting of one or more redundancy data bits and redundancy address bits in the DME. When one or more data bits are read from a domain in the memory, the corresponding wordline in the DME simultaneously activates a plurality of repair units coupling to the wordline (self-contained domain selection). The redundancy data bits and the redundancy address bits are also read from the redundancy data cells and redundancy address cells, respectively. The DME logic detects whether or not the redundancy address bits match or do not match the address inputs of each repair unit (self contained redundancy match detection). This couples either redundancy data bits from the DME (i.e., a matching condition) or the data bits from the domain in the memories (i.e., a no match condition) to the corresponding DQ (self-contained redundancy replacement). The DME enables an integrated redundancy means (self-contained domain selection, self-contained redundancy match detection, and self-contained redundancy replacement). Single bit replacement, multi-bit replacement, line replacement, and variable bit size replacement are discussed. Finally, an extension of the DME concept to a memory system is also discussed.

摘要翻译： 用于存储器的缺陷管理引擎（DME）将多个冗余数据单元和多个冗余地址单元集成在相同的阵列中。 冗余数据单元用于替换存储器中的有缺陷的单元。 冗余地址单元存储有缺陷单元的地址。 存储器优选地被细分为多个域。 每个域中的多个缺陷单元由多个修复单元支持，每个修复单元由DME中的一个或多个冗余数据位和冗余地址位组成。 当从存储器中的域读取一个或多个数据位时，DME中的相应字线同时激活耦合到字线（自包含域选择）的多个修复单元。 冗余数据位和冗余地址位也分别从冗余数据单元和冗余地址单元读取。 DME逻辑检测冗余地址位是否匹配或不匹配每个修复单元的地址输入（自包含冗余匹配检测）。 这将来自DME的冗余数据位（即，匹配条件）或来自存储器中的域的数据位（即，不匹配条件）耦合到相应的DQ（独立冗余替换）。 DME可实现集成的冗余手段（自包含域选择，独立冗余匹配检测和自包含冗余替换）。 讨论了单位替换，多位替换，线替换和可变位大小替换。 最后还讨论了将DME概念扩展到内存系统。

公开(公告)号：US5641114A

公开(公告)日：1997-06-24

申请号：US475255

申请日：1995-06-07

申请人： Raymond Robert Horton ,  Chandrasekhar Narayan ,  Michael Jon Palmer

发明人： Raymond Robert Horton ,  Chandrasekhar Narayan ,  Michael Jon Palmer

IPC分类号： B23K1/00 ,  B23K31/02 ,  B23K37/00

CPC分类号： B23K1/0016 ,  B23K2201/40

摘要： In a bonding station the parts of the apparatus to be bonded are retained at a thermal bias temperature at a permitted level and a thermal check valve interface is provided between the bonding location and the part of the station that would serve as a conduction heat sink, thereby thermally insulating other uninvolved parts of the structure and and confining the bonding heat to the bonding region. Such confinement reduces the dwell time that the bond must remain at the bonding temperature. The bonding station has a number of features: the parts to be bonded are maintained on a support member that is provided with a heat biasing capability that can establish the assembly at a specified temperature; a retention capability, such as the use of vacuum, is provided to maintain registration and thermal contact of the part with the support; and a thermal check valve capability is provided to control the rate of heat flow through the support member so that locallized heat is controlled in dissipation.

摘要翻译： 在接合站中，要被接合的设备的部件被保持在允许的水平的热偏压温度，并且在用作传导散热器的接合位置和站的部分之间提供热止回阀接口， 从而将结构的其它未掺杂部分进行绝热并且将结合热限制到接合区域。 这种限制减少了粘合在粘合温度下必须保持的停留时间。 粘合台具有许多特征：待粘合的部件被保持在具有可在规定温度下建立组件的热偏置能力的支撑部件上; 提供保持能力，例如使用真空，以保持部件与支撑件的配准和热接触; 并且提供热止回阀能力以控制通过支撑构件的热流的速率，从而控制局部放热的散热。

公开(公告)号：US5619357A

公开(公告)日：1997-04-08

申请号：US466317

申请日：1995-06-06

申请人： Marie Angelopoulos ,  Ali Afzali-Ardakani ,  Claudius Feger ,  Chandrasekhar Narayan

发明人： Marie Angelopoulos ,  Ali Afzali-Ardakani ,  Claudius Feger ,  Chandrasekhar Narayan

IPC分类号： G02F1/1335

CPC分类号： G02F1/133512

摘要： A thin film transistor display that comprises a black matrix polymer layer, comprising a polymer having an optical density of at least about 0.8 per .mu.m and being self-absorbent of visible light and being selected from the group consisting of substituted and unsubstituted polyanilines, substituted and unsubstituted polyparaphenylenevinylenes, substituted and unsubstituted polythiophenes, substituted and unsubstituted polyazines, substituted and unsubstituted polyparaphenylenes, substituted and unsubstituted polyfuranes, substituted and unsubstituted polypyrroles, substituted and unsubstituted polyselenophene, substituted and unsubstituted poly-p-phenylene sulfides and substituted and unsubstituted polyacetylenes, and mixtures thereof, and copolymers thereof. The layer also comprises one or more pigments. The resistivity of the black matrix composite is 10E12 to 10E14 ohm cm.

摘要翻译： 一种薄膜晶体管显示器，其包括黑矩阵聚合物层，其包含光密度为至少约0.8每μm的聚合物，并且是可吸收的可见光，并且选自取代和未取代的聚苯胺，取代的 取代和未取代的聚噻吩，取代和未取代的聚噻吩，取代和未取代的聚嗪，取代和未取代的聚对苯二烯，取代和未取代的聚呋喃，取代和未取代的聚吡咯，取代和未取代的聚硒吩，取代和未取代的聚对苯硫醚和取代和未取代的聚乙炔， 其混合物，及其共聚物。 该层还包含一种或多种颜料。 黑色矩阵复合材料的电阻率为10E12至10E14欧姆厘米。