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1.发明授权公开(公告)号：US08952262B2
公开(公告)日：2015-02-10
申请号：US13599326
申请日：2012-08-30
IPC分类号： H05K1/16 , H05K1/09 , H05K1/11 , H05K1/18 , H05K3/30 , H01L23/64 , H01L23/498 , H05K3/46 , H05K1/02 , H01L23/50
CPC分类号： H05K1/185 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L23/642 , H01L2224/16225 , H01L2924/15311 , H05K1/0231 , H05K3/4602 , H05K2201/0187 , H05K2201/09827 , H05K2201/09854 , H05K2201/10015 , H05K2201/10636 , H05K2201/10734 , H05K2203/1469 , Y02P70/611 , Y10T29/49139
摘要： A component-incorporated wiring substrate is provided. Some embodiments include a plate-like component incorporated in a core substrate and a build-up layer having an insulation layer and a conductor layer disposed in alternating layers. The component has terminal electrodes formed at its opposite ends having a side surface and a main surface. An insulation layer disposed on the main surface of the component has via conductors formed therein which are connected to the side surfaces and the main surfaces of the respective terminal electrodes. The via conductors are tapered, such that their via diameter decreases in a direction toward the terminal electrode, and their via diameter at a position where they connect to the main surface is greater than a length of the main surface. Accordingly, the area of connection between the via conductors and the corresponding terminal electrodes is increased, improving connection reliability through enhancement of tolerance for positional deviation.
摘要翻译： 提供了一种构成部件的布线基板。 一些实施例包括结合在芯基板中的板状部件和具有设置在交替层中的绝缘层和导体层的堆积层。 该部件具有在其相对端形成的端子电极，其侧表面和主表面。 设置在部件的主表面上的绝缘层具有形成在其中的通孔导体，其连接到各个端子电极的侧表面和主表面。 通孔导体是锥形的，使得它们的通孔直径在朝向端子电极的方向上减小，并且它们在它们连接到主表面的位置处的通孔直径大于主表面的长度。 因此，通孔导体与对应的端子电极之间的连接面积增加，通过增加位置偏差的公差来提高连接的可靠性。
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公开(公告)号：US20120152598A1
公开(公告)日：2012-06-21
申请号：US13326016
申请日：2011-12-14
申请人： Erina YAMADA , Kazunaga Higo , Hironori Sato
发明人： Erina YAMADA , Kazunaga Higo , Hironori Sato
CPC分类号： B23K1/0016 , B23K2101/42 , H01L24/16 , H01L2224/16225 , H01L2924/14 , H05K3/3473 , H05K3/3478 , H05K2201/0341 , H05K2203/041 , H05K2203/043 , H05K2203/054 , H05K2203/0574 , H05K2203/1476 , H01L2924/00
摘要： Disclosed is a method for manufacturing a wiring board including a conductor layer, a solder resist layer laminated on the conductor layer, and a conductor post to be electrically connected to a conductor layer which is disposed in a lower portion of a through-hole provided in the solder resist layer, the method including a through-hole boring process of boring the through-hole in the solder resist layer containing a thermosetting resin to expose the conductor layer within the through-hole; a first conductor part forming process of forming a first conductor part composed mainly of copper within the through-hole; and a second conductor part forming process of forming a second conductor part composed mainly of tin, copper, or a solder on the first conductor part, in this order.
摘要翻译： 公开了一种制造布线板的方法，该布线板包括导体层，层压在导体层上的阻焊层，以及导体柱，该导体柱与导体层电连接，该导体层设置在设置在导体层中的通孔的下部 阻焊层，该方法包括在包含热固性树脂的阻焊层中钻通孔的通孔钻孔工艺，以暴露通孔内的导体层; 在所述通孔内形成主要由铜构成的第一导体部的第一导体部形成工序; 以及在第一导体部分上形成主要由锡，铜或焊料组成的第二导体部分的第二导体部分形成工艺。
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公开(公告)号：US08809692B2
公开(公告)日：2014-08-19
申请号：US13325431
申请日：2011-12-14
申请人： Erina Yamada , Kazunaga Higo , Hironori Sato
发明人： Erina Yamada , Kazunaga Higo , Hironori Sato
IPC分类号： H05K1/09 , H01L23/15 , H01L23/498
CPC分类号： H01L23/15 , H01L23/49816 , H01L23/49894 , H01L2924/0002 , H01L2924/00
摘要： A wiring board including a conductor post corresponding to high-density packaging is provided. The wiring board may include a conductor layer, a solder resist layer laminated thereon, and a conductor post provided at least within the through-hole and that is electrically connected to a conductor layer which is disposed in a lower portion of a through-hole provided in the layer, wherein the solder resist layer comprises a thermosetting resin; the conductor post comprises tin, copper, or a solder and includes a lower conductor post located within the through-hole and an upper conductor post located above the lower conductor post and projected outside the layer; the lower conductor post includes an external alloy layer disposed on an external side surface thereof; and the conductor post is brought into intimate contact with an internal side surface of the through-hole via the external alloy layer.
摘要翻译： 提供了包括对应于高密度封装的导体柱的布线板。 布线板可以包括导体层，层压在其上的阻焊层，以及至少设置在通孔内的导体柱，并且电连接到布置在设置在通孔中的通孔的下部的导体层 在该层中，其中阻焊层包含热固性树脂; 所述导体柱包括锡，铜或焊料，并且包括位于所述通孔内的下导体柱和位于所述下导体柱上方并突出在所述层外侧的上导体柱; 下导体柱包括设置在其外侧表面上的外部合金层; 并且导体柱经由外部合金层与通孔的内侧表面紧密接触。
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公开(公告)号：US08785786B2
公开(公告)日：2014-07-22
申请号：US13325767
申请日：2011-12-14
申请人： Erina Yamada , Kazunaga Higo , Hironori Sato
发明人： Erina Yamada , Kazunaga Higo , Hironori Sato
CPC分类号： B23K1/0016 , B23K2101/42 , H01L21/4853 , H01L23/49816 , H01L24/16 , H01L2224/16225 , H05K3/244 , H05K3/3473 , H05K3/4007 , H05K2201/0341 , H05K2201/0367 , H05K2203/054
摘要： A wiring board including a conductor post corresponding to high-density packaging is provided. The wiring board may comprise a conductor layer, a solder resist layer laminated on the conductor layer, and a conductor post that is electrically connected to a conductor layer which is disposed in a lower portion of a through-hole provided in the solder resist layer, wherein the solder resist layer comprises a thermosetting resin; the conductor post comprises tin, copper, or a solder; the conductor post includes a lower conductor post, which is located within the through-hole and includes an external side surface and a lower end surface, and an upper conductor post, which is located above the lower conductor post and is projected outside the solder resist layer; and at least a part of a lower end surface of the upper conductor post is brought into intimate contact with an outer surface of the solder resist layer.
摘要翻译： 提供了包括对应于高密度封装的导体柱的布线板。 布线基板可以包括导体层，层叠在导体层上的阻焊层，以及导体柱，其电连接到布置在设置在阻焊层中的通孔的下部的导体层， 其中所述阻焊层包含热固性树脂; 导体柱包括锡，铜或焊料; 导体柱包括位于通孔内并包括外侧表面和下端表面的下导体柱和位于下导体柱上方并被突出在阻焊层外侧的上导体柱 层; 并且上导体柱的下端表面的至少一部分与阻焊层的外表面紧密接触。
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公开(公告)号：US07339260B2
公开(公告)日：2008-03-04
申请号：US10927134
申请日：2004-08-27
CPC分类号： H01L23/66 , H01L2224/16 , H01L2924/01079 , H01L2924/09701 , H01L2924/15311 , H01L2924/3011 , H01L2924/3025 , H05K1/0222 , H05K1/0251 , H05K1/113 , H05K3/4602 , H05K2201/093 , H05K2201/09309 , H05K2201/09536 , H05K2201/096 , H05K2201/09618 , H05K2201/09627 , H05K2201/0969 , H05K2201/09718 , H05K2201/09809
摘要： A wiring board comprising: a plate core having a first main surface and a second main surface; conductor layers including a conductor line; dielectric layers laminated alternately with said conductor layers on at least one of said first and second main surfaces; via conductors as defined herein; a signal through-hole as defined herein; a signal through-hole conductor as defined herein; a first path end pad as defined herein; a second path end pad as defined herein; a shield through-hole as defined herein; and a shield through-hole conductor as defined herein; wherein: a signal transmission path is formed as defined herein; at least one of said conductor layers is disposed on each of said first and second main surface sides; said surface conductor on said first main surface side and said conductor line form a strip line, a microstrip line, or a coplanar waveguide with constant characteristic impedance Z0; an inner surface of said shield through-hole is covered with said shield through-hole conductor; and an interaxis distance between said signal through-hole conductor and said shield through-hole conductor is adjusted as defined herein.
摘要翻译： 一种布线板，包括：板芯，具有第一主表面和第二主表面; 包括导体线的导体层; 电介质层与所述导体层交替地层叠在所述第一和第二主表面中的至少一个上; 通孔导体; 如本文所定义的信号通孔; 如本文所定义的信号通孔导体; 如本文所定义的第一路径端垫; 如本文所定义的第二路径端垫; 如本文所定义的屏蔽通孔; 和如本文所定义的屏蔽通孔导体; 其中：如本文所定义的形成信号传输路径; 所述导体层中的至少一个设置在所述第一和第二主表面侧的每一个上; 所述第一主表面侧的所述表面导体和所述导体线形成具有恒定特性阻抗Z 0的带状线，微带线或共面波导; 所述屏蔽通孔的内表面被所述屏蔽通孔导体覆盖; 并且如本文所定义的那样调整所述信号通孔导体和所述屏蔽通孔导体之间的间隔距离。
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公开(公告)号：US08674236B2
公开(公告)日：2014-03-18
申请号：US13368840
申请日：2012-02-08
申请人： Kazunaga Higo , Hidemasa Igarashi , Masatsune Arakawa , Erina Yamada , Kenji Suzuki , Tomohito Ando , Hironori Sato , Takuya Torii
发明人： Kazunaga Higo , Hidemasa Igarashi , Masatsune Arakawa , Erina Yamada , Kenji Suzuki , Tomohito Ando , Hironori Sato , Takuya Torii
CPC分类号： H05K1/0242 , H01L23/49822 , H01L23/49827 , H01L2924/0002 , H05K3/389 , H05K3/4644 , H05K2201/0347 , H05K2201/098 , H01L2924/00
摘要： A wiring substrate is configured such that each of laminate portions provided above and below a substrate core includes insulating layers and conductor layers stacked alternately. Of the conductor layers of the laminate portions, signal line layers are treated with a silane coupling treatment, which is a surface modification treatment, so that each signal line comprises a flat surface. A roughening treatment is performed on the remaining conductor layers of the laminate portions such that the surfaces of these layers are roughened. This structure provides an advantage when high-frequency signals are transmitted through the signal line layers. That is, when each signal line comprises a flat surface, an increase in conductor loss due to the skin effect can be prevented. In addition, by means of chemical bonding attained through the silane coupling treatment, the reliability of adhesion between the signal line layers and the insulating layer is sufficiently attained.
摘要翻译： 布线基板被构造成使得设置在基板芯的上方和下方的每个层叠部分包括交替堆叠的绝缘层和导体层。 在层压体部分的导体层中，用作为表面改性处理的硅烷偶联处理来处理信号线层，使得每个信号线包括平坦表面。 对层压体部分的剩余导体层进行粗糙化处理，使得这些层的表面变粗糙。 当高频信号通过信号线层传输时，这种结构提供了一个优点。 也就是说，当每个信号线包括平坦表面时，可以防止由于皮肤效应引起的导体损耗的增加。 此外，通过通过硅烷偶联处理获得的化学键合，充分获得信号线层与绝缘层之间的粘合的可靠性。
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公开(公告)号：US08387241B2
公开(公告)日：2013-03-05
申请号：US13025557
申请日：2011-02-11
申请人： Masaki Muramatsu , Kenji Nishio , Kazunaga Higo , Hironori Sato , Takuya Torii , Masao Izumi
发明人： Masaki Muramatsu , Kenji Nishio , Kazunaga Higo , Hironori Sato , Takuya Torii , Masao Izumi
IPC分类号： H01K3/10
CPC分类号： H05K3/465 , H05K3/0032 , H05K2203/0557 , H05K2203/108 , Y10T29/49117 , Y10T29/49155 , Y10T29/49165
摘要： A method of fabricating a wiring board including at least one conductor layer and at least one resin insulating layer, the method including a wiring groove forming step of forming a wiring groove in the resin insulating layer by irradiating a surface of the resin insulating layer with a laser, and a wiring layer forming step of forming the conductor layer such that at least a portion of the conductor layer is embedded in the wiring groove to form a wiring layer in the wiring groove.
摘要翻译： 一种制造包括至少一个导体层和至少一个树脂绝缘层的布线板的方法，所述方法包括：布线槽形成步骤，通过用树脂绝缘层的表面照射树脂绝缘层的表面，在所述树脂绝缘层中形成布线槽 以及形成导体层的布线层形成步骤，使得导体层的至少一部分嵌入布线槽中，以在布线槽中形成布线层。
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公开(公告)号：US20060043572A1
公开(公告)日：2006-03-02
申请号：US10927134
申请日：2004-08-27
IPC分类号： H01L29/40
CPC分类号： H01L23/66 , H01L2224/16 , H01L2924/01079 , H01L2924/09701 , H01L2924/15311 , H01L2924/3011 , H01L2924/3025 , H05K1/0222 , H05K1/0251 , H05K1/113 , H05K3/4602 , H05K2201/093 , H05K2201/09309 , H05K2201/09536 , H05K2201/096 , H05K2201/09618 , H05K2201/09627 , H05K2201/0969 , H05K2201/09718 , H05K2201/09809
摘要： A wiring board comprising: a plate core having a first main surface and a second main surface; conductor layers including a conductor line; dielectric layers laminated alternately with said conductor layers on at least one of said first and second main surfaces; via conductors as defined herein; a signal through-hole as defined herein; a signal through-hole conductor as defined herein; a first path end pad as defined herein; a second path end pad as defined herein; a shield through-hole as defined herein; and a shield through-hole conductor as defined herein; wherein: a signal transmission path is formed as defined herein; at least one of said conductor layers is disposed on each of said first and second main surface sides; said surface conductor on said first main surface side and said conductor line form a strip line, a microstrip line, or a coplanar waveguide with constant characteristic impedance Z0; an inner surface of said shield through-hole is covered with said shield through-hole conductor; and an interaxis distance between said signal through-hole conductor and said shield through-hole conductor is adjusted as defined herein.
摘要翻译： 一种布线板，包括：板芯，具有第一主表面和第二主表面; 包括导体线的导体层; 电介质层与所述导体层交替地层叠在所述第一和第二主表面中的至少一个上; 通孔导体; 如本文所定义的信号通孔; 如本文所定义的信号通孔导体; 如本文所定义的第一路径端垫; 如本文所定义的第二路径端垫; 如本文所定义的屏蔽通孔; 和如本文所定义的屏蔽通孔导体; 其中：如本文所定义的形成信号传输路径; 所述导体层中的至少一个设置在所述第一和第二主表面侧的每一个上; 所述第一主表面侧的所述表面导体和所述导体线形成具有恒定特性阻抗Z0的带状线，微带线或共面波导; 所述屏蔽通孔的内表面被所述屏蔽通孔导体覆盖; 并且如本文所定义的那样调节所述信号通孔导体和所述屏蔽通孔导体之间的间隔距离。
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