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公开(公告)号:US08822841B2
公开(公告)日:2014-09-02
申请号:US13411168
申请日:2012-03-02
申请人: Dong Gyu Lee , Jin Won Choi , Sung Won Jeong , Dae Young Lee , Gi Sub Lee , Jin Ho Kim
发明人: Dong Gyu Lee , Jin Won Choi , Sung Won Jeong , Dae Young Lee , Gi Sub Lee , Jin Ho Kim
CPC分类号: H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/0346 , H01L2224/0347 , H01L2224/0401 , H01L2224/05572 , H01L2224/05647 , H01L2224/10145 , H01L2224/1146 , H01L2224/11849 , H01L2224/13022 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/13111 , H01L2224/13144 , H01L2224/13155 , H01L2224/13164 , H01L2224/81191 , H01L2224/81193 , H01L2224/81815 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/014 , Y10T29/49165 , H01L2924/00012 , H01L2924/01028 , H01L2924/01046 , H01L2924/01083 , H01L2224/05552
摘要: Disclosed herein are a package substrate and a fabricating method thereof. The package substrate includes a substrate including at least one conductive pad, an insulation layer formed on the substrate and including an opening through which the conductive pad is exposed, a blister prevention layer formed along a top surface of the conductive pad exposed through the opening and a sidewall of the insulation layer, a metal post made of at least one alloy material and formed on the blister prevention layer, and a heat-diffusion prevention film formed on the metal post.
摘要翻译: 这里公开了一种封装基板及其制造方法。 封装衬底包括:衬底,其包括至少一个导电焊盘,形成在衬底上的绝缘层,并且包括导电焊盘暴露的开口,沿着通过开口暴露的导电焊盘的顶表面形成的防泡层, 绝缘层的侧壁,由至少一种合金材料制成并形成在防泡层上的金属柱以及形成在金属柱上的热扩散防止膜。
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公开(公告)号:US20120267285A1
公开(公告)日:2012-10-25
申请号:US13411168
申请日:2012-03-02
申请人: Dong Gyu LEE , Jin Won Choi , Sung Won Jeong , Dae Young Lee , Gi Sub Lee , Jin Ho Kim
发明人: Dong Gyu LEE , Jin Won Choi , Sung Won Jeong , Dae Young Lee , Gi Sub Lee , Jin Ho Kim
CPC分类号: H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/0346 , H01L2224/0347 , H01L2224/0401 , H01L2224/05572 , H01L2224/05647 , H01L2224/10145 , H01L2224/1146 , H01L2224/11849 , H01L2224/13022 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/13111 , H01L2224/13144 , H01L2224/13155 , H01L2224/13164 , H01L2224/81191 , H01L2224/81193 , H01L2224/81815 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/014 , Y10T29/49165 , H01L2924/00012 , H01L2924/01028 , H01L2924/01046 , H01L2924/01083 , H01L2224/05552
摘要: Disclosed herein are a package substrate and a fabricating method thereof. The package substrate includes a substrate including at least one conductive pad, an insulation layer formed on the substrate and including an opening through which the conductive pad is exposed, a blister prevention layer formed along a top surface of the conductive pad exposed through the opening and a sidewall of the insulation layer, a metal post made of at least one alloy material and formed on the blister prevention layer, and a heat-diffusion prevention film formed on the metal post.
摘要翻译: 这里公开了一种封装基板及其制造方法。 封装衬底包括:衬底,其包括至少一个导电焊盘,形成在衬底上的绝缘层,并且包括导电焊盘暴露的开口,沿着通过开口暴露的导电焊盘的顶表面形成的防泡层, 绝缘层的侧壁,由至少一种合金材料制成并形成在防泡层上的金属柱以及形成在金属柱上的热扩散防止膜。
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公开(公告)号:US20110068473A1
公开(公告)日:2011-03-24
申请号:US12805559
申请日:2010-08-05
申请人: Ki Taek Lee , Hueng Jae OH , Sung Won Jeong , Gi Sub Lee , Jin Won Choi
发明人: Ki Taek Lee , Hueng Jae OH , Sung Won Jeong , Gi Sub Lee , Jin Won Choi
IPC分类号: H01L23/498 , H01B5/00
CPC分类号: H01L23/49811 , H01L23/49805 , H01L2924/0002 , H01L2924/09701 , H01L2924/00
摘要: There is provided a lead pin for a package substrate including: a connection pin being inserted into a hole formed in an external substrate; a head part formed on one end of the connection pin; and a barrier part formed on one surface of the head part in order to block the path of a solder paste so that the solder paste is prevented from flowing so as to cover the upper portion of the head part when the head part is mounted on the package substrate.
摘要翻译: 提供了一种用于封装基板的引脚,包括:连接销插入形成在外部基板中的孔中; 形成在连接销的一端的头部; 以及形成在头部的一个表面上的阻挡部分,以便阻止焊膏的路径,使得当头部安装在头部上时,防止焊膏流过以覆盖头部的上部 封装衬底。
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公开(公告)号:US08766450B2
公开(公告)日:2014-07-01
申请号:US12805559
申请日:2010-08-05
申请人: Ki Taek Lee , Hueng Jae Oh , Sung Won Jeong , Gi Sub Lee , Jin Won Choi
发明人: Ki Taek Lee , Hueng Jae Oh , Sung Won Jeong , Gi Sub Lee , Jin Won Choi
IPC分类号: H01L23/28
CPC分类号: H01L23/49811 , H01L23/49805 , H01L2924/0002 , H01L2924/09701 , H01L2924/00
摘要: There is provided a lead pin for a package substrate including: a connection pin being inserted into a hole formed in an external substrate; a head part formed on one end of the connection pin; and a barrier part formed on one surface of the head part in order to block the path of a solder paste so that the solder paste is prevented from flowing so as to cover the upper portion of the head part when the head part is mounted on the package substrate.
摘要翻译: 提供了一种用于封装基板的引脚,包括:连接销插入形成在外部基板中的孔中; 形成在连接销的一端的头部; 以及形成在头部的一个表面上的阻挡部分,以便阻止焊膏的路径,使得当头部安装在头部上时,防止焊膏流过以覆盖头部的上部 封装衬底。
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公开(公告)号:US08142240B2
公开(公告)日:2012-03-27
申请号:US12805214
申请日:2010-07-19
申请人: Heung Jae Oh , Ki Taek Lee , Dong Gyu Lee , Sung Won Jeong , Jin Won Choi
发明人: Heung Jae Oh , Ki Taek Lee , Dong Gyu Lee , Sung Won Jeong , Jin Won Choi
IPC分类号: H01R4/02
CPC分类号: H05K3/3426 , H01L2924/15312 , H05K2201/10318 , H05K2201/10772 , Y02P70/613
摘要: Disclosed herein is a lead pin for a package substrate.The lead pin for the package substrate includes a cylindrical connection pin; and a head part that is formed on one end of the connection pin and has a convex round part formed on the lower end of the head part, having a step part. When the lead pin for the package substrate is mounted on the package substrate, the bulge phenomenon of a solder paste that surrounds the head part and is melted is prevented by a flange part, thereby making it possible to prevent the connection pin from being polluted and to improve a contact defect such as a short defect or the like when coupling a socket.
摘要翻译: 这里公开了一种用于封装衬底的引脚。 用于封装衬底的引脚包括圆柱形连接销; 以及头部,其形成在所述连接销的一端上,并且具有形成在所述头部的下端上的凸形圆形部分,具有台阶部分。 当封装基板的引脚安装在封装基板上时,通过凸缘部防止围绕头部并熔化的焊膏的凸起现象,从而可以防止连接引脚受到污染, 以在连接插座时改善诸如短缺陷等的接触缺陷。
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公开(公告)号:US20110014827A1
公开(公告)日:2011-01-20
申请号:US12805214
申请日:2010-07-19
申请人: Heung Jae Oh , Ki Taek Lee , Dong Gyu Lee , Sung Won Jeong , Jin Won Choi
发明人: Heung Jae Oh , Ki Taek Lee , Dong Gyu Lee , Sung Won Jeong , Jin Won Choi
IPC分类号: H01R13/04
CPC分类号: H05K3/3426 , H01L2924/15312 , H05K2201/10318 , H05K2201/10772 , Y02P70/613
摘要: Disclosed herein is a lead pin for a package substrate.The lead pin for the package substrate includes a cylindrical connection pin; and a head part that is formed on one end of the connection pin and has a convex round part formed on the lower end of the head part, having a step part. When the lead pin for the package substrate is mounted on the package substrate, the bulge phenomenon of a solder paste that surrounds the head part and is melted is prevented by a flange part, thereby making it possible to prevent the connection pin from being polluted and to improve a contact defect such as a short defect or the like when coupling a socket.
摘要翻译: 这里公开了一种用于封装衬底的引脚。 用于封装衬底的引脚包括圆柱形连接销; 以及头部,其形成在所述连接销的一端上,并且具有形成在所述头部的下端上的凸形圆形部分,具有台阶部分。 当封装基板的引脚安装在封装基板上时,通过凸缘部防止围绕头部并熔化的焊膏的凸起现象,从而可以防止连接引脚受到污染, 以在连接插座时改善诸如短缺陷等的接触缺陷。
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公开(公告)号:US08456003B2
公开(公告)日:2013-06-04
申请号:US12926314
申请日:2010-11-09
申请人: Dong Gyu Lee , Dae Young Lee , Tae Joon Chung , Seon Jae Mun , Jin Won Choi
发明人: Dong Gyu Lee , Dae Young Lee , Tae Joon Chung , Seon Jae Mun , Jin Won Choi
IPC分类号: H01L2225/06513 , H01L2224/9201 , H01L2225/06517
CPC分类号: H01L21/4853 , H01L21/441 , H01L23/485 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0346 , H01L2224/0347 , H01L2224/05572 , H01L2224/1147 , H01L2224/11849 , H01L2224/13082
摘要: There is provided a package substrate capable of controlling the degree of warpage thereof by improving the composition and formation of a post terminal and a method of fabricating the same. The package substrate includes a substrate having at least one conductive pad; an insulating layer provided on the substrate and having an opening to expose the conductive pad; a separation barrier layer provided on the conductive pad inside the opening and formed to be higher than the upper surface of the insulating layer along the side walls thereof; a post terminal provided on the separation barrier layer; and a solder bump provided on the post terminal.
摘要翻译: 提供一种能够通过改善后端子的组成和形成来控制其翘曲程度的封装基板及其制造方法。 封装衬底包括具有至少一个导电焊盘的衬底; 绝缘层,设置在所述基板上并具有用于暴露所述导电焊盘的开口; 隔离层,设置在所述开口内的所述导电垫上,并形成为比所述绝缘层的所述侧壁的上表面高; 设置在分离阻挡层上的柱状端子; 以及设置在柱端子上的焊料凸块。
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公开(公告)号:US20110133332A1
公开(公告)日:2011-06-09
申请号:US12926279
申请日:2010-11-05
申请人: Seon Jae Mun , Dae Young Lee , Tae Joon Chung , Dong Gyu Lee , Jin Won Choi
发明人: Seon Jae Mun , Dae Young Lee , Tae Joon Chung , Dong Gyu Lee , Jin Won Choi
IPC分类号: H01L23/498 , H01L21/60
CPC分类号: H01L23/49811 , H01L2924/0002 , H01L2924/00
摘要: There is provided a package substrate allowing for enhanced reliability by improving the structure of a solder bump and a method of fabricating the same. The package substrate includes: a substrate having at least one conductive pad; an insulating layer provided on the substrate and having an opening to expose the conductive pad; a post terminal provided on the conductive pad inside the opening; and a solder bump provided on the post terminal and having an angle between a bottom surface and a side surface thereof ranging from 80° to 120°.
摘要翻译: 提供了一种通过改善焊料凸块的结构来提高可靠性的封装衬底及其制造方法。 封装衬底包括:具有至少一个导电焊盘的衬底; 绝缘层,设置在所述基板上并具有用于暴露所述导电焊盘的开口; 位于所述开口内的所述导电垫上的支柱端子; 以及设置在立柱端子上并且在其底表面和侧表面之间具有从80°至120°的角度的焊料凸块。
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公开(公告)号:US20110186991A1
公开(公告)日:2011-08-04
申请号:US12926314
申请日:2010-11-09
申请人: Dong Gyu Lee , Dae Young Lee , Tae Joon Chung , Seon Jae Mun , Jin Won Choi
发明人: Dong Gyu Lee , Dae Young Lee , Tae Joon Chung , Seon Jae Mun , Jin Won Choi
IPC分类号: H01L23/485 , H01L21/441
CPC分类号: H01L21/4853 , H01L21/441 , H01L23/485 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0346 , H01L2224/0347 , H01L2224/05572 , H01L2224/1147 , H01L2224/11849 , H01L2224/13082
摘要: There is provided a package substrate capable of controlling the degree of warpage thereof by improving the composition and formation of a post terminal and a method of fabricating the same. The package substrate includes a substrate having at least one conductive pad; an insulating layer provided on the substrate and having an opening to expose the conductive pad; a separation barrier layer provided on the conductive pad inside the opening and formed to be higher than the upper surface of the insulating layer along the side walls thereof; a post terminal provided on the separation barrier layer; and a solder bump provided on the post terminal.
摘要翻译: 提供一种能够通过改善后端子的组成和形成来控制其翘曲程度的封装基板及其制造方法。 封装衬底包括具有至少一个导电焊盘的衬底; 绝缘层,设置在所述基板上并具有用于暴露所述导电焊盘的开口; 隔离层,设置在所述开口内的所述导电垫上,并形成为比所述绝缘层的所述侧壁的上表面高; 设置在分离阻挡层上的柱状端子; 以及设置在柱端子上的焊料凸块。
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10.
公开(公告)号:US08671564B2
公开(公告)日:2014-03-18
申请号:US12554762
申请日:2009-09-04
申请人: Hueng Jae Oh , Tae Joon Chung , Dong Gyu Lee , Seon Jae Mun , Jin Won Choi
发明人: Hueng Jae Oh , Tae Joon Chung , Dong Gyu Lee , Seon Jae Mun , Jin Won Choi
IPC分类号: H01K3/10
CPC分类号: H01L23/49811 , H01L24/11 , H01L24/13 , H01L2224/05001 , H01L2224/05022 , H01L2224/05026 , H01L2224/05144 , H01L2224/05155 , H01L2224/05164 , H01L2224/05568 , H01L2224/05611 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/1146 , H01L2224/1147 , H01L2224/11901 , H01L2224/13022 , H01L2224/1308 , H01L2224/13083 , H01L2224/13084 , H01L2224/131 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/16 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/12042 , H05K3/243 , H05K3/3436 , H05K3/3484 , H05K2201/1025 , Y02P70/613 , Y10T29/49147 , Y10T29/49165 , H01L2924/00014 , H01L2924/014 , H01L2224/13099 , H01L2924/00
摘要: Disclosed is a substrate for flip chip bonding, in which a base solder layer is formed between a pad and a metal post, thereby increasing impact resistance and mounting reliability. A method of fabricating the substrate for flip chip bonding is also provided.
摘要翻译: 公开了一种用于倒装芯片接合的基板,其中在焊盘和金属柱之间形成基底焊料层,从而提高耐冲击性和安装可靠性。 还提供了一种制造用于倒装芯片接合的基板的方法。
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