Silicon photonics wafer using standard silicon-on-insulator processes through substrate removal or transfer
    3.
    发明授权
    Silicon photonics wafer using standard silicon-on-insulator processes through substrate removal or transfer 有权
    硅光子晶片使用标准的绝缘体上硅工艺,通过衬底去除或转移

    公开(公告)号:US08901576B2

    公开(公告)日:2014-12-02

    申请号:US13353162

    申请日:2012-01-18

    IPC分类号: H01L33/00 H01L29/18 H01L21/00

    CPC分类号: H01L21/76251

    摘要: Processing for a silicon photonics wafer is provided. A silicon photonics wafer that includes an active silicon photonics layer, a thin buried oxide layer, and a silicon substrate is received. The thin buried oxide layer is located between the active silicon photonics layer and the silicon substrate. An electrical CMOS wafer that includes an active electrical layer is also received. The active silicon photonics layer of the silicon photonics wafer is flip chip bonded to the active electrical layer of the electrical CMOS wafer. The silicon substrate is removed exposing a backside surface of the thin buried oxide layer. A low-optical refractive index backing wafer is added to the exposed backside surface of the thin buried oxide layer. The low-optical refractive index backing wafer is a glass substrate or silicon substrate wafer. The silicon substrate wafer includes a thick oxide layer that is attached to the thin buried oxide layer.

    摘要翻译: 提供了硅光子晶片的处理。 接收包括有源硅光子学层,薄掩埋氧化物层和硅衬底的硅光子晶片。 薄的掩埋氧化物层位于有源硅光子层和硅衬底之间。 还接收包括有源电层的电CMOS晶片。 硅光子晶片的有源硅光子层被倒装芯片结合到电CMOS晶片的有源电层。 去除暴露出薄的掩埋氧化物层的背面的硅衬底。 将低光学折射率背衬晶片添加到薄的掩埋氧化物层的暴露的背面。 低光学折射率背衬晶片是玻璃衬底或硅衬底晶片。 硅衬底晶片包括附着到薄掩埋氧化物层的厚氧化物层。

    SILICON PHOTONICS WAFER USING STANDARD SILICON-ON-INSULATOR PROCESSES THROUGH SUBSTRATE REMOVAL OR TRANSFER
    5.
    发明申请
    SILICON PHOTONICS WAFER USING STANDARD SILICON-ON-INSULATOR PROCESSES THROUGH SUBSTRATE REMOVAL OR TRANSFER 有权
    使用通过基板去除或转移的标准硅绝缘体工艺的硅光电晶体

    公开(公告)号:US20130181233A1

    公开(公告)日:2013-07-18

    申请号:US13353162

    申请日:2012-01-18

    IPC分类号: H01L33/60 H01L33/08

    CPC分类号: H01L21/76251

    摘要: Processing for a silicon photonics wafer is provided. A silicon photonics wafer that includes an active silicon photonics layer, a thin buried oxide layer, and a silicon substrate is received. The thin buried oxide layer is located between the active silicon photonics layer and the silicon substrate. An electrical CMOS wafer that includes an active electrical layer is also received. The active silicon photonics layer of the silicon photonics wafer is flip chip bonded to the active electrical layer of the electrical CMOS wafer. The silicon substrate is removed exposing a backside surface of the thin buried oxide layer. A low-optical refractive index backing wafer is added to the exposed backside surface of the thin buried oxide layer. The low-optical refractive index backing wafer is a glass substrate or silicon substrate wafer. The silicon substrate wafer includes a thick oxide layer that is attached to the thin buried oxide layer.

    摘要翻译: 提供了硅光子晶片的处理。 接收包括有源硅光子学层,薄掩埋氧化物层和硅衬底的硅光子晶片。 薄的掩埋氧化物层位于有源硅光子层和硅衬底之间。 还接收包括有源电层的电CMOS晶片。 硅光子晶片的有源硅光子层被倒装芯片结合到电CMOS晶片的有源电层。 去除暴露出薄的掩埋氧化物层的背面的硅衬底。 将低光学折射率背衬晶片添加到薄的掩埋氧化物层的暴露的背面。 低光学折射率背衬晶片是玻璃衬底或硅衬底晶片。 硅衬底晶片包括附着到薄掩埋氧化物层的厚氧化物层。

    Lens array optical coupling to photonic chip
    6.
    发明授权
    Lens array optical coupling to photonic chip 有权
    透镜阵列光耦合到光子芯片

    公开(公告)号:US09229169B2

    公开(公告)日:2016-01-05

    申请号:US13211018

    申请日:2011-08-16

    摘要: A photonic integrated circuit apparatus is disclosed. The apparatus includes a photonic chip and a lens array coupling element. The photonic chip includes a waveguide at a side edge surface of the photonic chip. The lens array coupling element is mounted on a top surface of the photonic chip and on the side edge surface. The coupling element includes a lens array that is configured to modify spot sizes of light traversing to or from the waveguide. The coupling element further includes an overhang on a side of the coupling element that opposes the lens array and that abuts the top surface of the photonic chip. The overhang includes a vertical stop surface that has a depth configured to horizontally align an edge of the waveguide with a focal length of the lens array and that vertically aligns focal points of the lens array with the edge of the waveguide.

    摘要翻译: 公开了一种光子集成电路装置。 该装置包括光子芯片和透镜阵列耦合元件。 光子芯片包括在光子芯片的侧边缘表面处的波导。 透镜阵列耦合元件安装在光子芯片的顶表面上并在侧边缘表面上。 耦合元件包括透镜阵列,其被配置为修改横穿波导的光的光斑大小。 耦合元件还包括在耦合元件的与透镜阵列相对并且邻接光子芯片的顶表面的一侧上的突出端。 突出部分包括垂直的止动表面,其具有配置成将波导的边缘与透镜阵列的焦距水平对准的深度,并且使透镜阵列的焦点与波导的边缘垂直对准。

    Highly collimating tapered light guide for uniform illumination of flat panel displays
    8.
    发明授权
    Highly collimating tapered light guide for uniform illumination of flat panel displays 有权
    高准直锥形光导,用于平板显示器的均匀照明

    公开(公告)号:US06648485B1

    公开(公告)日:2003-11-18

    申请号:US09711041

    申请日:2000-11-13

    IPC分类号: F21V704

    摘要: A light guide system has a light guide having a first end portion opposite a second end portion. The light guide provides a first surface and a second surface between the first and second end portions, and the second surface is inclined relative to the first surface. A light source is disposed along the first end portion on a first axis. A light redistribution device is disposed on an entrance of the light guide for receiving light from the light source and redistributing a portion of the light perpendicular to the first axis to provide a uniform light distribution from the first surface.

    摘要翻译: 导光系统具有导光体,该导光体具有与第二端部相对的第一端部。 光导件在第一和第二端部之间提供第一表面和第二表面,并且第二表面相对于第一表面倾斜。 光源沿着第一端部设置在第一轴上。 光再分配装置设置在光导的入口处,用于接收来自光源的光并且重新分配垂直于第一轴的光的一部分以提供从第一表面均匀的光分布。