摘要:
A flex circuit card with an elastomeric cable connector assembly is provided for transmitting high speed signals between two or more printed circuit boards in a high performance computer system. The flex circuit card connects a cable assembly to a printed circuit board. A conductor trace in the flex circuit card extends into an elastomeric end and terminates with a ball shaped contact which is angled to wipe against mating pads on the printed circuit card for making electrical contact. The cable assembly uses multiple wires attached to a plurality of elastomeric connectors. At least one elastomeric connector is attached to each end of the cable assembly and each elastomeric connector has a plurality of contacts which are used to mate with a plurality of pads on the surface of the printed circuit board. The elastomeric connector described in the present invention provides a high density, cable-to-board interconnection that is perpendicular to the surface of the printed circuit board.
摘要:
A flex circuit card with an elastomeric cable connector assembly is provided for transmitting high speed signals between two or more printed circuit boards in a high performance computer system. The flex circuit card connects a cable assembly to a printed circuit board. A conductor trace in the flex circuit card extends into an elastomeric end and terminates with a ball shaped contact which is angled to wipe against mating pads on the printed circuit card for making electrical contact. The cable assembly uses multiple wires attached to a plurality of elastomeric connectors. At least one elastomeric connector is attached to each end of the cable assembly and each elastomeric connector has a plurality of contacts which are used to mate with a plurality of pads on the surface of the printed circuit board. The elastomeric connector described in the present invention provides a high density, cable-to-board interconnection that is perpendicular to the surface of the printed circuit board.
摘要:
The present invention is directed to a structure for packaging electronic devices, such as semiconductor chips, in a three dimensional structure which permits electrical signals to propagate both horizontally and vertically. The structure is formed from a plurality of assemblies. Each assembly is formed from a substrate having disposed on at least one surface a plurality of electronic devices. Each assembly is disposed in a stack of adjacent assemblies. Between adjacent assemblies there is an electrical interconnection electrically interconnecting each assembly. The electrical interconnection formed from an elastomeric interposer having a plurality of apertures extending therethrough. The array of apertures corresponds to the array of electronic devices on the substrates. The aperture and electrical interconnection is disposed over the array of electronic devices so that the electrical interconnection between adjacent electronic devices. The stack of assemblies is compressed thereby compressing the electrical interconnection between adjacent assemblies. Methods for fabricating the electrical interconnection as a stand alone elastomeric sheet are described.
摘要:
The present invention is directed to a structure for packaging electronic devices, such as semiconductor chips, in a three dimensional structure which permits electrical signals to propagate both horizontally and vertically. The structure is formed from a plurality of assemblies. Each assembly is formed from a substrate having disposed on at least one surface a plurality of electronic devices. Each assembly is disposed in a stack of adjacent assemblies. Between adjacent assemblies there is an electrical interconnection means electrically interconnecting each assembly. The electrical interconnection means is formed from an elastomeric interposer. The elastomeric interposer is formed from an elastomeric material having a plurality of electrical conductors extending therethrough, either in a clustered or un-clustered arrangement. The electrical interconnection means is fabricated having a plurality of apertures extending therethrough. The array of apertures corresponds to the array of electronic devices on the substrates. The aperture and electrical interconnection means is disposed over the array of electronic devices so that the electrical interconnection means is between adjacent electronic devices. The stack of assemblies is compressed thereby compressing the electrical interconnection means between adjacent assemblies. The substrate or each assembly is formed from a thermally conductive material such as diamond. A heat dissipation means is thermally connected to the edges of the substrate to extract heat generated within the structure. Methods for fabricating the electrical interconnection means as a stand alone elastomeric sheet are described. The ends of the plurality of conductors in the electrical interconnection means are fabricated so that upon compression between adjacent assemblies there is a wiping action between the conductor ends and contact locations on the adjacent assemblies to form a good electrical contact therewith.
摘要:
The present invention relates to an improved pinless connector for use in microelectronics comprising an improved elastomer resin of polysiloxane and filler.
摘要:
A high density test probe is for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.
摘要:
A system and method for preventing cracks is provided. An embodiment comprises placing crack stoppers into a connection between a semiconductor die and a substrate. The crack stoppers may be in the shape of hollow or solid cylinders and may be placed so as to prevent any cracks from propagating through the crack stoppers.
摘要:
An electrical structure including a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.
摘要:
A multi-chip wafer level package comprises three stacked semiconductor dies. A first semiconductor die is embedded in a first photo-sensitive material layer. A second semiconductor die is stacked on top of the first semiconductor die wherein the second semiconductor die is face-to-face coupled to the first semiconductor die. A third semiconductor die is back-to-back attached to the second semiconductor die. Both the second semiconductor die and the third semiconductor die are embedded in a second photo-sensitive material layer. The multi-chip wafer level package further comprises a plurality of through assembly vias formed in the first photo-sensitive material layer and the second photo-sensitive material layer.
摘要:
An electrical interconnect forming method. The electrical interconnect includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.