摘要:
Provided is a nanowire photovoltaic cell (1) including a semiconductor substrate (2) and a plurality of nanowire semiconductors (4) and (5) having a PN junction. The semiconductor substrate (2) and the nanowire semiconductors (4) and (5) are composed of one single crystal. The manufacture method of the nanowire photovoltaic cell includes a step of coating a part of a surface of the semiconductor substrate (2) with an amorphous film (3), and a step of developing a crystal of a material identical to that of the semiconductor substrate (2) through epitaxial growth on the uncoated surface of the semiconductor substrate (2) to form the plurality of nanowire semiconductors (4) and (5).
摘要:
A solar cell element having improved power generation efficiency is provided. A solar cell element 100 has a substrate 110, a mask pattern 120, semiconductor nanorods 130, a first electrode 150 and a second electrode 160. The semiconductor nanorods 130 are disposed in triangular lattice form as viewed in plan on the substrate 110. The ratio p/d of the center-to-center distance p between each adjacent pair of the semiconductor nanorods 130 and the minimum diameter d of the semiconductor nanorods 130 is within the range from 1 to 7. Each semiconductor nanorod 130 has a central nanorod 131 formed of a semiconductor of a first conduction type, a first cover layer 132 formed of an intrinsic semiconductor and covering the central nanorod 131, and a second cover layer 138 formed of a semiconductor of a second conduction type and covering the first cover layer 132.
摘要:
To provide a solar cell enabling practical electric power to be obtained and excitons to be effectively collected, and a manufacturing method of the solar cell. A nanowire solar cell 1 comprises: a semiconductor substrate 2; a plurality of nanowire semiconductors 4 and 5 forming pn junctions; a transparent insulating material 6 filled in the gap between the plurality of nanowire semiconductors 4 and 5; an electrode 7 covering the end portion of the plurality of nanowire semiconductors 4 and 5; and a passivation layer 10 provided between the semiconductor 5 and the transparent insulating material 6 and between the semiconductor 5 and the electrode 7.
摘要:
There is provided a method for producing a multijunction solar cell having four-junctions, the method allowing the area of a device to be increased. On a nucleation site formed on a substrate 2, is grown a semiconductor 2a comprising the same material as the substrate 2 in the shape of a wire. On the semiconductor 2a, are successively grown semiconductors 3, 4, 5, and 6 with a narrower band gap in the shape of a wire. The semiconductor 3 may be directly grown in the shape of a wire on the nucleation site formed on the substrate 2. It is preferred to form the nucleation site by forming an amorphous SiO2 coating 8a on the substrate 2 and etching a part of the amorphous SiO2 coating 8a. Further, it is preferred to form an insulating film 8 in the region except the nucleation sites on the substrate 2 by allowing the amorphous SiO2 coating 8a to remain therein. The semiconductor 2a is GaP; the semiconductor 3 is Al0.3Ga0.7As; the semiconductor 4 is GaAs; the semiconductor 5 is In0.3Ga0.7As; and the semiconductor 6 is In0.6Ga0.4As.
摘要翻译:提供了一种制造具有四结的多结太阳能电池的方法,该方法允许增加器件的面积。 在形成在基板2上的成核位置上,生长包括与基板2相同的材料的半导体2a,其形式为导线。 在半导体2a上,连续生长的半导体3,4,5和6具有较窄的导线形状的带隙。 半导体3可以直接生长在形成在基板2上的成核位置上的导线形状。优选通过在基板2上形成非晶SiO 2涂层8a并蚀刻部分无定形SiO 2来形成成核位置 涂层8a。 此外,优选通过使非晶SiO2涂层8a保留在基板2上的除了成核位置以外的区域中形成绝缘膜8。 半导体2a是GaP; 半导体3是Al 0.3 Ga 0.7 As; 半导体4是GaAs; 半导体5是In 0.3 Ga 0.7 As; 半导体6为In 0.6 Ga 0.4 As。
摘要:
There is provided a method for producing a multijunction solar cell having four-junctions, the method allowing the area of a device to be increased. On a nucleation site formed on a substrate 2, is grown a semiconductor 2a comprising the same material as the substrate 2 in the shape of a wire. On the semiconductor 2a, are successively grown semiconductors 3, 4, 5, and 6 with a narrower band gap in the shape of a wire. The semiconductor 3 may be directly grown in the shape of a wire on the nucleation site formed on the substrate 2. It is preferred to form the nucleation site by forming an amorphous SiO2 coating 8a on the substrate 2 and etching a part of the amorphous SiO2 coating 8a. Further, it is preferred to form an insulating film 8 in the region except the nucleation sites on the substrate 2 by allowing the amorphous SiO2 coating 8a to remain therein. The semiconductor 2a is GaP; the semiconductor 3 is Al0.3Ga0.7As; the semiconductor 4 is GaAs; the semiconductor 5 is In0.3Ga0.7As; and the semiconductor 6 is In0.6Ga0.4As.
摘要:
Semiconductor surface emitting elements having a plurality of wavelengths being manufactured on a signal substrate through MOVPE selective growth. More specifically, provided is a semiconductor light emitting element array which comprises; a semiconductor crystal substrate; an insulating film disposed on a surface of the substrate, the insulating film being divided into two or more regions, each of which having two or more openings exposing the surface of the substrate; semiconductor rods extending from the surface of the substrate upward through the openings, the semiconductor rods each having an n-type semiconductor layer and a p-type semiconductor layer being laminated in its extending direction, thereby providing a p-n junction; a first electrode connected to the semiconductor crystal substrate; and a second electrode connected to upper portions of the semiconductor rods; wherein the heights of the semiconductor rods as measured from the substrate surface vary by each of the two or more regions.
摘要:
Semiconductor surface emitting elements having a plurality of wavelengths being manufactured on a signal substrate through MOVPE selective growth. More specifically, provided is a semiconductor light emitting element array which comprises; a semiconductor crystal substrate; an insulating film disposed on a surface of the substrate, the insulating film being divided into two or more regions, each of which having two or more openings exposing the surface of the substrate; semiconductor rods extending from the surface of the substrate upward through the openings, the semiconductor rods each having an n-type semiconductor layer and a p-type semiconductor layer being laminated in its extending direction, thereby providing a p-n junction; a first electrode connected to the semiconductor crystal substrate; and a second electrode connected to upper portions of the semiconductor rods; wherein the heights of the semiconductor rods as measured from the substrate surface vary by each of the two or more regions.
摘要:
Disclosed is a semiconductor device (10) which comprises a glass substrate (12), a lower electrode layer (14), an n-type doped polycrystalline silicon semiconductor layer (16), a low-temperature insulating film (20) in which openings (22, 23) that serve as nuclei for growth of a nanowire (32) are formed, the nanowire (32) that is grown over the low-temperature insulating film (20) and has a core-shell structure, an insulating layer (50) that surrounds the nanowire (32), and an upper electrode layer (52). The nanowire (32) comprises an n-type GaAs core layer and a p-type GaAs shell layer. Alternatively, the nanowire can be formed as a nanowire having a quantum well structure, and InAs that can allow reduction of the process temperature can be used for the nanowire.
摘要:
Disclosed is a semiconductor device (10) which comprises a glass substrate (12), a lower electrode layer (14), an n-type doped polycrystalline silicon semiconductor layer (16), a low-temperature insulating film (20) in which openings (22, 23) that serve as nuclei for growth of a nanowire (32) are formed, the nanowire (32) that is grown over the low-temperature insulating film (20) and has a core-shell structure, an insulating layer (50) that surrounds the nanowire (32), and an upper electrode layer (52). The nanowire (32) comprises an n-type GaAs core layer and a p-type GaAs shell layer. Alternatively, the nanowire can be formed as a nanowire having a quantum well structure, and InAs that can allow reduction of the process temperature can be used for the nanowire.
摘要:
A cosmetic composition in the form of a W/O emulsion includes: (A) 1 to 20% by weight of a plate-like powder which has been surface-treated with an alkylalkoxysilane; (B) 0.1 to 10% by weight of an oil that is solid at temperature of 25° C.; (C) 0.5 to 60% by weight of an oil selected from the group consisting of a hydrocarbon oil, an ester oil, and an ether oil, having a viscosity at 25° C. of 500,000 mPa·s or less; and (D) water, wherein a weight ratio of the component (B) to the component (A), (B)/(A), is 0.01 to 5.