公开(公告)号：US20150180459A1

公开(公告)日：2015-06-25

申请号：US14136356

申请日：2013-12-20

申请人： Harry Muljono ,  Kai Xiao

发明人： Harry Muljono ,  Kai Xiao

IPC分类号： H03K17/0412 ,  H03K17/687 ,  H03K17/16

CPC分类号： H03K17/04123 ,  H03K17/162 ,  H03K17/6871 ,  H03K19/0185

摘要： An apparatus is configured to achieve Cpad mitigation effects. The apparatus may include a switch coupled to a current source with first and second states. The apparatus may also include a pad coupled to the switch and having a pad capacitance that charges and discharges based on changes between the first and second switch states. The apparatus may further include a resistor coupled to the switch and the pad, and the resistor is configured to be modulated to reduce the charging or discharging time of the pad.

摘要翻译： 一种装置被配置成实现Cpad缓解效应。 该装置可以包括耦合到具有第一和第二状态的电流源的开关。 该装置还可以包括耦合到开关的焊盘并且具有基于第一和第二开关状态之间的变化而充电和放电的焊盘电容。 该装置还可以包括耦合到开关和焊盘的电阻器，并且电阻器被配置为被调制以减小焊盘的充电或放电时间。

公开(公告)号：US09335933B2

公开(公告)日：2016-05-10

申请号：US14142619

申请日：2013-12-27

申请人： Harry Muljono ,  Charlie Lin ,  Kai Xiao ,  Linda K. Sun

发明人： Harry Muljono ,  Charlie Lin ,  Kai Xiao ,  Linda K. Sun

IPC分类号： H03H7/30 ,  G06F3/06 ,  H04L25/03

CPC分类号： G06F3/061 ,  H04L25/03038 ,  H04L25/0305

摘要： Described are systems and apparatuses to mitigate the timing margin loss caused by inter-symbol interference (ISI) in high speed input/output (I/O) interfaces. Data dependent jitter (DDJ) compensation techniques that may be utilized in the transmission or receiving circuitry of the I/O interface, including capturing bit data values of a data signal prior to an identified data transition, and delaying/advancing the transmission/reception the data signal or a corresponding clock signal based on these bit data values.

摘要翻译： 描述了减轻由高速输入/输出（I / O）接口中的符号间干扰（ISI）引起的定时裕度损失的系统和装置。 可以在I / O接口的发送或接收电路中使用的数据相关抖动（DDJ）补偿技术，包括在识别的数据转换之前捕获数据信号的位数据值，以及延迟/推进发送/接收 数据信号或基于这些位数据值的对应时钟信号。

公开(公告)号：US20230046581A1

公开(公告)日：2023-02-16

申请号：US17728099

申请日：2022-04-25

申请人： Xiang Li ,  Shaohua Li ,  Landon Hanks ,  Kai Xiao ,  Mo Liu ,  Jingbo Li

发明人： Xiang Li ,  Shaohua Li ,  Landon Hanks ,  Kai Xiao ,  Mo Liu ,  Jingbo Li

IPC分类号： H05K7/10 ,  G06F13/40

摘要： An apparatus and method for reducing differential cross-talk in a pin arrangement of a socket are described. Socket pins within a differential pair use a modified shape to tighten the intra-pair pin coupling to reduce the crosstalk without changing the pin map. The middle vertical segment of one pin of a diagonally adjacent differential pin pair is modified to be closer to the other pin than other corresponding locations of the pins. The spring beam that extends from the middle vertical segment of the one pin is modified to accommodate the package landing pad that the spring beam contacts to maintain a uniform pitch.

公开(公告)号：US09787028B2

公开(公告)日：2017-10-10

申请号：US13997893

申请日：2012-03-31

申请人： Raul Enriquez-Shibayama ,  Kai Xiao ,  Xiang Li

发明人： Raul Enriquez-Shibayama ,  Kai Xiao ,  Xiang Li

IPC分类号： H01R13/6461 ,  H01R12/73 ,  H01R13/6471

CPC分类号： H01R13/6461 ,  H01R12/737 ,  H01R13/6471 ,  H01R2201/06

摘要： Apparatus and methods of arranging ground pins and signal pins in a card connector includes arranging a signal pins and ground pins in a card connector into at least six (6) columns divided between a primary side and a secondary side of the connector.

公开(公告)号：US20150340817A1

公开(公告)日：2015-11-26

申请号：US14286494

申请日：2014-05-23

申请人： Xiang Li ,  Hao-Han Hsu ,  Yun Ling ,  Gong Ouyang ,  Kai Xiao ,  Jiangqi He ,  Lu-Vong T. Phan ,  Wei Xu

发明人： Xiang Li ,  Hao-Han Hsu ,  Yun Ling ,  Gong Ouyang ,  Kai Xiao ,  Jiangqi He ,  Lu-Vong T. Phan ,  Wei Xu

IPC分类号： H01R13/6598 ,  H01R43/18 ,  H05K3/36 ,  H01R12/72 ,  H05K3/28

CPC分类号： H01R13/6598 ,  H01R12/712 ,  H01R12/721 ,  H01R12/724 ,  H01R13/658 ,  H01R43/18 ,  H05K3/284 ,  H05K3/36 ,  Y10T29/49128

摘要： In an embodiment, a connector such as an edge connector includes a connector housing, a first set of pins configured within the housing and having first ends to couple to corresponding signal lines of a first circuit board and second ends to couple to corresponding signal lines of a mating connector of a second circuit board, and a conductive material adapted to the housing to reduce interference caused by one or more sources of interference. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，诸如边缘连接器的连接器包括连接器壳体，构造在壳体内的第一组引脚，并且具有耦合到第一电路板的相应信号线的第一端和第二端耦合到相应的信号线 第二电路板的配合连接器以及适于壳体的导电材料，以减少由一个或多个干扰源造成的干扰。 描述和要求保护其他实施例。

公开(公告)号：US20140140027A1

公开(公告)日：2014-05-22

申请号：US13993334

申请日：2011-12-22

申请人： Raul Enriquez Shibayama ,  Jimmy A. Johansson ,  Kai Xiao

发明人： Raul Enriquez Shibayama ,  Jimmy A. Johansson ,  Kai Xiao

IPC分类号： H01L23/00

CPC分类号： H01L24/06 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2223/6638 ,  H01L2224/0401 ,  H01L2224/12105 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/16225 ,  H01L2224/17515 ,  H01L2224/81815 ,  H01L2924/01322 ,  H01L2924/15311 ,  H05K1/0228 ,  H05K1/0245 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/09418 ,  H05K2201/10189 ,  H05K2201/10734 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00

摘要： The present description relates to the field of fabricating microelectronic devices, wherein a microelectronic device may have a hexagonal confirmation for signal nodes and ground nodes which utilizes the cross-talk reduction by cancellation property of geometrically symmetry and orthogonality to reduce signal node to ground node ratio for increasing signaling density.

摘要翻译： 本发明涉及制造微电子器件的领域，其中微电子器件可以具有用于信号节点和接地节点的六边形确认，其利用通过几何对称和正交性的抵消特性进行串扰降低，以减少信号节点与接地节点的比率 用于增加信号密度。

公开(公告)号：US07417181B2

公开(公告)日：2008-08-26

申请号：US11400802

申请日：2006-04-07

申请人： Zeng-Yu Wang ,  Maria Harrison ,  Kai Xiao

发明人： Zeng-Yu Wang ,  Maria Harrison ,  Kai Xiao

IPC分类号： A01H5/00 ,  C12N5/14 ,  C12N15/63 ,  C07H21/00

CPC分类号： C12N15/8243 ,  C12N9/16 ,  C12N15/8259

摘要： The invention provides plant acid phosphatase coding sequences. Also provided are constructs comprising these sequences, plants transformed therewith and methods of use thereof. In certain aspects of the invention, transgenic plants are provided exhibiting improved phosphorous utilization.

摘要翻译： 本发明提供植物酸性磷酸酶编码序列。 还提供了包含这些序列的构建体，用其转化的植物及其使用方法。 在本发明的某些方面，提供了表现出改善的磷利用率的转基因植物。

公开(公告)号：US20170179625A1

公开(公告)日：2017-06-22

申请号：US14977555

申请日：2015-12-21

申请人： Kai Xiao ,  Raul Enriquez Shibayama ,  John C. Tomlin

发明人： Kai Xiao ,  Raul Enriquez Shibayama ,  John C. Tomlin

IPC分类号： H01R12/70

CPC分类号： H01R12/585 ,  H01R12/523 ,  H01R43/205 ,  H05K1/00

摘要： Attachment techniques for printed circuit boards (PCBs) are described. According to some such techniques, an array of double-contact connectors may be used to attach first and second PCBs to each other. In various embodiments, each such double-contact connector may comprise respective first and second contact elements that establish and retain physical contact with the inner surfaces of vias in the first and second PCBs. In some embodiments, at least one of the double-contact connectors may provide electrical conductivity between a trace on the first PCB and a trace on the second PCB. In various embodiments, one of the two PCBs may comprise a main PCB, and the other may comprise a patch PCB arranged to relieve routing congestion in a region of the main PCB. Other embodiments are described and claimed.

公开(公告)号：US20160174362A1

公开(公告)日：2016-06-16

申请号：US14569524

申请日：2014-12-12

申请人： Kevin J. Doran ,  Stephen H. Hall ,  Thomas D. Whiteley ,  Kai Xiao ,  Yuan-Liang Li ,  Jimmy Hsu ,  Thonas Yi-Ren Su

发明人： Kevin J. Doran ,  Stephen H. Hall ,  Thomas D. Whiteley ,  Kai Xiao ,  Yuan-Liang Li ,  Jimmy Hsu ,  Thonas Yi-Ren Su

IPC分类号： H05K1/02 ,  H05K3/40 ,  H05K1/18 ,  H05K3/10

CPC分类号： H05K1/0227 ,  H05K1/0243

摘要： Techniques and mechanisms to mitigate noise in a signal line extending across rails arranged in a split plane configuration. In an embodiment, respective sides of a first rail and a second rail define opposite sides of a boundary region between the rails. The first rail forms a groove and the second rail forms a branch portion that extends at least in part into the groove. In another embodiment, one or more signal lines each extend across the boundary region and proximate to the branch portion, the one or more signals each to communicate a respective signal while the first rail is at a first voltage and while the second rail is at a second voltage. The branch portion and groove contribute to a reduced impedance discontinuity across the boundary region, which mitigates the creation of signal noise in the one or more signal lines.

摘要翻译： 技术和机制，以减轻信号线中的噪声，延伸穿过设置在分离平面配置中的轨道。 在一个实施例中，第一轨道和第二轨道的相应侧面限定轨道之间的边界区域的相对侧面。 第一轨道形成凹槽，第二轨道形成至少部分地延伸到凹槽中的分支部分。 在另一个实施例中，一个或多个信号线各自延伸跨越边界区域并且靠近分支部分，所述一个或多个信号各自用于在第一轨道处于第一电压的同时传送相应的信号，而第二轨道处于 第二电压。 分支部分和凹槽有助于跨越边界区域的减小的阻抗不连续性，这减轻了一个或多个信号线中的信号噪声的产生。

公开(公告)号：US20150085458A1

公开(公告)日：2015-03-26

申请号：US14037826

申请日：2013-09-26

申请人： Raul Enriquez Shibayama ,  Mauro Lai ,  Richard K. Kunze ,  Nicholas B. Peterson ,  Carlos A. Lizalde Moreno ,  Kai Xiao

发明人： Raul Enriquez Shibayama ,  Mauro Lai ,  Richard K. Kunze ,  Nicholas B. Peterson ,  Carlos A. Lizalde Moreno ,  Kai Xiao

IPC分类号： H05K1/02 ,  H05K3/30 ,  H05K1/11

CPC分类号： H05K1/0231 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/0228 ,  H05K1/115 ,  H05K1/116 ,  H05K1/162 ,  H05K3/303 ,  H05K2201/09636 ,  Y10T29/4913 ,  H01L2924/00

摘要： Inductive coupling arising between adjacent vias in interconnect technologies (commonly associated with printed circuit boards or package) can be combatted through the addition of metal plates to vias. The plates generate capacitive coupling that can compensate for the inductive crosstalk normally generated between vias in printed circuit boards or packages. When the added plates of two neighboring vias overlap with each other, a capacitive coupling is generated. By balancing the inductive coupling with capacitive coupling, an effective reduction of far end crosstalk may be obtained.

摘要翻译： 通过在通孔中添加金属板，互连技术中相邻通孔之间产生的感应耦合（通常与印刷电路板或封装相关联）可以对抗。 板产生电容耦合，可以补偿印刷电路板或封装中通孔之间通常产生的电感串扰。 当两个相邻通孔的添加板彼此重叠时，产生电容耦合。 通过将电感耦合与电容耦合进行平衡，可以获得远端串扰的有效减少。