摘要:
A stacked ferroelectric memory device has selection transistors including a first gate structure, a first impurity region, a second impurity region, a first insulating interlayer covering the selection transistors, bit line structures electrically connected to the first impurity regions, a second insulating interlayer covering the bit line structures, doped single crystalline silicon plugs formed through the first and the second insulating interlayers, each of which contacts the second impurity region and has a height greater than that of the bit line structures, active patterns disposed on the plugs and the second insulating interlayer, each of which contacts the plugs, and ferroelectric transistors disposed on the active patterns, each of which has a second gate structure including a ferroelectric layer pattern and a conductive pattern, a third impurity region and a fourth impurity region. The ferroelectric memory device performs a random access operation and has a high degree of integration.
摘要:
A stacked ferroelectric memory device has selection transistors including a first gate structure, a first impurity region, a second impurity region, a first insulating interlayer covering the selection transistors, bit line structures electrically connected to the first impurity regions, a second insulating interlayer covering the bit line structures, doped single crystalline silicon plugs formed through the first and the second insulating interlayers, each of which contacts the second impurity region and has a height greater than that of the bit line structures, active patterns disposed on the plugs and the second insulating interlayer, each of which contacts the plugs, and ferroelectric transistors disposed on the active patterns, each of which has a second gate structure including a ferroelectric layer pattern and a conductive pattern, a third impurity region and a fourth impurity region. The ferroelectric memory device performs a random access operation and has a high degree of integration.
摘要:
A memory device includes one or more layers of parallel strings of ferroelectric gate transistors on a substrate, each layer of parallel strings including a plurality of parallel line-shaped active regions and a plurality of word lines extending in parallel transversely across the active regions and disposed on ferroelectric patterns on the active regions. A string select gate line may extend transversely across the active regions in parallel with the word lines. A ground select gate line may extend transversely across the active regions in parallel with the word lines.
摘要:
A phase change memory device includes an impurity region on a substrate, the impurity region being in an active region, a metal silicide pattern at least partially buried in the impurity region, a diode on the impurity region, a lower electrode on the diode, a phase change layer pattern on the lower electrode, and an upper electrode on the phase change layer pattern.
摘要:
An apparatus and method for generating and parsing a MAC PDU in a mobile communication system are provided in which LCIDs of MAC SDUs to be multiplexed are checked, the length of an LF is determined for each of the MAC SDUs, referring to LF lengths predetermined for the LCIDs, a MAC header including the LCIDs and LFs of the determined lengths for the MAC SDUs is generated, and a MAC PDU is generated by attaching the MAC header to payload including the MAC SDUs. During the MAC header generation, if a padding size required for the MAC PDU generation calculated taking into account the absence of a last LF in the MAC header is larger than the length of the last LF, the last LF is included in the MAC header, the required padding size is recalculated, taking into account the inclusion of the last LF, and a padding is added according to the re-calculated padding size.
摘要:
Metal organic chemical vapor deposition (MOCVD) may be utilized in methods of forming an (111) oriented PZT ferroelectric layer at a lower temperature, a ferroelectric capacitor and methods of fabricating, and a ferroelectric memory device using the same may be provided. Using the metal organic chemical vapor deposition, ferroelectric layers, capacitors, and memory devices, which may be fabricated and may have (111) preferred oriented crystal growth.
摘要:
A system and a method for handover of a terminal in a wireless communication system are provided. The method includes transmitting, by a serving BS, measurement control information and DRX control information to a terminal; measuring, by the terminal, a channel, based on the measurement control information; operating, by the terminal, in connected DRX, based on the DRX control information; reporting, by the terminal, channel measurement information to the serving BS; determining, by the serving BS, the handover of the terminal based on the channel measurement information provided from the terminal; resetting, by the serving BS, the DRX control information of the terminal; transmitting, by the serving BS, the reset DRX control information to the terminal; operating, by the terminal, in the connected DRX, based on the reset DRX control information provided from the serving BS; and transmitting, by the serving BS, handover indication information to the terminal.
摘要:
In one aspect, a method of forming a phase change material layer is provided. The method includes supplying a reaction gas including the composition of Formula 1 into a reaction chamber, supplying a first source which includes Ge(II) into the reaction chamber, and supplying a second source into the reaction chamber. Formula 1 is NR1R2R3, where R1, R2 and R3 are each independently at least one selected from the group consisting of H, CH3, C2H5, C3H7, C4H9, Si(CH3)3, NH2, NH(CH3), N(CH3)2, NH(C2H5) and N(C2H5)2.
摘要:
Provided are a phase change memory device and a method for forming the phase change memory device. The method includes forming a phase change material layer by providing reactive radicals to a substrate. The reactive radicals may comprise precursors for a phase change material and nitrogen.
摘要:
A phase change memory device includes a lower electrode provided on a substrate, an interlayer insulating layer including a contact hole exposing the lower electrode, and covering the substrate, a resistant material pattern filling the contact hole, a phase change pattern interposed between the resistant material pattern and the interlayer insulating layer, and extending between the resistant material pattern and the lower electrode, wherein the resistant material pattern has a higher resistance than the phase change pattern, and an upper electrode in contact with the phase change pattern, the upper electrode being electrically connected to the lower electrode through the phase change pattern.