公开(公告)号：US5728630A

公开(公告)日：1998-03-17

申请号：US743190

申请日：1996-11-05

申请人： Hiroyuki Nishimura ,  Hiroshi Adachi ,  Etsushi Adachi ,  Shigeyuki Yamamoto ,  Shintaro Minami ,  Shigeru Harada ,  Toru Tajima ,  Kimio Hagi

发明人： Hiroyuki Nishimura ,  Hiroshi Adachi ,  Etsushi Adachi ,  Shigeyuki Yamamoto ,  Shintaro Minami ,  Shigeru Harada ,  Toru Tajima ,  Kimio Hagi

IPC分类号： H01L21/3205 ,  B32B27/08 ,  C08G77/16 ,  H01L21/312 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/31

CPC分类号： H01L21/02137 ,  B32B27/08 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/3122 ,  H01L21/76801 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76834 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/12044

摘要： In a semiconductor device and a method of fabrication thereof, a resin film forms an interlayer film of the semiconductor device having a multilayer interconnection structure, and is formed by only one coating using coating liquid containing silicone ladder polymers represented by the chemical formula: (HO).sub.2 (R.sub.2 Si.sub.2 O.sub.3).sub.n H.sub.2. As a result, it is possible to improve long-term reliability of electric characteristics or the like, and simplify a process.

摘要翻译： 在半导体器件及其制造方法中，树脂膜形成具有多层互连结构的半导体器件的中间膜，并且仅使用包含由以下化学式表示的硅树脂聚合物的涂布液形成一个涂层：（HO ）2（R2Si2O3）nH2。 结果，可以提高电特性等的长期可靠性，并且简化工艺。

公开(公告)号：US5604380A

公开(公告)日：1997-02-18

申请号：US401804

申请日：1995-03-10

申请人： Hiroyuki Nishimura ,  Hiroshi Adachi ,  Etsushi Adachi ,  Shigeyuki Yamamoto ,  Shintaro Minami ,  Shigeru Harada ,  Toru Tajima ,  Kimio Hagi

发明人： Hiroyuki Nishimura ,  Hiroshi Adachi ,  Etsushi Adachi ,  Shigeyuki Yamamoto ,  Shintaro Minami ,  Shigeru Harada ,  Toru Tajima ,  Kimio Hagi

IPC分类号： H01L21/3205 ,  B32B27/08 ,  C08G77/16 ,  H01L21/312 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L29/41 ,  H01L29/51

CPC分类号： H01L21/02137 ,  B32B27/08 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/3122 ,  H01L21/76801 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76834 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/12044

摘要： In a semiconductor device and a method of fabrication thereof, a resin film forms an interlayer film of the semiconductor device having a multilayer interconnection structure, and is formed by only one coating using coating liquid containing silicone ladder polymers represented by the chemical formula: (HO).sub.2 (R.sub.2 Si.sub.2 O.sub.3).sub.n H.sub.2. As a result, it is possible to improve long-term reliability of electric characteristics or the like, and simplify a process.

摘要翻译： 在半导体器件及其制造方法中，树脂膜形成具有多层互连结构的半导体器件的中间膜，并且仅使用包含由以下化学式表示的硅树脂聚合物的涂布液形成一个涂层：（HO ）2（R2Si2O3）nH2。 结果，可以提高电特性等的长期可靠性，并且简化工艺。

公开(公告)号：US5889330A

公开(公告)日：1999-03-30

申请号：US987763

申请日：1997-12-09

申请人： Hiroyuki Nishimura ,  Hiroshi Adachi ,  Etsushi Adachi ,  Shigeyuki Yamamoto ,  Shintaro Minami ,  Shigeru Harada ,  Toru Tajima ,  Kimio Hagi

发明人： Hiroyuki Nishimura ,  Hiroshi Adachi ,  Etsushi Adachi ,  Shigeyuki Yamamoto ,  Shintaro Minami ,  Shigeru Harada ,  Toru Tajima ,  Kimio Hagi

IPC分类号： H01L21/312 ,  H01L21/768 ,  H01L23/532 ,  H01L29/41

CPC分类号： H01L21/02137 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/0234 ,  H01L21/02362 ,  H01L21/3122 ,  H01L21/76801 ,  H01L21/76826 ,  H01L23/5329 ,  H01L2924/0002

摘要： In a semiconductor device and a method of fabrication thereof, a resin film forms an interlayer film of the semiconductor device having a multilayer interconnection structure, and is formed by only one coating using coating liquid containing silicone ladder polymers represented by the chemical formula: (HO).sub.2 (R.sub.2 Si.sub.2 O.sub.3).sub.n H.sub.2. As a result, it is possible to improve long-term reliability of electric characteristics or the like, and simplify a process.

摘要翻译： 在半导体器件及其制造方法中，树脂膜形成具有多层互连结构的半导体器件的中间膜，并且仅使用包含由以下化学式表示的硅树脂聚合物的涂布液形成一个涂层：（HO ）2（R2Si2O3）nH2。 结果，可以提高电特性等的长期可靠性，并且简化工艺。

公开(公告)号：US5306947A

公开(公告)日：1994-04-26

申请号：US2398

申请日：1993-01-13

申请人： Hiroshi Adachi ,  Hirozoh Kanegae ,  Hiroshi Mochizuki ,  Masanori Obata ,  Takemi Endoh ,  Kimio Hagi ,  Shigeru Harada ,  Kazuhito Matsukawa ,  Akira Ohhisa ,  Etsushi Adachi

发明人： Hiroshi Adachi ,  Hirozoh Kanegae ,  Hiroshi Mochizuki ,  Masanori Obata ,  Takemi Endoh ,  Kimio Hagi ,  Shigeru Harada ,  Kazuhito Matsukawa ,  Akira Ohhisa ,  Etsushi Adachi

IPC分类号： H01L21/3205 ,  H01L21/3105 ,  H01L21/312 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L23/48 ,  H01L29/46 ,  H01L29/54 ,  H01L29/62

CPC分类号： H01L21/02137 ,  H01L21/02282 ,  H01L21/3105 ,  H01L21/31055 ,  H01L21/31058 ,  H01L21/3122 ,  H01L21/76819 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002

摘要： The present invention is mainly characterized by providing an even surface of an interlayer insulating film for insulating and isolating an upper interconnection and a lower interconnection from each other. A lower interconnection layer is provided on a semiconductor substrate, having a pattern of stepped portions. A silicon type insulating film is provided on the semiconductor substrate so as to cover the lower interconnection layer. A silicon ladder resin film is filled in recessed portions of the surface of the silicon type insulating film for making even the surface of the silicon type insulating film. An upper interconnection layer electrically connected to the lower interconnection layer through a via hole is provided on the silicon type insulating film. The silicon ladder resin film has the structural formula: ##STR1## where R.sub.1 is at least one of a phenyl group and a lower alkyl group, R.sub.2 is at least one of a hydrogen atom and a lower alkyl group, and n is an integer of 20 to 1000.

摘要翻译： 本发明的主要特征在于，提供用于使上部互连和下部互连彼此绝缘和隔离的层间绝缘膜的均匀表面。 下部布线层设置在半导体基板上，具有台阶部分的图案。 在半导体衬底上设置硅绝缘膜，以覆盖下互连层。 硅梯型树脂膜填充在硅型绝缘膜的表面的凹部中，以使硅型绝缘膜的表面均匀。 通过通孔电连接到下互连层的上互连层设置在硅型绝缘膜上。 硅梯树脂膜具有结构式：（*化学结构*）其中R 1为苯基和低级烷基中的至少一个，R 2为氢原子和低级烷基中的至少一个，n为 整数为20〜1000。

公开(公告)号：US5510653A

公开(公告)日：1996-04-23

申请号：US40968

申请日：1993-03-31

申请人： Noriaki Fujiki ,  Shigeru Harada ,  Hiroshi Adachi ,  Etsushi Adachi

发明人： Noriaki Fujiki ,  Shigeru Harada ,  Hiroshi Adachi ,  Etsushi Adachi

IPC分类号： H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/56

CPC分类号： H01L21/76819 ,  H01L23/5329 ,  H01L2924/0002

摘要： Disclosed herein is a semiconductor device having a multilayer interconnection structure, which is provided with a plurality of via holes having constant diameters. Patterns of a first interconnection layer are provided on a semiconductor substrate. An interlayer insulating film is provided over the semiconductor substrate, to cover the patterns of the first interconnection layer. A silicon ladder resin film is applied onto the surface of the interlayer insulating film, to flatten the same. First and second via holes are provided through the silicon ladder resin film and the interlayer insulating film, to expose first and second coupling portions provided on the surfaces of the patterns of the first interconnection layer. A second interconnection layer is provided over the semiconductor substrate, to be connected with the first and second coupling portions through the first and second via holes respectively.

摘要翻译： 本文公开了具有多层互连结构的半导体器件，其具有多个具有恒定直径的通孔。 第一互连层的图案设置在半导体衬底上。 在半导体衬底上设置层间绝缘膜，以覆盖第一互连层的图案。 将硅梯形树脂膜施加到层间绝缘膜的表面上以使其平坦化。 通过硅梯形树脂膜和层间绝缘膜提供第一和第二通孔，以露出设置在第一互连层的图案的表面上的第一和第二耦合部分。 第二互连层设置在半导体衬底上，分别通过第一和第二通孔与第一和第二耦合部分连接。

公开(公告)号：US5859162A

公开(公告)日：1999-01-12

申请号：US604456

申请日：1996-02-21

申请人： Shigeyuki Yamamoto ,  Hiroyuki Nishimura ,  Hiroshi Adachi

发明人： Shigeyuki Yamamoto ,  Hiroyuki Nishimura ,  Hiroshi Adachi

IPC分类号： C08L83/04 ,  C07F7/21 ,  C08G77/12 ,  C08G77/14 ,  C08G77/22 ,  C08G77/34 ,  H01L21/312 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  C08G77/06

CPC分类号： C08G77/34 ,  C07F7/21 ,  C08G77/12 ,  H01L23/5329 ,  H01L2924/0002

摘要： A high-purity silicone ladder polymer of high molecular weight which contains 1 ppm or less of sodium, potassium, iron, copper, lead, magnesium, manganese and chlorine, and 1 ppb or less of uranium and thorium; and whose polymerization degree is 600 to 10000. Trialkoxysilane compounds or trichlorosilane compounds are hydrolyzed to produce a high-purity silicone ladder prepolymer whose polymerization degree is 5 to 600. The silicone ladder prepolymer is subjected to dehydrative condensation by using a nucleophilic reagent as a catalyst, and then purified in a dissolution/reprecipitation method to yield the silicone ladder polymer.

摘要翻译： 含有1ppm以下钠，钾，铁，铜，铅，镁，锰，氯等1ppm以下铀，钍1ppm以上的高分子量高分子硅酸酯聚合物。 聚合度为600〜10000.将三烷氧基硅烷化合物或三氯硅烷化合物水解，得到聚合度为5〜600的高纯度硅氧烷预聚物。使用亲核试剂作为催化剂使硅树脂预聚物进行脱水缩合 ，然后在溶解/再沉淀法中纯化，得到硅树脂聚合物。

公开(公告)号：US5183846A

公开(公告)日：1993-02-02

申请号：US722476

申请日：1991-07-02

申请人： Yoshiko Aiba ,  Hiroshi Adachi ,  Etsushi Adachi

发明人： Yoshiko Aiba ,  Hiroshi Adachi ,  Etsushi Adachi

IPC分类号： C08L83/06 ,  C08L83/04 ,  C08L83/07 ,  C09D183/04 ,  C09D183/06 ,  C09D183/07 ,  H01L21/312

CPC分类号： C08L83/04 ,  C08L83/06 ,  C09D183/04 ,  C09D183/06 ,  H01L21/312

摘要： Disclosed herein is a silicone ladder polymer coating composition containing silicone ladder polymer which is expressed in the following general formula: ##STR1## where R.sub.1 represents the same or different types of phenyl groups or lower alkyl groups, R.sub.2 represents the same or different types of hydrogen atoms or lower alkyl groups, and n represents an integer of 20 to 1000, an aromatic organic solvent which is so added that solid matter occupies 5 to 30 percent by weight, and a silane coupling agent of 150 to 3000 p.p.m. with respect to the polymer.

摘要翻译： 本文公开了含有硅梯子聚合物的硅树脂聚合物涂料组合物，其以下述通式表示：其中R 1表示相同或不同类型的苯基或低级烷基，R 2表示相同或不同类型的氢 原子或低级烷基，n表示20〜1000的整数，添加固体成分为5〜30重量％的芳香族有机溶剂和150〜3000ppm的硅烷偶联剂 相对于聚合物。

公开(公告)号：US5057336A

公开(公告)日：1991-10-15

申请号：US532231

申请日：1990-06-05

申请人： Etsushi Adachi ,  Hiroshi Adachi ,  Osamu Hayashi ,  Kazuo Okahashi

发明人： Etsushi Adachi ,  Hiroshi Adachi ,  Osamu Hayashi ,  Kazuo Okahashi

IPC分类号： B05D1/40 ,  B05D3/04 ,  B05D7/24 ,  C08J7/00 ,  C23C18/12 ,  H01L21/312 ,  H01L21/316

CPC分类号： H01L21/316 ,  C23C18/1212 ,  C23C18/122 ,  C23C18/1279 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02282 ,  H01L21/0234 ,  H01L21/3122

摘要： A material for forming a high purity thin film which includes a silicone ladder polymer dissolved in an organic solvent is applied to a substrate to form a thin film thereon. The thin film is then heated, thereby removing the solvent and simultaneously curing the thin film. Subsequently, the cured thin film is exposed to an oxygen plasma to form a high purity SiO.sub.2 thin film on the substrate. Although the method consists of simple processes and employs low treatment temperatures, it is capable of forming a high purity SiO.sub.2 thin film which exhibits excellent step coverage and high dielectric breakdown strength.

摘要翻译： 将用于形成包含溶解在有机溶剂中的硅树脂聚合物的高纯度薄膜的材料施加到基板上以在其上形成薄膜。 然后加热薄膜，从而除去溶剂并同时固化薄膜。 随后，将固化的薄膜暴露于氧等离子体，以在基板上形成高纯度的SiO 2薄膜。 虽然该方法由简单的方法组成并且采用低的处理温度，但是它能够形成高纯度的SiO 2薄膜，其表现出优异的台阶覆盖和高介电击穿强度。

公开(公告)号：US5023204A

公开(公告)日：1991-06-11

申请号：US298950

申请日：1989-01-19

申请人： Etsushi Adachi ,  Hiroshi Adachi ,  Osamu Hayashi ,  Kazuo Okahashi

发明人： Etsushi Adachi ,  Hiroshi Adachi ,  Osamu Hayashi ,  Kazuo Okahashi

IPC分类号： H01L21/311 ,  H01L21/312 ,  H01L21/60 ,  H01L23/29 ,  H01L23/31

CPC分类号： H01L24/03 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02282 ,  H01L21/0234 ,  H01L21/31138 ,  H01L21/3122 ,  H01L23/296 ,  H01L2224/0401 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  Y10S438/911 ,  Y10S438/95

摘要： A stress relaxation protective layer made of a silicone material is formed on a coating covering a circuit disposed on a substrate of a semiconductor device, and a predetermined depth of the surface of the stress relaxation protective layer is modified. A resist is formed on the thus-modified surface of the stress relaxation protective layer, and the thus-formed resist is patterned so that the resist in a predetermined region is removed. The stress relaxation protective layer in the region from which the above-described resist has been removed is removed by etching, and the remaining resist is removed. Next, the coating layer in the region from which the stress relaxation protective layer has been removed is removed by etching with the remaining stress relaxation protective layer used as a mask so that the circuit is exposed. The manufacturing process for semiconductor devices can be significantly simplified since the resist patterning needs to be performed only once and the resist removal can be performed by a dry treatment.

摘要翻译： 在覆盖设置在半导体器件的基板上的电路的涂层上形成由硅树脂材料制成的应力松弛保护层，并且改变应力松弛保护层的表面的预定深度。 在应力松弛保护层的这样改性的表面上形成抗蚀剂，并且将如此形成的抗蚀剂图案化，使得在预定区域中的抗蚀剂被去除。 通过蚀刻除去去除了上述抗蚀剂的区域中的应力松弛保护层，并除去剩余的抗蚀剂。 接下来，通过用作为掩模的剩余应力松弛保护层进行蚀刻除去已经去除了应力松弛保护层的区域中的涂层，使得电路暴露。 因为抗蚀剂图案化需要仅进行一次并且通过干式处理可以进行抗蚀剂去除，所以可以显着地简化半导体器件的制造工艺。

公开(公告)号：US5180691A

公开(公告)日：1993-01-19

申请号：US827220

申请日：1992-01-30

申请人： Etsushi Adachi ,  Hiroshi Adachi ,  Hiroshi Mochizuki ,  Hirozoh Kanegae

发明人： Etsushi Adachi ,  Hiroshi Adachi ,  Hiroshi Mochizuki ,  Hirozoh Kanegae

IPC分类号： H01L21/312 ,  H01L21/3205 ,  H01L21/56 ,  H01L21/768 ,  H01L23/29 ,  H01L23/31 ,  H01L23/52 ,  H01L23/522

CPC分类号： H01L24/05 ,  H01L23/296 ,  H01L24/03 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L24/45 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01072 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01092 ,  H01L2924/181

摘要： The disclosed is a method of manufacturing a semiconductor device sealed with molding resin. An aluminum interconnection including an aluminum electrode pad is formed on a semiconductor substrate having an element. A silicone ladder polymer expressed by the following general formula is formed on the semiconductor substrate to cover the element. The silicone ladder polymer film is selectively etched by an aromatic organic solvent to expose the surface of the aluminum electrode pad. The temperature of the silicone ladder polymer film is elevated at a temperature elevating rate of 20.degree. C./min or more, and then, the silicone ladder polymer film is cooled at a cooling rate of 20.degree. C./min or more to form a cured stress buffering protective film for buffering a stress applied to the element. ##STR1## (in the formula, n is an integer which makes the weight-average molecular weight be in the range of 100,000 to 200,000.)

摘要翻译： 所公开的是用模制树脂密封的半导体器件的制造方法。 在具有元件的半导体衬底上形成包括铝电极焊盘的铝互连。 在半导体衬底上形成由以下通式表示的硅树脂聚合物以覆盖该元件。 通过芳族有机溶剂选择性地蚀刻硅树脂聚合物膜以暴露铝电极焊盘的表面。 硅树脂聚合物膜的温度以20℃/分钟以上的升温速度升高，然后将硅树脂聚合物膜以20℃/分钟以上的冷却速度冷却，形成 用于缓冲施加到元件的应力的固化的应力缓冲保护膜。 （式中，n是使重均分子量在100,000〜200000的范围内的整数。